THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME
    1.
    发明申请
    THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME 有权
    薄膜晶体管及其制造方法

    公开(公告)号:US20160204267A1

    公开(公告)日:2016-07-14

    申请号:US14886214

    申请日:2015-10-19

    摘要: Provided is a thin film transistor (TFT) that includes a first electrode on a substrate separated from a second electrode, an oxide semiconductor pattern on the second electrode including a channel region, a third electrode on the oxide semiconductor pattern, a first insulating layer on the substrate including the third electrode including first contact holes exposing a part of the first electrode, a part of the second electrode, and a part of the third electrode, a gate electrode on the first insulating layer and corresponding to a part of the oxide semiconductor pattern, a second insulating layer on the substrate including the gate electrode including a second contact hole corresponding to the first contact hole that exposes a part of the second electrode, and a pixel electrode on the second insulating layer electrically connected to the second electrode through the first contact hole and the second contact hole.

    摘要翻译: 提供了一种薄膜晶体管(TFT),其包括在与第二电极分离的基板上的第一电极,在包括沟道区域的第二电极上的氧化物半导体图案,氧化物半导体图案上的第三电极, 所述基板包括所述第三电极,所述第三电极包括暴露所述第一电极的一部分,所述第二电极的一部分和所述第三电极的一部分的第一接触孔,所述第一绝缘层上的对应于所述氧化物半导体的一部分的栅电极 在该基板上形成第二绝缘层,该第二绝缘层包括栅电极,该栅电极包括与第一接触孔相对应的第二接触孔,该第二接触孔暴露第二电极的一部分;以及通过第二绝缘层与第二电极电连接的第二绝缘层上的像素电极 第一接触孔和第二接触孔。

    THIN FILM TRANSISTORS, METHODS OF MANUFACTURING THE SAME AND DISPLAY DEVICES INCLUDING THE SAME
    2.
    发明申请
    THIN FILM TRANSISTORS, METHODS OF MANUFACTURING THE SAME AND DISPLAY DEVICES INCLUDING THE SAME 有权
    薄膜晶体管,其制造方法和包括其的显示器件

    公开(公告)号:US20150069336A1

    公开(公告)日:2015-03-12

    申请号:US14174989

    申请日:2014-02-07

    IPC分类号: H01L27/12 H01L27/32

    摘要: A thin film transistor includes a gate electrode on a substrate, a gate insulation layer which covers the gate electrode on the substrate, an oxide semiconductor pattern which is disposed on the gate insulation layer and includes a channel portion superimposed over the gate electrode, and low resistance patterns provided at edges of the channel portion, respectively, and including oxygen vacancies, a channel passivation layer on the oxide semiconductor pattern, a reaction layer which covers the oxide semiconductor pattern and the channel passivation layer, and includes a metal oxide, and a source electrode and a drain electrode which contact the oxide semiconductor pattern.

    摘要翻译: 薄膜晶体管包括在基板上的栅电极,覆盖基板上的栅电极的栅极绝缘层,设置在栅极绝缘层上并且包括叠加在栅电极上的沟道部分的氧化物半导体图案,以及低 分别设置在沟道部分的边缘并且包括氧空位的电阻图案,氧化物半导体图案上的沟道钝化层,覆盖氧化物半导体图案和沟道钝化层的反应层,并且包括金属氧化物,以及 源电极和接触氧化物半导体图案的漏电极。

    SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES
    4.
    发明申请
    SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES 审中-公开
    半导体器件及制造半导体器件的方法

    公开(公告)号:US20160118503A1

    公开(公告)日:2016-04-28

    申请号:US14842540

    申请日:2015-09-01

    摘要: A semiconductor device may include a substrate, a gate electrode disposed on the substrate, a gate insulation layer disposed on the substrate to cover the gate electrode, an active layer including an oxide semiconductor disposed on the gate insulation layer, an insulating interlayer disposed on the gate insulation layer to cover the active layer, a protection structure including a plurality of metal oxide layers disposed on the insulating interlayer, and a source electrode and a drain electrode disposed on the protection structure.

    摘要翻译: 半导体器件可以包括衬底,设置在衬底上的栅极电极,设置在衬底上以覆盖栅电极的栅极绝缘层,包括设置在栅极绝缘层上的氧化物半导体的有源层,设置在栅绝缘层上的绝缘层 栅绝缘层覆盖有源层,包括设置在绝缘中间层上的多个金属氧化物层的保护结构以及设置在保护结构上的源电极和漏电极。

    DISPLAY SUBSTRATE INCLUDING A THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME
    5.
    发明申请
    DISPLAY SUBSTRATE INCLUDING A THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME 有权
    显示基板包括薄膜晶体管及其制造方法

    公开(公告)号:US20150053970A1

    公开(公告)日:2015-02-26

    申请号:US14454822

    申请日:2014-08-08

    IPC分类号: H01L27/12

    摘要: A display substrate includes a gate electrode on a base substrate, an active pattern which overlaps the gate electrode and includes a metal oxide semiconductor, an insulation pattern on the active pattern, a source electrode which contacts the active pattern, a drain electrode which contacts the active pattern and is spaced apart from the source electrode, and a first passivation layer which covers the active pattern and the insulation pattern, and includes fluorine, where the active pattern includes a first portion which directly contacts the insulation pattern and overlaps the gate electrode and the insulation pattern, a second portion which contacts the first passivation layer and has an electrical conductivity substantially larger than that of the first portion, a third portion which contacts the first passivation layer, has an electrical conductivity substantially larger than that of the first portion and is spaced apart from the second portion.

    摘要翻译: 显示基板包括在基底基板上的栅极电极,与栅电极重叠并且包括金属氧化物半导体的有源图案,有源图案上的绝缘图案,与有源图案接触的源极电极, 并且与源电极间隔开,以及覆盖有源图案和绝缘图案并包括氟的第一钝化层,其中有源图案包括直接接触绝缘图案并与栅电极重叠的第一部分,以及 所述绝缘图案是接触所述第一钝化层并具有比所述第一部分的导电性大的电导率的第二部分,与所述第一钝化层接触的第三部分具有比所述第一部分的电导率大的电导率, 与第二部分间隔开。

    THIN FILM TRANSISTOR ARRAY SUBSTRATE AND MANUFACTURING METHOD OF THE SAME
    8.
    发明申请
    THIN FILM TRANSISTOR ARRAY SUBSTRATE AND MANUFACTURING METHOD OF THE SAME 有权
    薄膜晶体管阵列基板及其制造方法

    公开(公告)号:US20160197295A1

    公开(公告)日:2016-07-07

    申请号:US14956058

    申请日:2015-12-01

    发明人: Je-Hun LEE

    摘要: Provided is a thin film transistor array substrate, including a gate electrode, a gate insulating layer covering the gate electrode, a semiconductor pattern formed on the gate insulating layer and including a channel region overlapping the gate electrode, a source electrode and a drain electrode formed on the semiconductor pattern and facing each other with a first opening exposing the channel region therebetween, a first protective layer formed on the gate insulating layer to cover the source electrode, the drain electrode and the semiconductor pattern and a metal oxide layer formed along a surface of the first protective layer.

    摘要翻译: 提供了一种薄膜晶体管阵列基板,包括栅电极,覆盖栅电极的栅极绝缘层,形成在栅极绝缘层上并包括与栅电极重叠的沟道区的半导体图案,形成的源电极和漏电极 在所述半导体图案上并且相互面对并具有暴露其间的沟道区域的第一开口,形成在所述栅极绝缘层上以覆盖所述源电极,所述漏电极和所述半导体图案的第一保护层和沿着所述第一开口形成的金属氧化物层 的第一保护层。