-
公开(公告)号：US20220384491A1
公开(公告)日：2022-12-01
申请号：US17886489
申请日：2022-08-12
发明人： Young-Wook LEE , Woo-Geun LEE , Ki-Won KIM , Hyun-Jung LEE , Ji-Soo OH
IPC分类号： H01L27/12 , H01L29/786 , H01L21/768
摘要： A substrate including a first signal line and a first electrode disposed on the substrate, an oxide semiconductor layer pattern overlapping the first electrode, an insulating layer disposed between the first electrode and the oxide semiconductor layer pattern, a second signal line intersecting the first signal line, a second electrode electrically connected to the oxide semiconductor layer pattern, a third electrode electrically connected to the oxide semiconductor layer pattern and spaced apart from the second electrode, and an insulator comprising a first portion disposed between the first signal line and the second signal line, and at least partially overlapping with both of the first signal line and the second signal line.
-
2.发明申请公开(公告)号：US20170077246A1
公开(公告)日：2017-03-16
申请号：US15343234
申请日：2016-11-04
发明人： Pil-Sang YUN , Ki-Won KIM , Hye-Young RYU , Woo-Geun LEE , Seung-Ha CHOI , Jae-Hyoung YOUN , Kyoung-Jae CHUNG , Young-Wook LEE , Je-Hun LEE , Kap-Soo YOON , Do-Hyun KIM , Dong-Ju YANG , Young-Joo CHOI
IPC分类号： H01L29/417 , H01L29/786 , H01L21/4763 , H01L21/44 , H01L21/4757 , H01L21/465 , H01L29/66 , H01L27/12
CPC分类号： H01L29/41733 , H01L21/44 , H01L21/441 , H01L21/465 , H01L21/475 , H01L21/47573 , H01L21/47635 , H01L27/1214 , H01L27/1225 , H01L27/127 , H01L27/1288 , H01L29/66969 , H01L29/78606 , H01L29/7869 , H01L29/78696
摘要： A thin film transistor panel includes an insulating substrate, a gate insulating layer disposed on the insulating substrate, an oxide semiconductor layer disposed on the gate insulating layer, an etch stopper disposed on the oxide semiconductor layer, and a source electrode and a drain electrode disposed on the etch stopper.
摘要翻译： 薄膜晶体管面板包括绝缘基板，设置在绝缘基板上的栅极绝缘层，设置在栅极绝缘层上的氧化物半导体层，设置在氧化物半导体层上的蚀刻停止器，以及设置在源极电极和漏极上的 在蚀刻停止器上。
-
公开(公告)号：US20180083040A1
公开(公告)日：2018-03-22
申请号：US15813758
申请日：2017-11-15
发明人： Young-Wook LEE , Woo-Geun LEE , Ki-Won KIM , Hyun-Jung LEE , Ji-Soo OH
IPC分类号： H01L27/12 , H01L29/786 , H01L21/768
CPC分类号： H01L27/124 , H01L21/76834 , H01L27/1225 , H01L27/1255 , H01L27/1262 , H01L27/127 , H01L27/1288 , H01L29/7869 , H01L29/78693
摘要： A substrate including gate wirings including a gate line and a gate electrode disposed on a substrate, an oxide semiconductor layer pattern overlapping the gate electrode, a gate insulating layer disposed between the gate wirings and the oxide semiconductor layer pattern, data wirings including a data line crossing the gate line, a source electrode connected to one side of the oxide semiconductor layer pattern, and a drain electrode connected to another side of the oxide semiconductor layer, and an insulating pattern including a first portion which is disposed between the gate line and the data line and at least partially overlaps with both of the gate line and the data line.
-
公开(公告)号：US20190355752A1
公开(公告)日：2019-11-21
申请号：US16438385
申请日：2019-06-11
发明人： Young-Wook LEE , Woo-Geun LEE , Ki-Won KIM , Hyun-Jung LEE , Ji-Soo OH
IPC分类号： H01L27/12
摘要： A substrate including a gate line and a gate electrode disposed on a substrate, an oxide semiconductor layer pattern overlapping the gate electrode, a gate insulating layer disposed between the gate electrode and the oxide semiconductor layer pattern, a data line intersecting the gate line, a source electrode electrically connected to the oxide semiconductor layer pattern, a drain electrode electrically connected to the oxide semiconductor layer, the drain electrode spaced apart from the source electrode, and an insulating pattern including a first portion, which is disposed between the gate line and the data line and at least partially overlaps with both of the gate line and the data line.
-
5.发明申请公开(公告)号：US20170040349A1
公开(公告)日：2017-02-09
申请号：US15332079
申请日：2016-10-24
发明人： Je-Hun LEE , Ki-Won KIM , Do-Hyun KIM , Woo-Geun LEE , Kap-Soo YOON
IPC分类号： H01L27/12 , H01L29/786
CPC分类号： H01L27/1225 , H01L21/0214 , H01L21/02164 , H01L21/0217 , H01L21/02554 , H01L21/02565 , H01L23/53238 , H01L27/124 , H01L27/1248 , H01L27/1262 , H01L29/45 , H01L29/4908 , H01L29/513 , H01L29/518 , H01L29/66969 , H01L29/78603 , H01L29/7869 , H01L2924/0002 , H01L2924/00
摘要： A TFT array substrate includes a semiconductive oxide layer disposed on an insulating substrate and including a channel portion, a gate electrode overlapping the semiconductive oxide layer, a gate insulating layer interposed between the semiconductive oxide layer and the gate electrode, and a passivation layer disposed on the semiconductive oxide layer and the gate electrode. At least one of the gate insulating layer and the passivation layer includes an oxynitride layer, and the oxynitride layer has a higher concentration of oxygen than that of nitrogen in a location of the oxynitride layer closer to the semiconductive oxide layer.
摘要翻译： TFT阵列基板包括设置在绝缘基板上并包括沟道部分的半导体氧化物层，与半导体氧化物层重叠的栅极电极，插入在半导体氧化物层和栅电极之间的栅极绝缘层，以及设置在 半导体氧化物层和栅电极。 栅极绝缘层和钝化层中的至少一个包括氧氮化物层，并且氧氮化物层在氧氮化物层的位置更靠近半导体氧化物层的位置处具有比氮的浓度高的氧氮化物层。
-
公开(公告)号：US20150311230A1
公开(公告)日：2015-10-29
申请号：US14793183
申请日：2015-07-07
发明人： Young-Wook LEE , Woo-Geun LEE , Ki-Won KIM , Hyun-Jung LEE , Ji-Soo OH
IPC分类号： H01L27/12
CPC分类号： H01L27/124 , H01L21/76834 , H01L27/1225 , H01L27/1255 , H01L27/1262 , H01L27/127 , H01L27/1288 , H01L29/7869 , H01L29/78693
摘要： A method of manufacturing a thin film transistor (TFT) array substrate includes forming a gate line and a gate electrode on a substrate, forming a gate-insulating layer and an oxide semiconductor layer on the gate line and the gate electrode, forming etch stop patterns at a thin-film transistor area and an area where the gate line and the data line overlap each other, forming a data conductor on the oxide semiconductor layer and the etch stop patterns, the data conductor comprising a source electrode and a drain electrode that constitute a TFT together with the gate electrode, and forming a data line extending in a direction intersecting the gate line.
摘要翻译： 制造薄膜晶体管（TFT）阵列基板的方法包括在基板上形成栅极线和栅电极，在栅极线和栅电极上形成栅极绝缘层和氧化物半导体层，形成蚀刻停止图案 在薄膜晶体管区域和栅极线和数据线彼此重叠的区域中，在氧化物半导体层和蚀刻停止图案上形成数据导体，数据导体包括源电极和漏极，构成 TFT与栅极电极一起形成，并且在与栅极线相交的方向上形成数据线。
-
7.发明申请DISPLAY SUBSTRATE, DISPLAY DEVICE, AND METHOD OF MANUFACTURING THE DISPLAY SUBSTRATE 有权显示基板，显示装置以及制造显示基板的方法公开(公告)号：US20140349445A1
公开(公告)日：2014-11-27
申请号：US14455771
申请日：2014-08-08
发明人： Seung-Ha CHOI , Kyoung-Jae CHUNG , Woo-Geun LEE
IPC分类号： H01L21/308 , H01L29/66 , H01L27/12
CPC分类号： H01L21/3086 , G02F1/136227 , H01L27/1225 , H01L27/1288 , H01L29/4908 , H01L29/66742 , H01L29/66969 , H01L29/7869
摘要： Provided are a display substrate, a display device, and a method of manufacturing the display substrate. The display substrate includes: a substrate in which a pixel region is defined; a gate electrode and a gate pad are formed on the substrate; a gate insulating layer formed on the gate electrode and the gate pad; a buffer layer pattern overlaps the gate electrode and is formed on the gate insulating layer; an insulating film pattern formed on the buffer layer pattern; an oxide semiconductor pattern formed on the insulating film pattern; a source electrode formed on the oxide semiconductor pattern; and a drain electrode formed on the oxide semiconductor pattern and is separated from the source electrode.
摘要翻译： 提供了显示基板，显示装置和制造显示基板的方法。 显示基板包括：限定像素区域的基板; 在基板上形成栅电极和栅极焊盘; 形成在栅极电极和栅极焊盘上的栅极绝缘层; 缓冲层图案与栅电极重叠并形成在栅极绝缘层上; 形成在缓冲层图案上的绝缘膜图案; 形成在所述绝缘膜图案上的氧化物半导体图案; 形成在所述氧化物半导体图案上的源电极; 以及形成在氧化物半导体图案上并与源电极分离的漏电极。
-
8.发明申请公开(公告)号：US20140312344A1
公开(公告)日：2014-10-23
申请号：US14319012
申请日：2014-06-30
发明人： Je-Hun LEE , Ki-Won KIM , Do-Hyun KIM , Woo-Geun LEE , Kap-Soo YOON
CPC分类号： H01L27/1225 , H01L21/0214 , H01L21/02164 , H01L21/0217 , H01L21/02554 , H01L21/02565 , H01L23/53238 , H01L27/124 , H01L27/1248 , H01L27/1262 , H01L29/45 , H01L29/4908 , H01L29/513 , H01L29/518 , H01L29/66969 , H01L29/78603 , H01L29/7869 , H01L2924/0002 , H01L2924/00
摘要： A TFT array substrate includes a semiconductive oxide layer disposed on an insulating substrate and including a channel portion, a gate electrode overlapping the semiconductive oxide layer, a gate insulating layer interposed between the semiconductive oxide layer and the gate electrode, and a passivation layer disposed on the semiconductive oxide layer and the gate electrode. At least one of the gate insulating layer and the passivation layer includes an oxynitride layer, and the oxynitride layer has a higher concentration of oxygen than that of nitrogen in a location of the oxynitride layer closer to the semiconductive oxide layer.
摘要翻译： TFT阵列基板包括设置在绝缘基板上并包括沟道部分的半导体氧化物层，与半导体氧化物层重叠的栅极电极，插入在半导体氧化物层和栅电极之间的栅极绝缘层，以及设置在 半导体氧化物层和栅电极。 栅极绝缘层和钝化层中的至少一个包括氧氮化物层，并且氧氮化物层在氧氮化物层的位置更靠近半导体氧化物层的位置处具有比氮的浓度高的氧氮化物层。
-
公开(公告)号：US20140147947A1
公开(公告)日：2014-05-29
申请号：US14168971
申请日：2014-01-30
发明人： Yu-Gwang JEONG , Young-Wook LEE , Sang-Gab KIM , Woo-Geun LEE , Min-Seok OH , Jang-Soo KIM , Kap-Soo YOON , Shin-Il CHOI , Hong-Kee CHIN , Seung-Ha CHOI , Seung-Hwan SHIM , Sung-Hoon YANG , Ki-Hun JEONG
IPC分类号： H01L27/12
CPC分类号： H01L27/127 , H01L27/1214 , H01L27/1259 , H01L27/1288 , H01L29/66765
摘要： Embodiments of the present invention relate to a thin film transistor and a manufacturing method of a display panel, and include forming a gate line including a gate electrode on a substrate, forming a gate insulating layer on the gate electrode, forming an intrinsic semiconductor on the gate insulating layer, forming an extrinsic semiconductor on the intrinsic semiconductor, forming a data line including a source electrode and a drain electrode on the extrinsic semiconductor, and plasma-treating a portion of the extrinsic semiconductor between the source electrode and the drain electrode to form a protection member and ohmic contacts on respective sides of the protection member. Accordingly, the process for etching the extrinsic semiconductor and forming an inorganic insulating layer for protecting the intrinsic semiconductor may be omitted such that the manufacturing process of the display panel may be simplified, manufacturing cost may be reduced, and productivity may be improved.
摘要翻译： 本发明的实施例涉及薄膜晶体管和显示面板的制造方法，包括在基板上形成包括栅电极的栅极线，在栅电极上形成栅绝缘层，在栅电极上形成本征半导体 栅极绝缘层，在本征半导体上形成非本征半导体，在外部半导体上形成包括源电极和漏电极的数据线，以及对源电极和漏极之间的非本征半导体的一部分进行等离子体处理，以形成 保护构件和保护构件的相应侧上的欧姆接触。 因此，可以省略用于蚀刻外部半导体和形成用于保护本征半导体的无机绝缘层的工艺，从而可以简化显示面板的制造工艺，可以降低制造成本，并且可以提高生产率。
-
公开(公告)号：US20210143187A1
公开(公告)日：2021-05-13
申请号：US17124497
申请日：2020-12-17
发明人： Young-Wook LEE , Woo-Geun LEE , Ki-Won KIM , Hyun-Jung LEE , Ji-Soo OH
IPC分类号： H01L27/12 , H01L29/786 , H01L21/768
摘要： A substrate including a gate line and a first electrode disposed on the substrate, an oxide semiconductor layer pattern overlapping the first electrode, an insulating layer disposed between the first electrode and the oxide semiconductor layer pattern, a data line intersecting the gate line, a second electrode electrically connected to the oxide semiconductor layer pattern, a third electrode electrically connected to the oxide semiconductor layer, the third electrode spaced apart from the second electrode, and an insulating pattern including a first portion which is disposed between the gate line and the data line and at least partially overlaps with both of the gate line and the data line.
-
-
-
-
-
-
-
-
-
搜索结果
16 条记录 (耗时 0.018 秒)
