公开(公告)号：US10431522B2

公开(公告)日：2019-10-01

申请号：US15856800

申请日：2017-12-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Min-Ok Na ,  Jongkook Kim ,  Hyo-Chang Ryu ,  Jin-woo Park ,  BongJin Son ,  Jangwoo Lee

IPC: H01L23/373 ,  H01L23/367 ,  H01L21/56 ,  H01L25/10 ,  H01L25/00 ,  H01L25/065 ,  H01L23/498 ,  H01L23/50 ,  H01L23/00

Abstract: Provided are a thermal interface material layer and a package-on-package device including the same. The package-on-package device may include a thermal interface material layer interposed between lower and upper semiconductor packages and configured to have a specific physical property. Accordingly, it is possible to prevent a crack from occurring in a lower semiconductor chip, when a solder ball joint process is performed to mount the upper semiconductor package on the lower semiconductor package.

公开(公告)号：US20200006188A1

公开(公告)日：2020-01-02

申请号：US16566380

申请日：2019-09-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Min-Ok Na ,  Jongkook Kim ,  Hyo-Chang Ryu ,  Jin-woo Park ,  BongJin Son ,  Jangwoo Lee

IPC: H01L23/373 ,  H01L23/367 ,  H01L21/56 ,  H01L25/10 ,  H01L25/00 ,  H01L25/065

Abstract: Provided are a thermal interface material layer and a package-on-package device including the same. The package-on-package device may include a thermal interface material layer interposed between lower and upper semiconductor packages and configured to have a specific physical property. Accordingly, it is possible to prevent a crack from occurring in a lower semiconductor chip, when a solder ball joint process is performed to mount the upper semiconductor package on the lower semiconductor package.

公开(公告)号：US10950521B2

公开(公告)日：2021-03-16

申请号：US16566380

申请日：2019-09-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Min-Ok Na ,  Jongkook Kim ,  Hyo-Chang Ryu ,  Jin-woo Park ,  BongJin Son ,  Jangwoo Lee

IPC: H01L23/373 ,  H01L23/367 ,  H01L21/56 ,  H01L25/10 ,  H01L25/00 ,  H01L25/065 ,  H01L23/498 ,  H01L23/50 ,  H01L23/00

Abstract: Provided are a thermal interface material layer and a package-on-package device including the same. The package-on-package device may include a thermal interface material layer interposed between lower and upper semiconductor packages and configured to have a specific physical property. Accordingly, it is possible to prevent a crack from occurring in a lower semiconductor chip, when a solder ball joint process is performed to mount the upper semiconductor package on the lower semiconductor package.

公开(公告)号：US10319619B2

公开(公告)日：2019-06-11

申请号：US15528620

申请日：2014-12-05

Applicant: Samsung Electronics Co., Ltd. ,  BongJin Son ,  Yose Eum ,  JangWoo Lee

Inventor： BongJin Son ,  Yose Eum ,  JangWoo Lee

IPC: H01L21/67 ,  H01L21/683 ,  H01L21/687 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  H01L25/10

Abstract: Provided are an apparatus for manufacturing a semiconductor device and a method of manufacturing a semiconductor package using the same. The manufacturing apparatus may include a base with a plurality of through holes and weight blocks respectively bound by the through holes.

公开(公告)号：US20180145006A1

公开(公告)日：2018-05-24

申请号：US15856800

申请日：2017-12-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Min-Ok NA ,  Jongkook Kim ,  Hyo-Chang Ryu ,  Jin-woo Park ,  BongJin Son ,  Jangwoo Lee

IPC: H01L23/373 ,  H01L23/367 ,  H01L21/56 ,  H01L25/10 ,  H01L25/00 ,  H01L25/065 ,  H01L23/00 ,  H01L23/50 ,  H01L23/498

CPC classification number: H01L23/373 ,  H01L21/563 ,  H01L23/367 ,  H01L23/49827 ,  H01L23/50 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/92 ,  H01L25/065 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/92225 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2225/1094 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/207

Abstract: Provided are a thermal interface material layer and a package-on-package device including the same. The package-on-package device may include a thermal interface material layer interposed between lower and upper semiconductor packages and configured to have a specific physical property. Accordingly, it is possible to prevent a crack from occurring in a lower semiconductor chip, when a solder ball joint process is performed to mount the upper semiconductor package on the lower semiconductor package.