公开(公告)号：US20180331071A1

公开(公告)日：2018-11-15

申请号：US15971600

申请日：2018-05-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Heung-Kyu KWON ,  Min-Ok NA ,  Sung-Woo PARK ,  Ji-Hyun PARK ,  Su-Min PARK

IPC: H01L25/065 ,  H01L23/00 ,  H01L25/00 ,  H01L23/31 ,  H01L25/18 ,  H01L25/10 ,  H01L23/552

CPC classification number: H01L25/0657 ,  H01L21/561 ,  H01L21/565 ,  H01L21/566 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/3142 ,  H01L23/481 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/552 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L25/105 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05552 ,  H01L2224/0557 ,  H01L2224/13099 ,  H01L2224/14181 ,  H01L2224/16112 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/1703 ,  H01L2224/17051 ,  H01L2224/17181 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/49 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/81192 ,  H01L2224/85 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01064 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

Abstract: An apparatus includes a first substrate having a first land and a second substrate having a second land. A first molding compound is disposed between the first substrate and the second substrate. A first semiconductor chip is disposed on the first substrate and in contact with the first molding portion. A first connector contacts the first land and a second connector contacts the second land. The second connector is disposed on the first connector. A volume of the second connector is greater than a volume of the first connector. A surface of the first semiconductor chip is exposed. The first molding compound is in contact with the second connector, and at least a portion of the second connector is surrounded by the first molding compound.

公开(公告)号：US20150130011A1

公开(公告)日：2015-05-14

申请号：US14450864

申请日：2014-08-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ok-Gyeong PARK ,  Min-Ok NA

IPC: H01L27/146

CPC classification number: H01L27/14618 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/00011

Abstract: An image sensor package may include: a package substrate including a chip attachment area on an upper surface thereof, a pad area having a plurality of pads around the chip attachment area, and a holder attachment area at an outside of the pad area, wherein an upper surface of the holder attachment area is at a lower level than an upper surface of the pad area; an image sensor chip mounted on the chip attachment area of the package substrate; a transparent member above the package substrate and configured to cover the image sensor chip; and a holder on the holder attachment area of the package substrate and configured to fix the transparent member.

Abstract translation: 图像传感器封装可以包括：封装基板，其包括在其上表面上的芯片附接区域，具有围绕芯片附接区域的多个焊盘的焊盘区域以及焊盘区域的外部的保持器附接区域，其中 保持器附接区域的上表面处于比焊盘区域的上表面更低的水平面上; 安装在封装基板的芯片安装区域上的图像传感器芯片; 透明构件，其在所述封装基板上方并且被构造成覆盖所述图像传感器芯片; 以及在所述封装基板的所述保持器附着区域上的保持器，并且被配置为固定所述透明构件。

公开(公告)号：US20190319012A1

公开(公告)日：2019-10-17

申请号：US16448392

申请日：2019-06-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Heung-Kyu KWON ,  Min-Ok NA ,  Sung-Woo Park ,  Ji-Hyun Park ,  Su-Min Park

IPC: H01L25/065 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L25/18 ,  H01L25/10 ,  H01L23/552 ,  H01L23/498 ,  H01L25/00

Abstract: An apparatus includes a first substrate having a first land and a second substrate having a second land. A first molding compound is disposed between the first substrate and the second substrate. A first semiconductor chip is disposed on the first substrate and in contact with the first molding portion. A first connector contacts the first land and a second connector contacts the second land. The second connector is disposed on the first connector. A volume of the second connector is greater than a volume of the first connector. A surface of the first semiconductor chip is exposed. The first molding compound is in contact with the second connector, and at least a portion of the second connector is surrounded by the first molding compound.

公开(公告)号：US20180145006A1

公开(公告)日：2018-05-24

申请号：US15856800

申请日：2017-12-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Min-Ok NA ,  Jongkook Kim ,  Hyo-Chang Ryu ,  Jin-woo Park ,  BongJin Son ,  Jangwoo Lee

IPC: H01L23/373 ,  H01L23/367 ,  H01L21/56 ,  H01L25/10 ,  H01L25/00 ,  H01L25/065 ,  H01L23/00 ,  H01L23/50 ,  H01L23/498

CPC classification number: H01L23/373 ,  H01L21/563 ,  H01L23/367 ,  H01L23/49827 ,  H01L23/50 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/92 ,  H01L25/065 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/92225 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2225/1094 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/207

Abstract: Provided are a thermal interface material layer and a package-on-package device including the same. The package-on-package device may include a thermal interface material layer interposed between lower and upper semiconductor packages and configured to have a specific physical property. Accordingly, it is possible to prevent a crack from occurring in a lower semiconductor chip, when a solder ball joint process is performed to mount the upper semiconductor package on the lower semiconductor package.

公开(公告)号：US20160358893A1

公开(公告)日：2016-12-08

申请号：US15241452

申请日：2016-08-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Heung-Kyu KWON ,  Min-Ok NA ,  Sung-Woo PARK ,  Ji-Hyun PARK ,  Su-Min PARK

IPC: H01L25/065 ,  H01L23/48 ,  H01L25/00 ,  H01L23/00 ,  H01L21/56 ,  H01L23/31 ,  H01L23/498

CPC classification number: H01L25/0657 ,  H01L21/561 ,  H01L21/565 ,  H01L21/566 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/3142 ,  H01L23/481 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/552 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L25/105 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/13099 ,  H01L2224/14181 ,  H01L2224/16112 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/1703 ,  H01L2224/17051 ,  H01L2224/17181 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/49 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/81192 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01064 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2224/81 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

Abstract: An apparatus includes a first substrate having a first land and a second substrate having a second land. A first molding compound is disposed between the first substrate and the second substrate. A first semiconductor chip is disposed on the first substrate and in contact with the first molding portion. A first connector contacts the first land and a second connector contacts the second land. The second connector is disposed on the first connector. A volume of the second connector is greater than a volume of the first connector. A surface of the first semiconductor chip is exposed. The first molding compound is in contact with the second connector, and at least a portion of the second connector is surrounded by the first molding compound.

Abstract translation: 一种装置包括具有第一焊盘的第一衬底和具有第二焊盘的第二衬底。 第一模塑料置于第一基材和第二基材之间。 第一半导体芯片设置在第一基板上并与第一模制部分接触。 第一连接器接触第一焊盘，第二连接器接触第二焊盘。 第二连接器设置在第一连接器上。 第二连接器的体积大于第一连接器的体积。 露出第一半导体芯片的表面。 第一模塑料与第二连接器相接触，第二连接器的至少一部分由第一模塑料包围。