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    METHOD OF FABRICATING SEMICONDUCTOR DEVICE
    2.
    发明申请
    METHOD OF FABRICATING SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20200212047A1

    公开(公告)日：2020-07-02

    申请号：US16814387

    申请日：2020-03-10

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jonghyuk PARK ,  Byoungho KWON ,  Inho KIM ,  Hyesung PARK ,  Jin-Woo BAE ,  Yanghee LEE ,  Inseak HWANG

    IPC: H01L27/108

    Abstract: A method of fabricating a semiconductor device includes providing a substrate including a pair of first regions and a second region therebetween, forming first patterns on the respective first regions to at least partially define a stepwise portion at the second region, and forming a dummy pattern that at least partially fills the stepwise portion. The dummy pattern may be an electrically floating structure. The dummy pattern may be formed as part of forming second patterns on the respective first regions, and the dummy pattern and the second patterns may include substantially common materials. Because the dummy pattern at least partially fills the stepwise portion at the second region, the material layer covering the second patterns and the dummy pattern may omit a corresponding stepwise portion.

    METHOD OF FABRICATING A SEMICONDUCTOR DEVICE
    3.
    发明申请
    METHOD OF FABRICATING A SEMICONDUCTOR DEVICE 审中-公开
    制造半导体器件的方法

    公开(公告)号：US20130183824A1

    公开(公告)日：2013-07-18

    申请号：US13733506

    申请日：2013-01-03

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Byoungho KWON ,  Kuntack LEE ,  Yongsun KO ,  Hongjin KIM ,  Sangwon BAE ,  Sigyung AHN ,  Jun-Youl YANG ,  Sol HAN ,  Bo yun KIM ,  Myung-Ki HONG

    IPC: H01L21/768

    CPC classification number: H01L21/76841 ,  H01L21/02074 ,  H01L21/76861

    Abstract: A method of fabricating a semiconductor device includes forming a first layer including a first metal, forming a second layer including a second metal, the second layer being adjacent to the first layer, polishing top surfaces of the first and second layers, and cleaning the first and second layers using a cleaning solution. The cleaning solution may include an etching solution etching the first and second layers and an inhibitor suppressing the second layer from being over etched.

    Abstract translation: 制造半导体器件的方法包括形成包括第一金属的第一层，形成包括第二金属的第二层，第二层邻近第一层，抛光第一层和第二层的顶表面，以及清洁第一层 和使用清洁溶液的第二层。 清洁溶液可以包括蚀刻溶液，蚀刻第一和第二层以及抑制第二层的抑制剂被过蚀刻。

    SEMICONDUCTOR DEVICE INCLUDING INTERCONNECTION STRUCTURE
    4.
    发明公开
    SEMICONDUCTOR DEVICE INCLUDING INTERCONNECTION STRUCTURE 审中-公开

    公开(公告)号：US20240014068A1

    公开(公告)日：2024-01-11

    申请号：US18217724

    申请日：2023-07-03

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Yanghee LEE ,  Byoungho KWON ,  Jonghyuk PARK ,  Boun YOON ,  Ilyoung YOON ,  Seokjun HONG

    IPC: H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H10B12/00

    CPC classification number: H01L21/76832 ,  H01L21/76877 ,  H01L23/5222 ,  H01L23/5226 ,  H01L23/53266 ,  H01L23/53238 ,  H01L21/76816 ,  H01L23/53295 ,  H10B12/315

    Abstract: A semiconductor device includes a lower structure; an intermediate insulating structure on the lower structure; an intermediate interconnection structure penetrating through the intermediate insulating structure; an upper insulating structure on the intermediate insulating structure and the intermediate interconnection structure; and an upper conductive pattern penetrating through the upper insulating structure and electrically connected to the intermediate interconnection structure, wherein the intermediate insulating structure includes an intermediate etch-stop layer and an intermediate insulating layer thereon, the intermediate insulating layer includes first and second intermediate material layers, the second intermediate material layer having an upper surface coplanar with an upper surface of the first intermediate material layer, the intermediate interconnection structure penetrates through the first intermediate material layer and the intermediate etch-stop layer, and a material of the first intermediate material layer has a dielectric constant that is higher than a dielectric constant of a material of the second intermediate material layer.

    ROTARY BODY MODULE AND CHEMICAL MECHANICAL POLISHING APPARATUS HAVING THE SAME
    5.
    发明申请
    ROTARY BODY MODULE AND CHEMICAL MECHANICAL POLISHING APPARATUS HAVING THE SAME 有权

    公开(公告)号：US20210008686A1

    公开(公告)日：2021-01-14

    申请号：US16747034

    申请日：2020-01-20

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Yonghee LEE ,  Yungjun KIM ,  Hyunjoon PARK ,  Taemin EARMME ,  Seungchul HAN ,  Byoungho KWON ,  Kuntack LEE

    IPC: B24B37/20 ,  B24B37/005

    Abstract: A chemical mechanical polishing apparatus includes a fixing portion; and a rotary body module including a rotating shaft rotatably installed on the fixing portion, a first rotating unit connected to the rotating shaft and on which a wafer is mounted, and a second rotating unit disposed around the first rotating unit and on which a retainer ring is mounted, wherein the fixing portion comprises a first driving member disposed above the first rotating unit and a second driving member disposed above the second rotating unit, wherein the first and second driving members are comprised of a magnet or an electromagnet, wherein a first magnet, disposed opposite to the first driving member, is provided in the first rotating unit, and a second magnet, disposed opposite to the second driving member, is provided in the second rotating unit, and wherein the first rotating unit and the second rotating unit are independently tilted.

    THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE
    7.
    发明申请
    THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE 审中-公开

    公开(公告)号：US20200185398A1

    公开(公告)日：2020-06-11

    申请号：US16793301

    申请日：2020-02-18

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Miso SHIN ,  Myeongan KWON ,  Chungki MIN ,  Byoungho KWON ,  Boun YOON

    IPC: H01L27/11556 ,  H01L27/11582 ,  H01L27/11575 ,  H01L27/11573 ,  H01L27/1157 ,  H01L27/11565 ,  H01L27/11548 ,  H01L27/11529 ,  H01L27/11519

    Abstract: Provided are a three-dimensional semiconductor memory device and a method of fabricating the same. The device may include a substrate including a peripheral circuit region and a cell array region, peripheral gate stacks provided on the peripheral circuit region of the substrate, and an electrode structure provided on the cell array region of the substrate. The electrode structure may include a lower electrode, a lower insulating layer covering the lower electrode, and upper electrodes and upper insulating layers, which are vertically and alternately stacked on the lower insulating layer. The lower insulating layer may be extended from the cell array region to the peripheral circuit region to cover the peripheral gate stacks, and a top surface of the lower insulating layer may be higher on the peripheral circuit region than on the cell array region.

    IMAGE SENSOR
    8.
    发明公开
    IMAGE SENSOR 审中-公开

    公开(公告)号：US20240258352A1

    公开(公告)日：2024-08-01

    申请号：US18410259

    申请日：2024-01-11

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Dongchan KIM ,  Byoungho KWON ,  Beomsuk LEE

    IPC: H01L27/146

    CPC classification number: H01L27/14629 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14636

    Abstract: An image sensor including a substrate including an active pixel region and a peripheral region surrounding the active pixel region; a metal layer on a peripheral region of the substrate; a lower reflective layer on the substrate and the metal layer; a resonance layer on the lower reflective layer; and an upper reflective layer on the resonance layer, wherein the resonance layer has a first thickness on the active pixel region in a vertical direction perpendicular to an upper surface of the substrate and a second thickness in the vertical direction on the peripheral region, and the first thickness is greater than the second thickness.

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