Abstract:
A variable capacitor is provided. The variable capacitor includes a plurality of capacitor segments. The plurality of capacitor segments are connected in parallel within the variable capacitor. When a plurality of candidate capacitances allowable to the variable capacitor according to a connection state of the plurality of capacitor segments connected in parallel are sorted in a magnitude sequence, the plurality of candidate capacitances form a geometric series. The variable capacitor is used for a Voltage Controlled Oscillator (VCO), and the VCO is used for a Phase Locked Loop (PLL).
Abstract:
A receiver includes an amplification block supporting carrier aggregation (CA). The amplification block includes a first amplifier circuit configured to receive a radio frequency (RF) input signal at a block node from an outside source, amplify the RF input signal, and output the amplified RF input signal as a first RF output signal. The first amplifier circuit includes a first amplifier configured to receive the RF input signal through a first input node to amplify the RF input signal, and a first feedback circuit coupled between the first input node and a first internal amplification node of the first amplifier to provide feedback to the first amplifier.
Abstract:
An apparatus of a Digital-to-Analog Converter (DAC) is provided. The apparatus includes a logic circuit for performing a logical operation based on a combination of bit values b0 through bN-1 of a digital code, and a plurality of switches for controlling an output state of a plurality of current cells based on an output of the logical operation, wherein the plurality of the current cells respectively output currents under a control of respective ones of the plurality of switches.
Abstract:
An analog amplifier for recovering an abnormal operation of a common-mode feedback is provided. An analog variable amplifier includes a first input transistor and a second input transistor, a first output transistor and a second output transistor, a third transistor and a fourth transistor, a first current source, a fifth transistor and a sixth transistor, and a second current source. The first input transistor and the second input transistor amplify a bias current depending on a magnitude of a first input voltage and a second input voltage. The first output transistor and the second output transistor output the amplified bias current. The third transistor and the fourth transistor receive an output voltage of the first output transistor as an input and amplifying the received output voltage. The first current source provides a predetermined current between the first output transistor and the third transistor.
Abstract:
An Analog-Digital Converter (ADC) is provided. The ADC includes a plurality of sigma-delta modulators, a plurality of decimators, a plurality of differentiators, and a plurality of XOR operators. The plurality of sigma-delta modulators respectively convert analog signals to digital pulses. The plurality of decimators respectively convert a first sampling rate of a corresponding digital pulse to a second sampling rate which is lower than the first sampling. The plurality of differentiators respectively differentiate signals converted at the second sampling rate to perform delta modulation. The plurality of XOR operators extract a signal component changing with respect to the delta-modulated signals. Therefore, the number of interface pins between a modem and an RFIC can be reduced.
Abstract:
An analog baseband filter apparatus for a multi-mode and multi-band wireless transceiver and a method for controlling the analog baseband filter apparatus are provided. The analog baseband filter apparatus includes a plurality of Radio Frequency (RF) units, each of the plurality of RF units being for receiving RF signals of one of a plurality of frequency bands and outputting baseband signals, a plurality of filter blocks for filtering and amplifying the baseband signals, and a switching unit for connecting at least two of the plurality of RF units to at least one of the plurality of filter blocks according to a selected communication mode, wherein the at least one of the plurality of filter blocks is configured to be connected to a capacitor region of an adjacent filter block from among the plurality of filter blocks.
Abstract:
An Analog/Digital (A/D) modulation apparatus in a communication system supporting multiple communication modes and a method for controlling the same are provided. The A/D modulation apparatus includes an A/D modulation module having a structure in which a plurality of unit loops are extended by a serial connection, a control module configured to determine a modulation resolution needed for a communication mode to be used, a signal transfer control module including an input control module configured to transfer or block an intermediate output signal of a basic loop, as an input signal of an extended loop serially connected to the basic loop, in response to the modulation control bits provided from the control module, and an output module configured to generate a final digital-modulated signal based on a final output signal of the basic loop and a final output signal of the extended loop.
Abstract:
An apparatus and a method for digital-analog conversion are provided. The apparatus includes a first cell matrix for outputting a current of a signal corresponding to a number of Most Significant Bits (MSBs) of an input digital signal, a second cell matrix for outputting a current of a signal corresponding to a number of Least Significant Bits (LSBs) of the input digital signal, an amplifier for amplifying the output current of the second cell matrix at a preset amplification, and an adder for adding the output current of the first cell matrix and the output current of the amplifier.
Abstract:
An analog baseband filter for a radio transceiver is provided. An analog baseband filter for a multi-mode multi-band radio transceiver includes a current-voltage conversion amplifier converting a current received at the analog baseband filter into a voltage and adjusting a gain of an output voltage of the current-voltage conversion amplifier using a plurality of resistors, and a source follower circuit compensating for temperature for the output voltage of the current-voltage conversion amplifier.
Abstract:
An operational amplifier circuit is provided. The operational amplifier circuit includes a differential amplifier of a cascade structure and a switched-capacitor type Common-Mode FeedBack (CMFB) circuit. The differential amplifier amplifies a difference between two input signals to output an anode output voltage and a negative output voltage. The switched-capacitor type CMFB circuit averages the anode output voltage and the negative output voltage of the differential amplifier, compares the average voltage with a reference voltage to generate a feedback signal based on a result of the comparison, and provides the feedback signal to the differential amplifier. Therefore, power consumption is reduced and a battery use time of a wireless terminal can be extended. Also, since an operational amplifier gain of each analog filter terminal is not negatively affected, a Direct Current (DC) offset is reduced, thereby improving signal quality.