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公开(公告)号：US20140353677A1
公开(公告)日：2014-12-04
申请号：US14294823
申请日：2014-06-03
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Young-jo TAK , Jae-kyun KIM , Joo-sung KIM , Jun-youn KIM , Young-soo PARK , Eun-ha LEE
CPC classification number: H01L21/0254 , H01L21/02381 , H01L21/02458 , H01L21/02505 , H01L33/007 , H01L33/12 , H01L33/325 , H01S5/0014 , H01S5/021 , H01S5/34333
Abstract: Provided are a low-defect semiconductor device and a method of manufacturing the same. The method includes forming a buffer layer on a silicon substrate, forming an interface control layer on the buffer layer under a first growth condition, and forming a nitride stack on the interface control layer under a second growth condition different from the first growth condition.
Abstract translation: 提供了一种低缺陷半导体器件及其制造方法。 该方法包括在硅衬底上形成缓冲层，在第一生长条件下在缓冲层上形成界面控制层，并在不同于第一生长条件的第二生长条件下，在界面控制层上形成氮化层。
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公开(公告)号：US20140042391A1
公开(公告)日：2014-02-13
申请号：US13839693
申请日：2013-03-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jun-youn KIM , Joo-sung KIM , Young-jo TAK
CPC classification number: H01L21/0254 , H01L21/02381 , H01L21/02458 , H01L21/0332 , H01L21/76802 , H01L23/562 , H01L29/15 , H01L29/1608 , H01L29/2003 , H01L29/66143 , H01L29/872 , H01L33/12 , H01L33/32 , H01L2924/0002 , H01L2924/00
Abstract: A semiconductor device includes a first coalescent layer, a second coalescent layer, a nitride stacked structure on the second coalescent layer, and a third layer between the first and second coalescent layers. The first coalescent layer includes a plurality of formations that are partially merged, and the third layer is disposed on the formations to allow a first type of stress to be generated in an area which includes the first coalescent layer and a second type of stress to be generated in an area which includes the second coalescent layer.
Abstract translation: 半导体器件包括第一聚结层，第二聚结层，第二聚结层上的氮化物层叠结构以及第一和第二聚结层之间的第三层。 第一聚结层包括部分合并的多个构造，并且第三层设置在地层上，以允许在包括第一聚结层和第二类型应力的区域中产生第一类型的应力 在包括第二聚结层的区域中产生。
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Patent Agency Ranking
公开(公告)号：US20220123047A1
公开(公告)日：2022-04-21
申请号：US17565615
申请日：2021-12-30
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Joo-sung KIM , Jong-uk Seo , Dong-gun Lee , Young-jo Tak
Abstract: A light emitting device package includes a cell array having a first surface and a second surface located opposite to the first surface and including, on a portion of a horizontal extension line of the first surface, semiconductor light emitting units each including a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer sequentially located on a layer surface including a sidewall of the first conductivity type semiconductor layer; wavelength converting units corresponding respectively to the semiconductor light emitting units and each arranged corresponding to the first conductivity type semiconductor layer; a barrier structure arranged between the wavelength converting units corresponding to the cell array; and switching units arranged in the barrier structure and electrically connected to the semiconductor light emitting units.
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公开(公告)号：US20140014990A1
公开(公告)日：2014-01-16
申请号：US13835921
申请日：2013-03-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jun-youn KIM , Jae-kyun KIM , Joo-sung KIM , Moon-seung YANG , Su-hee CHAE , Young-jo TAK , Hyun-gi HONG
IPC: H01L33/58
CPC classification number: H01L33/58 , H01L25/0753 , H01L33/382 , H01L33/62 , H01L2224/13 , H01L2933/0066
Abstract: Lights-emitting device (LED) packages, and methods of manufacturing the same, include at least one light-emitting structure. The at least one light-emitting structure includes a first compound semiconductor layer, an active layer, and a second compound semiconductor layer that are sequentially stacked, at least one first metal layer connected to the first compound semiconductor layer, a second metal layer connected to the second compound semiconductor layer, a substrate having a conductive bonding layer on a first surface of the substrate, and a bonding metal layer configured for eutectic bonding between the at least one first metal layer and the conductive bonding layer.
Abstract translation: 发光装置（LED）封装及其制造方法包括至少一个发光结构。 所述至少一个发光结构包括依次堆叠的第一化合物半导体层，有源层和第二化合物半导体层，连接到第一化合物半导体层的至少一个第一金属层，连接到第一化合物半导体层的第二金属层 所述第二化合物半导体层，在所述基板的第一表面上具有导电接合层的基板以及被配置为在所述至少一个第一金属层和所述导电接合层之间共晶接合的接合金属层。
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公开(公告)号：US20200027917A1
公开(公告)日：2020-01-23
申请号：US16244882
申请日：2019-01-10
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Joo-sung KIM , Jong-uk SEO , Dong-gun LEE , Young-jo TAK
Abstract: A light emitting device package includes a cell array having a first surface and a second surface located opposite to the first surface and including, on a portion of a horizontal extension line of the first surface, semiconductor light emitting units each including a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer sequentially located on a layer surface including a sidewall of the first conductivity type semiconductor layer; wavelength converting units corresponding respectively to the semiconductor light emitting units and each arranged corresponding to the first conductivity type semiconductor layer; a barrier structure arranged between the wavelength converting units corresponding to the cell array; and switching units arranged in the barrier structure and electrically connected to the semiconductor light emitting units.
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公开(公告)号：US20150079769A1
公开(公告)日：2015-03-19
申请号：US14559585
申请日：2014-12-03
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jun-youn KIM , Joo-sung KIM , Young-jo TAK
IPC: H01L21/02 , H01L23/00 , H01L21/033 , H01L21/768
CPC classification number: H01L21/0254 , H01L21/02381 , H01L21/02458 , H01L21/0332 , H01L21/76802 , H01L23/562 , H01L29/15 , H01L29/1608 , H01L29/2003 , H01L29/66143 , H01L29/872 , H01L33/12 , H01L33/32 , H01L2924/0002 , H01L2924/00
Abstract: A semiconductor device includes a first coalescent layer, a second coalescent layer, a nitride stacked structure on the second coalescent layer, and a third layer between the first and second coalescent layers. The first coalescent layer includes a plurality of formations that are partially merged, and the third layer is disposed on the formations to allow a first type of stress to be generated in an area which includes the first coalescent layer and a second type of stress to be generated in an area which includes the second coalescent layer.
Abstract translation: 半导体器件包括第一聚结层，第二聚结层，第二聚结层上的氮化物层叠结构以及第一和第二聚结层之间的第三层。 第一聚结层包括部分合并的多个构造，并且第三层设置在地层上，以允许在包括第一聚结层和第二类型应力的区域中产生第一类型的应力 在包括第二聚结层的区域中产生。
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7.发明申请SEMICONDUCTOR BUFFER STRUCTURE, SEMICONDUCTOR DEVICE INCLUDING THE SAME, AND MANUFACTURING METHOD THEREOF 有权半导体缓冲器结构，包括其的半导体器件及其制造方法公开(公告)号：US20140061663A1
公开(公告)日：2014-03-06
申请号：US13837460
申请日：2013-03-15
Applicant: SAMSUNG ELECTRONICS CO., LTD
Inventor： Jun-youn KIM , Joo-sung KIM , Moon-seung YANG
CPC classification number: H01L29/2003 , H01L21/02381 , H01L21/02458 , H01L21/02505 , H01L21/02507 , H01L21/0251 , H01L21/0254 , H01L29/267
Abstract: A semiconductor structure including a first nitride semiconductor layer, a second nitride semiconductor layer, and a third layer between the first nitride semiconductor layer and the second nitride semiconductor layer. The first nitride semiconductor layer has a first gallium composition ratio, the second nitride semiconductor layer has a second gallium composition ratio different from the first metal composition ratio, and the third layer has a third gallium composition ratio greater than at least one of the first gallium composition ratio or the second gallium composition ratio. The structure may also include a fourth layer for reducing tensile stress or increasing compression stress experienced by at least the second nitride semiconductor layer.
Abstract translation: 一种在第一氮化物半导体层和第二氮化物半导体层之间包括第一氮化物半导体层，第二氮化物半导体层和第三层的半导体结构。 第一氮化物半导体层具有第一镓组成比，第二氮化物半导体层具有与第一金属组成比不同的第二镓组成比，并且第三层具有大于第一镓的至少一种的第三镓组成比 组成比或第二镓组成比。 该结构还可以包括用于降低至少第二氮化物半导体层所经历的拉伸应力或增加压缩应力的第四层。
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