SEMICONDUCTOR DEVICES
    2.
    发明申请

    公开(公告)号:US20220181499A1

    公开(公告)日:2022-06-09

    申请号:US17398550

    申请日:2021-08-10

    摘要: A semiconductor device is provided. The semiconductor comprises an active pattern including a lower pattern and a plurality of sheet patterns that are spaced apart from the lower pattern in a first direction, a source/drain pattern on the lower pattern and in contact with the plurality of sheet patterns, and a gate structure on opposing sides of the source/drain pattern in a second direction different from the first direction, the gate structure including a gate electrode on the plurality of sheet patterns, wherein the source/drain pattern includes an epitaxial region that comprises a semiconductor material and a cavity region that is inside the epitaxial region and that is surrounded by the semiconductor material.

    SEMICONDUCTOR DEVICE
    3.
    发明申请

    公开(公告)号:US20220181459A1

    公开(公告)日:2022-06-09

    申请号:US17383022

    申请日:2021-07-22

    摘要: An integrated circuit device includes a substrate having source and drain recesses therein that are lined with respective silicon-germanium liners and filled with doped semiconductor source and drain regions. A stacked plurality of semiconductor channel layers are provided, which are separated vertically from each other within the substrate by corresponding buried insulated gate electrode regions that extend laterally between the silicon-germanium liners. An insulated gate electrode is provided on an uppermost one of the plurality of semiconductor channel layers. The silicon-germanium liners may be doped with carbon.

    Semiconductor devices
    4.
    发明授权

    公开(公告)号:US11670716B2

    公开(公告)日:2023-06-06

    申请号:US17337759

    申请日:2021-06-03

    摘要: A semiconductor device includes an active region extending in a first direction on a substrate, channel layers on the active region and spaced apart vertically, a gate structure intersecting the active region and the channel layers, the gate structure extending in a second direction and surrounding the channel layers, and a source/drain region on the active region at a side of the gate structure, the source/drain region contacting the channel layers, the source/drain region including first epitaxial layers having a first composition and including first layers on side surfaces of the channel layers and a second layer on the active region at a lower end of the source/drain region, and a second epitaxial layer having a second composition different from the first composition, the second epitaxial layer being between the first epitaxial layers in the first direction and being between the first epitaxial layers vertically in a third direction.

    Semiconductor devices
    8.
    发明授权

    公开(公告)号:US11031502B2

    公开(公告)日:2021-06-08

    申请号:US16708717

    申请日:2019-12-10

    摘要: A semiconductor device includes an active region extending in a first direction on a substrate, channel layers on the active region and spaced apart vertically, a gate structure intersecting the active region and the channel layers, the gate structure extending in a second direction and surrounding the channel layers, and a source/drain region on the active region at a side of the gate structure, the source/drain region contacting the channel layers, the source/drain region including first epitaxial layers having a first composition and including first layers on side surfaces of the channel layers and a second layer on the active region at a lower end of the source/drain region, and a second epitaxial layer having a second composition different from the first composition, the second epitaxial layer being between the first epitaxial layers in the first direction and being between the first epitaxial layers vertically in a third direction.

    Semiconductor device
    10.
    发明授权

    公开(公告)号:US11916123B2

    公开(公告)日:2024-02-27

    申请号:US17383022

    申请日:2021-07-22

    摘要: An integrated circuit device includes a substrate having source and drain recesses therein that are lined with respective silicon-germanium liners and filled with doped semiconductor source and drain regions. A stacked plurality of semiconductor channel layers are provided, which are separated vertically from each other within the substrate by corresponding buried insulated gate electrode regions that extend laterally between the silicon-germanium liners. An insulated gate electrode is provided on an uppermost one of the plurality of semiconductor channel layers. The silicon-germanium liners may be doped with carbon.