公开(公告)号：US10910275B2

公开(公告)日：2021-02-02

申请号：US16599313

申请日：2019-10-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gi Gwan Park ,  Jung Gun You ,  Ki Il Kim ,  Sug Hyun Sung ,  Myung Yoon Um

IPC: H01L21/8238 ,  H01L29/66 ,  H01L27/092 ,  H01L21/762 ,  H01L21/8234 ,  H01L29/78 ,  H01L29/165

Abstract: A method of manufacturing a semiconductor device includes forming a first fin-type pattern and a second fin-type pattern which are separated by a first trench between facing ends thereof, forming a first insulating layer filling the first trench, removing a portion of the first insulating layer to form a second trench on the first insulating layer, and forming a third trench by enlarging a width of the second trench.

公开(公告)号：US11211497B2

公开(公告)日：2021-12-28

申请号：US16848145

申请日：2020-04-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung Gun You ,  Dong Hyun Kim ,  Byoung-Gi Kim ,  Yun Suk Nam ,  Yeong Min Jeon ,  Sung Chui Park ,  Dae Won Ha

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/66 ,  H01L21/8238 ,  H01L21/762 ,  H01L23/532 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/165

Abstract: A semiconductor device includes first and second fin patterns on a substrate and extending apart from each other, a field insulating film on the substrate and surrounding parts of the first and second fin patterns, a first gate structure on the first fin pattern and intersecting the first fin pattern, a second gate structure on the second fin pattern and intersecting the second fin pattern, and a separating structure protruding from a top surface of the field insulating film and separating the first and second gate structures, the field insulating film and the separating structure including a same insulating material.

公开(公告)号：US20250140694A1

公开(公告)日：2025-05-01

申请号：US18813438

申请日：2024-08-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ki-Il Kim ,  Sug Hyun Sung ,  Myung Yoon Um ,  Jung Gun You

IPC: H01L23/528 ,  H01L21/768 ,  H01L21/8234 ,  H01L23/522 ,  H01L27/088 ,  H01L29/06 ,  H01L29/08

Abstract: A semiconductor device includes a back interlayer insulating film, a back wiring line disposed within the back interlayer insulating film, a fin-type pattern disposed on a first surface of the back wiring line, a source/drain pattern disposed on the fin-type pattern, and a back wiring contact connecting the back wiring line and source/drain pattern. A bottom surface of the source/drain pattern is connected to the fin-type pattern and faces the back wiring line. The back wiring contact includes a back contact barrier film, a back contact plug film, and a back ferroelectric material film. The back wiring contact includes a third surface facing the back wiring line. A vertical length from a second surface of the back wiring line to the third surface of the back wiring contact is less than a vertical length from the second surface to the bottom surface of the source/drain pattern.

公开(公告)号：US10727354B2

公开(公告)日：2020-07-28

申请号：US15944175

申请日：2018-04-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sung Il Park ,  Jung Gun You ,  Dong Hun Lee ,  Yun Il Lee

IPC: H01L29/78 ,  H01L29/786 ,  H01L29/06 ,  H01L29/66 ,  H01L29/49 ,  H01L29/423 ,  H01L29/08

Abstract: A semiconductor device includes a substrate; a vertical channel structure including a pair of active fins extended in a first direction, perpendicular to an upper surface of the substrate, and an insulating portion interposed between the pair of active fins; an upper source/drain disposed on the vertical channel structure; a lower source/drain disposed below the vertical channel structure and on the substrate; a gate electrode disposed between the upper source/drain and the lower source/drain and surrounding the vertical channel structure; and a gate dielectric layer disposed between the gate electrode and the vertical channel structure. An interval between the gate electrode and the upper source/drain may be smaller than an interval between the gate electrode and the lower source/drain in the first direction.

公开(公告)号：US20230207627A1

公开(公告)日：2023-06-29

申请号：US17938642

申请日：2022-10-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sug Hyun Sung ,  Jung Gun You ,  Mi Ri Joung

IPC: H01L29/08 ,  H01L29/06 ,  H01L29/66 ,  H01L29/786 ,  H01L29/775 ,  H01L29/40 ,  H01L29/417 ,  H01L29/423 ,  H01L27/092 ,  H01L21/8238

CPC classification number: H01L29/0847 ,  H01L29/0673 ,  H01L29/66439 ,  H01L29/78696 ,  H01L29/775 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/6656 ,  H01L29/401 ,  H01L29/41775 ,  H01L29/41733 ,  H01L29/42392 ,  H01L29/42368 ,  H01L27/092 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823857 ,  H01L21/823864

Abstract: There is provided a semiconductor device capable of improving the performance and reliability of a device. The semiconductor device comprising an active pattern including, a lower pattern extending in a first direction, and a plurality of sheet patterns spaced apart from the lower pattern in a second direction perpendicular to the first direction, wherein the lower pattern includes a semiconductor material, a plurality of gate structures on the lower pattern and spaced apart from each other in the first direction, wherein each of the plurality of gate structures includes a gate electrode and a gate insulating film, a source/drain recess between adjacent ones of the gate structures, wherein a bottom of the source/drain recess is in the lower pattern, a bottom insulating liner in the bottom of the source/drain recess, and a source/drain pattern in the source/drain recess and on top of the bottom insulating liner.

公开(公告)号：US11521900B2

公开(公告)日：2022-12-06

申请号：US17134710

申请日：2020-12-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gi Gwan Park ,  Jung Gun You ,  Ki Il Kim ,  Sug Hyun Sung ,  Myung Yoon Um

IPC: H01L21/8238 ,  H01L29/66 ,  H01L29/78 ,  H01L27/092 ,  H01L21/762 ,  H01L21/8234 ,  H01L29/165

Abstract: A method of manufacturing a semiconductor device includes forming a first fin-type pattern and a second fin-type pattern which are separated by a first trench between facing ends thereof, forming a first insulating layer filling the first trench, removing a portion of the first insulating layer to form a second trench on the first insulating layer, and forming a third trench by enlarging a width of the second trench.

公开(公告)号：US09679978B2

公开(公告)日：2017-06-13

申请号：US15272456

申请日：2016-09-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki Hwan Kim ,  Jung Gun You ,  Gi Gwan Park ,  Dong Suk Shin ,  Jin Wook Kim

IPC: H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119 ,  H01L29/417 ,  H01L27/088 ,  H01L29/78 ,  H01L29/45 ,  H01L29/66 ,  H01L21/8234

CPC classification number: H01L29/41791 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823821 ,  H01L27/0886 ,  H01L27/0924 ,  H01L29/0673 ,  H01L29/456 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785

Abstract: A semiconductor device includes a substrate having first and second regions, a first fin-type pattern and a second fin-type pattern formed in the first region and extending in a first direction, and a third fin-type pattern and a fourth fin-type pattern formed in the second region and extending in a third direction. A first source/drain is formed on the first fin-type pattern and a second source/drain region is formed on the second fin-type pattern. Each of first and second source/drains have a cross section defining a same convex polygonal shape. A third source/drain is formed on the third fin-type pattern and a fourth source/drain region is formed on the fourth fin-type pattern. Cross-sections of the third and fourth source/drains define different convex polygonal shapes from one another.

公开(公告)号：US20240038841A1

公开(公告)日：2024-02-01

申请号：US18188399

申请日：2023-03-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Gi Gwan PARK ,  Jung Gun You ,  Sun Jung Lee

IPC: H01L29/06 ,  H01L29/423 ,  H01L29/775 ,  H01L29/417

CPC classification number: H01L29/0673 ,  H01L29/42392 ,  H01L29/775 ,  H01L29/41733

Abstract: There is provided a semiconductor device capable of capable of improving element performance and reliability. A semiconductor device includes a lower conductive pattern disposed on a substrate, an upper conductive pattern disposed on the lower conductive pattern, and a first plug pattern disposed between the lower conductive pattern and the upper conductive pattern and connected to the lower conductive pattern and the upper conductive pattern. The first plug pattern includes a first barrier pattern that defines a first plug recess and a first plug metal pattern that fills the first plug recess, and the first plug metal pattern includes a first molybdenum pattern and a first tungsten pattern disposed on the first molybdenum pattern.

公开(公告)号：US10475707B2

公开(公告)日：2019-11-12

申请号：US15292790

申请日：2016-10-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gi Gwan Park ,  Jung Gun You ,  Ki II Kim ,  Sug Hyun Sung ,  Myung Yoon Um

IPC: H01L21/8238 ,  H01L21/762 ,  H01L29/66 ,  H01L27/092 ,  H01L21/8234 ,  H01L29/78 ,  H01L29/165

Abstract: A method of manufacturing a semiconductor device includes forming a first fin-type pattern and a second fin-type pattern which are separated by a first trench between facing ends thereof, forming a first insulating layer filling the first trench, removing a portion of the first insulating layer to form a second trench on the first insulating layer, and forming a third trench by enlarging a width of the second trench.

公开(公告)号：US10083965B2

公开(公告)日：2018-09-25

申请号：US15850183

申请日：2017-12-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki Hwan Kim ,  Gi Gwan Park ,  Jung Gun You ,  Dong Suk Shin ,  Hyun Yul Choi

IPC: H01L27/00 ,  H01L27/092 ,  H01L21/84 ,  H01L27/088 ,  H01L27/12 ,  H01L29/06 ,  H01L29/08 ,  H01L29/165 ,  H01L29/167 ,  H01L29/417 ,  H01L29/45 ,  H01L29/78 ,  H01L27/02

CPC classification number: H01L27/0924 ,  H01L21/823425 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/845 ,  H01L27/0207 ,  H01L27/0886 ,  H01L27/092 ,  H01L27/1211 ,  H01L29/0649 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/167 ,  H01L29/41766 ,  H01L29/41783 ,  H01L29/41791 ,  H01L29/456 ,  H01L29/78 ,  H01L29/7848 ,  H01L29/785

Abstract: The semiconductor device includes a substrate comprising first and second regions, in the first region, first and second gate electrodes formed parallel to each other on the substrate, and being spaced apart from each other by a first distance, in the second region, third and fourth gate electrodes formed parallel to each other on the substrate, and being spaced apart from each other by a second distance which is greater than the first distance, in the first region, a first recess formed on the substrate between the first and second gate electrodes, in the second region, a second recess formed on the substrate between the third and fourth gate electrodes, a first epitaxial source/drain filling the first recess and a second epitaxial source/drain filling the second recess, wherein an uppermost portion of an upper surface of the first epitaxial source/drain is higher than an uppermost portion of an upper surface of the second epitaxial source/drain.