公开(公告)号：US09704815B2

公开(公告)日：2017-07-11

申请号：US15156327

申请日：2016-05-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Mi-Na Choi ,  Young-Deuk Kim ,  Jae-Choon Kim ,  Eon-Soo Jang ,  Hee-Jung Hwang

IPC: H01L23/00 ,  H01L23/538 ,  H01L23/498 ,  H01L21/56 ,  H01L23/31

CPC classification number: H01L23/562 ,  H01L21/561 ,  H01L23/3121 ,  H01L23/49811 ,  H01L23/5386 ,  H01L24/16 ,  H01L24/48 ,  H01L24/49 ,  H01L24/81 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/16235 ,  H01L2224/48091 ,  H01L2224/48235 ,  H01L2224/49175 ,  H01L2224/81815 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/3511 ,  H01L2224/81 ,  H01L2224/85 ,  H01L2224/45099

Abstract: A package substrate may include an insulating substrate, internal circuits and a warpage-suppressing member. The insulating substrate may have a plurality of mount regions in which semiconductor chips may be mounted, and a peripheral region. The internal circuits may be arranged in the mount regions. The warpage-suppressing member is different from the semiconductor chips and may be arranged in at least one of the mount regions to suppress a warpage of the insulating substrate. Thus, warpage of the package substrate may be suppressed during a reflow process.

公开(公告)号：US09177887B2

公开(公告)日：2015-11-03

申请号：US14068091

申请日：2013-10-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Mi-Na Choi ,  Ji-Chul Kim ,  Se-Ran Bae ,  Eun-Seok Cho ,  Hee-Jung Hwang

IPC: H01L23/48 ,  H01L23/34 ,  G01R31/28 ,  H01L21/66 ,  H01L23/00

CPC classification number: H01L23/345 ,  G01R31/2875 ,  H01L22/34 ,  H01L23/34 ,  H01L24/16 ,  H01L2224/16225 ,  H01L2924/15311

Abstract: Semiconductor test devices and methods for fabricating the same may be provided. The semiconductor test device may include a first thermal test flip chip cell including a first heater and a first sensor, and a test substrate formed under the first thermal test flip chip cell. The first thermal test flip chip cell may include a plurality of first bumps arranged on a bottom surface of the first thermal test flip chip cell and be configured to be electrically connected to the first heater and the first sensor. The test substrate may include a first ball array arranged on a bottom surface of the test substrate in a first direction and be configured to be electrically connected to the plurality of first bumps, which are electrically connected to the first heater and the first sensor.

Abstract translation: 可以提供半导体测试装置及其制造方法。 半导体测试装置可以包括第一热测试倒装芯片单元，其包括第一加热器和第一传感器，以及形成在第一热测试倒装芯片单元下的测试基板。 第一热测试倒装芯片单元可以包括布置在第一热测试倒装芯片单元的底表面上的多个第一凸块，并且被配置为电连接到第一加热器和第一传感器。 测试基板可以包括在第一方向上布置在测试基板的底表面上的第一球阵列，并且被配置为电连接到电连接到第一加热器和第一传感器的多个第一凸块。