RESISTOR WITH DOPED REGIONS
    2.
    发明申请

    公开(公告)号:US20210175230A1

    公开(公告)日:2021-06-10

    申请号:US16911795

    申请日:2020-06-25

    摘要: A resistor includes a substrate including an active region protruding from an upper surface of the substrate and extending in a first horizontal direction, a doped region extending in the first horizontal direction on the active region and comprising a semiconductor layer with n-type impurities, a plurality of channel layers spaced apart from each other in a vertical direction on the active region and connected to the doped region, a first gate electrode and a second gate electrode extending in the second horizontal direction intersecting the first horizontal direction and surrounding the plurality of channel layers, a first contact plug and a second contact plug in contact with an upper surface of the doped region. The first contact plug is adjacent to the first gate electrode. The second contact plug is adjacent to the second gate electrode.

    RESISTOR WITH DOPED REGIONS
    4.
    发明申请

    公开(公告)号:US20220122965A1

    公开(公告)日:2022-04-21

    申请号:US17564593

    申请日:2021-12-29

    摘要: A resistor includes a substrate including an active region protruding from an upper surface of the substrate and extending in a first horizontal direction, a doped region extending in the first horizontal direction on the active region and comprising a semiconductor layer with n-type impurities, a plurality of channel layers spaced apart from each other in a vertical direction on the active region and connected to the doped region, a first gate electrode and a second gate electrode extending in the second horizontal direction intersecting the first horizontal direction and surrounding the plurality of channel layers, a first contact plug and a second contact plug in contact with an upper surface of the doped region. The first contact plug is adjacent to the first gate electrode. The second contact plug is adjacent to the second gate electrode.

    INTEGRATED CIRCUIT DEVICE
    6.
    发明公开

    公开(公告)号:US20240113182A1

    公开(公告)日:2024-04-04

    申请号:US18538575

    申请日:2023-12-13

    摘要: An integrated circuit device includes a fin-type active region disposed on a substrate and extending in a first horizontal direction, a gate line disposed on the fin-type active region and extending in a second horizontal direction intersecting the first horizontal direction, the gate line including, a connection protrusion portion including a protrusion top surface at a first vertical level from the substrate, and a main gate portion including a recess top surface extending in the second horizontal direction from the connection protrusion portion, the recess top surface being at a second vertical level lower than the first vertical level, a gate contact disposed on the gate line and connected to the connection protrusion portion, a source/drain region disposed on the fin-type active region and disposed adjacent to the gate line, and a source/drain contact disposed on the source/drain region.

    INTEGRATED CIRCUIT DEVICE
    7.
    发明申请

    公开(公告)号:US20220165857A1

    公开(公告)日:2022-05-26

    申请号:US17352973

    申请日:2021-06-21

    摘要: An integrated circuit device includes a fin-type active region disposed on a substrate and extending in a first horizontal direction, a gate line disposed on the fin-type active region and extending in a second horizontal direction intersecting the first horizontal direction, the gate line including, a connection protrusion portion including a protrusion top surface at a first vertical level from the substrate, and a main gate portion including a recess top surface extending in the second horizontal direction from the connection protrusion portion, the recess top surface being at a second vertical level lower than the first vertical level, a gate contact disposed on the gate line and connected to the connection protrusion portion, a source/drain region disposed on the fin-type active region and disposed adjacent to the gate line, and a source/drain contact disposed on the source/drain region.

    SEMICONDUCTOR DEVICES
    8.
    发明公开

    公开(公告)号:US20240096995A1

    公开(公告)日:2024-03-21

    申请号:US18231841

    申请日:2023-08-09

    摘要: A semiconductor device, may include an active region extending in a first direction; a plurality of channel layers on the active region to be spaced apart from each other; a gate structure, surrounding the plurality of channel layers, respectively; and source/drain regions on the active region on at least one side of the gate structure, and contacting the plurality of channel layers, wherein the gate structure may include an upper portion on an uppermost channel layer among the plurality of channel layers and lower portions between each of the plurality of channel layers in a region vertically overlapping the plurality of channel layers, wherein a width of each of the plurality of channel layers in the first direction may be less than a width of lower portions of the gate structure, adjacent to the respective channel layers among the lower portions of the gate structure in the first direction.

    INTEGRATED CIRCUIT DEVICE INCLUDING MULTI-CHANNEL TRANSISTOR

    公开(公告)号:US20240096955A1

    公开(公告)日:2024-03-21

    申请号:US18367852

    申请日:2023-09-13

    摘要: In some embodiments, an integrated circuit device includes a substrate, a fin-type active region on the substrate that extends in a first direction, a plurality of semiconductor patterns spaced apart from an upper surface of the fin-type active region and include a channel region, a gate electrode, and a gate cut insulating pattern. The gate electrode extends in a second direction on the fin-type active region and is disposed between the plurality of semiconductor patterns. The gate electrode includes a first sidewall extending in the second direction and a second sidewall extending in the first direction. The gate cut insulating pattern is on a second sidewall of the gate electrode. An upper portion of the gate cut insulating pattern is wider in the second direction than a lower portion of the gate cut insulating pattern. A portion of a sidewall of the gate cut insulating pattern is curved.

    SEMICONDUCTOR DEVICES
    10.
    发明申请

    公开(公告)号:US20220238723A1

    公开(公告)日:2022-07-28

    申请号:US17398504

    申请日:2021-08-10

    摘要: A semiconductor device includes a first source/drain, a second source/drain isolated from direct contact with the first source/drain in a horizontal direction, a channel extending between the first source/drain and the second source/drain, a gate surrounding the channel, an upper inner spacer between the gate and the first source/drain and above the channel, and a lower inner spacer between the gate and the first source/drain and under the channel, in which the channel includes a base portion extending between the first source/drain and the second source/drain, an upper protrusion portion protruding upward from a top surface of the base portion, and a lower protrusion portion protruding downward from a bottom surface of the base portion, and a direction in which a top end of the upper protrusion portion is isolated from direct contact with a bottom end of the lower protrusion portion is oblique with respect to a vertical direction.