公开(公告)号：US20190164774A1

公开(公告)日：2019-05-30

申请号：US16127443

申请日：2018-09-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang-Hyun LEE ,  Jeon-Il LEE ,  Sung-Woo KANG ,  Hong-Sik SHIN ,  Young-Mook OH ,  Seung-Min LEE

IPC: H01L21/311 ,  H01L21/02 ,  H01L21/768 ,  H01L21/033 ,  H01L21/8234

Abstract: An etching method includes providing a plasma of a first treatment gas to an etching-object to form a deposition layer on the etching-object, the first treatment gas including a fluorocarbon gas and an inert gas, and the etching-object including a first region including silicon oxide and a second region including silicon nitride, providing a plasma of an inert gas to the etching-object having the deposition layer thereon to activate an etching reaction of the silicon oxide, wherein a negative direct current voltage is applied to an opposing part that is spaced apart from the etching-object so as to face an etching surface of the etching-object, the opposing part including silicon, and subsequently, providing a plasma of a second treatment gas to remove an etching reaction product, the second treatment gas including an inert gas and an oxygen-containing gas.

公开(公告)号：US20180190780A1

公开(公告)日：2018-07-05

申请号：US15652396

申请日：2017-07-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Bok-Young LEE ,  Sung-Woo KANG ,  Sang-Hyun LEE ,  Hak-Yoon AHN ,  Young-Mook OH ,  In-Keun LEE ,  Seong-Han OH ,  Young-Hun CHOI

IPC: H01L29/417 ,  H01L29/78 ,  H01L29/08 ,  H01L29/45 ,  H01L21/8234 ,  H01L23/535 ,  H01L27/088

CPC classification number: H01L29/41791 ,  H01L21/823431 ,  H01L21/823475 ,  H01L23/535 ,  H01L27/088 ,  H01L29/0847 ,  H01L29/45 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/7848 ,  H01L29/7851

Abstract: A semiconductor device includes an active region in a shape of a fin extending in a first direction, the fin having source/drain regions spaced apart therein, gate structures crossing the fin between the source/drain regions, each including a gate electrode, a first contact structure in electrical contact with a first source/drain region, the first contact structure including a first lower contact and a first upper contact directly thereon, a second contact structure in electrical contact with a gate electrode of a gate structure, the second contact structure including a second lower contact and a second upper contact directly thereon, and a third contact structure in electrical contact with a gate electrode of a second gate structure and in electrical contact with a second source drain region, the third contact structure including a third lower contact and a third upper contact directly thereon.

公开(公告)号：US20160092022A1

公开(公告)日：2016-03-31

申请号：US14861156

申请日：2015-09-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang-Hyun LEE ,  Jun-Ik LEE ,  Woo-Kwang LEE

IPC: G06F3/041 ,  G06F3/044

CPC classification number: G06F3/044 ,  G06F3/0418 ,  G06F2203/04104

Abstract: Disclosed are an apparatus and a method for reducing a ghost touch in an electronic device. According to various embodiments, the electronic device includes a touch screen, and at least one processor implementing the method, which includes detecting touches to the touch screen, and detecting a ghost touch based on at least two of: a time interval between the touches detected through the touch screen, a distance between the touches, and a touch area of the touches.

Abstract translation: 公开了一种用于减少电子设备中的重影触摸的装置和方法。 根据各种实施例，电子设备包括触摸屏，以及实现该方法的至少一个处理器，其包括检测触摸屏的触摸，以及基于检测到的触摸之间的时间间隔中的至少两个来检测重影触摸 通过触摸屏，触摸之间的距离和触摸的触摸区域。

公开(公告)号：US20200027786A1

公开(公告)日：2020-01-23

申请号：US16282441

申请日：2019-02-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang-Hyun LEE ,  Sung-Woo KANG ,  Keun-Hee BAI ,  Hak-Yoon AHN ,  Seong-Han OH ,  Young-Mook OH

IPC: H01L21/768 ,  H01L27/11 ,  H01L27/088 ,  H01L23/535 ,  H01L29/49 ,  H01L29/51 ,  H01L21/8234

Abstract: A semiconductor device includes gates extending in a first direction on a substrate, each gate of the gates including a gate insulation layer, a gate electrode, and a first spacer, first contact plugs contacting the substrate between adjacent ones of the gates, the first contact plugs being spaced apart from sidewalls of corresponding ones of the gates, a second contact plug contacting an upper surface of a corresponding gate electrode, the second contact plug being between first contact plugs, and an insulation spacer in a gap between the second contact plug and an adjacent first contact plug, the insulation spacer contacting sidewalls of the second contact plug and the adjacent first contact plug, and upper surfaces of the second contact plug and the adjacent first contact plug being substantially coplanar with each other.

公开(公告)号：US20170358573A1

公开(公告)日：2017-12-14

申请号：US15687929

申请日：2017-08-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Doo-Young LEE ,  Sang-Hyun LEE ,  Myung-Hoon JUNG ,  Do-Hyoung KIM

IPC: H01L27/088 ,  H01L29/45 ,  H01L21/768 ,  H01L29/417 ,  H01L21/28 ,  H01L27/11 ,  H01L21/8234 ,  H01L27/02 ,  H01L29/78

CPC classification number: H01L27/088 ,  H01L21/28114 ,  H01L21/76804 ,  H01L21/76805 ,  H01L21/76831 ,  H01L21/76843 ,  H01L21/76897 ,  H01L21/823425 ,  H01L21/823475 ,  H01L23/485 ,  H01L27/0207 ,  H01L27/0886 ,  H01L27/1104 ,  H01L29/41758 ,  H01L29/41775 ,  H01L29/45 ,  H01L29/78

Abstract: A semiconductor device includes a first gate pattern and a second gate pattern on a substrate, the first gate pattern having a first height and the second gate pattern having a second height, an insulating pattern on the substrate covering the first and second gate patterns, the insulating pattern including a trench exposing the substrate between the first and second gate patterns, a spacer contacting at least a portion of a sidewall of the insulating pattern within the trench, the spacer spaced apart from the first and second gate patterns and having a third height larger than the first and second heights, and a contact structure filling the trench.

公开(公告)号：US20170118789A1

公开(公告)日：2017-04-27

申请号：US15401564

申请日：2017-01-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Woo-Kwang LEE ,  Yeon-Jung KIM ,  Sang-Hyun LEE ,  Jae-Bong CHUN ,  Sang-Bum HAN ,  Kyung-Tak HUR

IPC: H04W76/02 ,  H04W4/00 ,  H04W68/00 ,  H04B1/3827 ,  H04W4/10

CPC classification number: H04W76/15 ,  H04B1/385 ,  H04M1/7253 ,  H04M1/72597 ,  H04W4/10 ,  H04W4/80 ,  H04W8/245 ,  H04W68/005 ,  H04W84/042 ,  H04W88/04

Abstract: An electronic device comprising: a communication interface; a memory; and at least one processor coupled to the memory and the communication interface, wherein the at least one processor is configured to: detect a change of state of the electronic device; transmit to a secondary electronic device a first information item associated with the change of state of the electronic device; receive a second information item from the secondary electronic device in response to the first information item; and perform an operation based on the secondary information item.

公开(公告)号：US20220344331A1

公开(公告)日：2022-10-27

申请号：US17863042

申请日：2022-07-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： In-Keun LEE ,  Jong-Chul PARK ,  Sang-Hyun LEE

IPC: H01L27/088 ,  H01L29/66 ,  H01L29/78 ,  H01L21/768 ,  H01L21/8234

Abstract: A semiconductor device includes a substrate, a gate structure on the substrate, a first etch stop layer, a second etch stop layer, and an interlayer insulation layer that are stacked on the gate structure, and a contact plug penetrating the interlayer insulation layer, the second etch stop layer, and the first etch stop layer and contacting a sidewall of the gate structure. The contact plug includes a lower portion having a first width and an upper portion having a second width. A lower surface of the contact plug has a stepped shape.

公开(公告)号：US20180284842A1

公开(公告)日：2018-10-04

申请号：US15892592

申请日：2018-02-09

Applicant: Samsung Electronics Co., Ltd. ,  R.F.TECH CO., LTD.

Inventor： Yong-Hwa HAN ,  Sang-Jun AHN ,  Chung-Keun YOO ,  Ui-Jin LEE ,  Sang-Hyun LEE

IPC: G06F1/16

Abstract: According to various embodiments of the present disclosure, a docking station includes a base housing comprising a first surface having a recessed portion, a second surface directed in an opposite direction to the first surface, and a side surface at least partially surrounding a space between the first surface and the second surface, a slide housing slidably mounted on the recessed portion to open and close at least a part of the recessed portion, and a connection member disposed on the recessed portion, in which as the slide housing slides, the connection member is hidden or exposed, and in a state where the at least the part of the recessed portion is opened, the slide housing is positioned inclined with respect to the first surface or the second surface. The docking station described above may be implemented variously depending on embodiments.

公开(公告)号：US20150213038A1

公开(公告)日：2015-07-30

申请号：US14602962

申请日：2015-01-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyun-Young YANG ,  Hyung-Ki AHN ,  Han-Kil YOON ,  Sang-Hyun LEE ,  Yong-Whi LEE ,  Ji-Won LEE ,  Hak-Hyeon JEONG ,  Soo-Hwan CHAE

IPC: G06F17/30 ,  H04L29/08

CPC classification number: G06F16/958 ,  G06F11/1464 ,  H04L67/1097 ,  H04L67/22

Abstract: An apparatus and a method for storing and restoring data in an electronic device are provided. In a method for restoring data, an event page including at least one data is generated. Information for the event page is transmitted to a server. When occurrence of a display event is detected, a request signal for at least one event page corresponding to the display event is transmitted to the server. An event page provided from the server is displayed.

Abstract translation: 提供一种用于在电子设备中存储和恢复数据的装置和方法。 在恢复数据的方法中，生成包括至少一个数据的事件页面。 事件页面的信息被发送到服务器。 当检测到显示事件的发生时，将与显示事件对应的至少一个事件页面的请求信号发送到服务器。 显示从服务器提供的事件页面。

公开(公告)号：US20150140810A1

公开(公告)日：2015-05-21

申请号：US14497501

申请日：2014-09-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang-Hyun LEE ,  Myeong-Cheol KIM ,  Yoo-Jung LEE ,  IL-Sup KIM ,  Seung-Ju PARK

IPC: H01L21/768 ,  H01L21/311

CPC classification number: H01L21/76802 ,  H01L21/31144 ,  H01L21/76816 ,  H01L21/76877 ,  H01L21/76895

Abstract: A method of manufacturing a wiring includes sequentially forming a first insulation layer, a first layer, and a second layer on a substrate, etching an upper portion of the second layer a plurality of times to form a second layer pattern including a first recess having a shape of a staircase, etching a portion of the second layer pattern and a portion of the first layer under the first recess to form a first layer pattern including a second recess having a shape of a staircase similar to the first recess, etching a portion of the first layer pattern under the second recess to form a first opening exposing a portion of a top surface of the first insulation layer, etching the exposed portion of the first insulation layer to form a second opening through the first insulation layer, and forming a wiring filling the second opening.

Abstract translation: 一种制造布线的方法包括：在基板上依次形成第一绝缘层，第一层和第二层，多次蚀刻第二层的上部以形成第二层图案，该第二层图案包括具有第 形成阶梯，蚀刻第二层图案的一部分和在第一凹部下方的第一层的一部分，以形成第一层图案，该第一层图案包括具有类似于第一凹部的阶梯形状的第二凹部，蚀刻部分 在第二凹部下方的第一层图案，以形成暴露第一绝缘层的顶表面的一部分的第一开口，蚀刻第一绝缘层的暴露部分以形成穿过第一绝缘层的第二开口，以及形成布线 填补第二个开口。