公开(公告)号：US10475707B2

公开(公告)日：2019-11-12

申请号：US15292790

申请日：2016-10-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gi Gwan Park ,  Jung Gun You ,  Ki II Kim ,  Sug Hyun Sung ,  Myung Yoon Um

IPC: H01L21/8238 ,  H01L21/762 ,  H01L29/66 ,  H01L27/092 ,  H01L21/8234 ,  H01L29/78 ,  H01L29/165

Abstract: A method of manufacturing a semiconductor device includes forming a first fin-type pattern and a second fin-type pattern which are separated by a first trench between facing ends thereof, forming a first insulating layer filling the first trench, removing a portion of the first insulating layer to form a second trench on the first insulating layer, and forming a third trench by enlarging a width of the second trench.

公开(公告)号：US20210272815A1

公开(公告)日：2021-09-02

申请号：US17303062

申请日：2021-05-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chong Kwang Chang ,  Dong Hoon Khang ,  Sug Hyun Sung ,  Min Hwan Jeon

IPC: H01L21/308 ,  H01L21/8234 ,  H01L29/66

Abstract: A method of fabricating a semiconductor device is provided. The method includes: forming mask patterns on a substrate, the mask patterns including a first mask fin pattern, a second mask fin pattern and a dummy mask pattern between the first mask fin pattern and the second mask fin pattern; forming a first fin pattern, a second fin pattern and a dummy fin pattern by etching the substrate using the mask patterns; and removing the dummy fin pattern, wherein the dummy mask pattern is wider than each of the first mask fin pattern and the second mask fin pattern.

公开(公告)号：US10910275B2

公开(公告)日：2021-02-02

申请号：US16599313

申请日：2019-10-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gi Gwan Park ,  Jung Gun You ,  Ki Il Kim ,  Sug Hyun Sung ,  Myung Yoon Um

IPC: H01L21/8238 ,  H01L29/66 ,  H01L27/092 ,  H01L21/762 ,  H01L21/8234 ,  H01L29/78 ,  H01L29/165

Abstract: A method of manufacturing a semiconductor device includes forming a first fin-type pattern and a second fin-type pattern which are separated by a first trench between facing ends thereof, forming a first insulating layer filling the first trench, removing a portion of the first insulating layer to form a second trench on the first insulating layer, and forming a third trench by enlarging a width of the second trench.

公开(公告)号：US20250140694A1

公开(公告)日：2025-05-01

申请号：US18813438

申请日：2024-08-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ki-Il Kim ,  Sug Hyun Sung ,  Myung Yoon Um ,  Jung Gun You

IPC: H01L23/528 ,  H01L21/768 ,  H01L21/8234 ,  H01L23/522 ,  H01L27/088 ,  H01L29/06 ,  H01L29/08

Abstract: A semiconductor device includes a back interlayer insulating film, a back wiring line disposed within the back interlayer insulating film, a fin-type pattern disposed on a first surface of the back wiring line, a source/drain pattern disposed on the fin-type pattern, and a back wiring contact connecting the back wiring line and source/drain pattern. A bottom surface of the source/drain pattern is connected to the fin-type pattern and faces the back wiring line. The back wiring contact includes a back contact barrier film, a back contact plug film, and a back ferroelectric material film. The back wiring contact includes a third surface facing the back wiring line. A vertical length from a second surface of the back wiring line to the third surface of the back wiring contact is less than a vertical length from the second surface to the bottom surface of the source/drain pattern.

公开(公告)号：US12074031B2

公开(公告)日：2024-08-27

申请号：US17303062

申请日：2021-05-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chong Kwang Chang ,  Dong Hoon Khang ,  Sug Hyun Sung ,  Min Hwan Jeon

IPC: H01L21/308 ,  H01L21/8234 ,  H01L29/66

CPC classification number: H01L21/3086 ,  H01L21/823431 ,  H01L21/823468 ,  H01L29/6681

Abstract: A method of fabricating a semiconductor device is provided. The method includes: forming mask patterns on a substrate, the mask patterns including a first mask fin pattern, a second mask fin pattern and a dummy mask pattern between the first mask fin pattern and the second mask fin pattern; forming a first fin pattern, a second fin pattern and a dummy fin pattern by etching the substrate using the mask patterns; and removing the dummy fin pattern, wherein the dummy mask pattern is wider than each of the first mask fin pattern and the second mask fin pattern.

公开(公告)号：US11024509B2

公开(公告)日：2021-06-01

申请号：US16540726

申请日：2019-08-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chong Kwang Chang ,  Dong Hoon Khang ,  Sug Hyun Sung ,  Min Hwan Jeon

IPC: H01L21/8234 ,  H01L21/308 ,  H01L29/66

Abstract: A method of fabricating a semiconductor device is provided. The method includes: forming mask patterns on a substrate, the mask patterns including a first mask fin pattern, a second mask fin pattern and a dummy mask pattern between the first mask fin pattern and the second mask fin pattern; forming a first fin pattern, a second fin pattern and a dummy fin pattern by etching the substrate using the mask patterns; and removing the dummy fin pattern, wherein the dummy mask pattern is wider than each of the first mask fin pattern and the second mask fin pattern.

公开(公告)号：US20230207627A1

公开(公告)日：2023-06-29

申请号：US17938642

申请日：2022-10-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sug Hyun Sung ,  Jung Gun You ,  Mi Ri Joung

IPC: H01L29/08 ,  H01L29/06 ,  H01L29/66 ,  H01L29/786 ,  H01L29/775 ,  H01L29/40 ,  H01L29/417 ,  H01L29/423 ,  H01L27/092 ,  H01L21/8238

CPC classification number: H01L29/0847 ,  H01L29/0673 ,  H01L29/66439 ,  H01L29/78696 ,  H01L29/775 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/6656 ,  H01L29/401 ,  H01L29/41775 ,  H01L29/41733 ,  H01L29/42392 ,  H01L29/42368 ,  H01L27/092 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823857 ,  H01L21/823864

Abstract: There is provided a semiconductor device capable of improving the performance and reliability of a device. The semiconductor device comprising an active pattern including, a lower pattern extending in a first direction, and a plurality of sheet patterns spaced apart from the lower pattern in a second direction perpendicular to the first direction, wherein the lower pattern includes a semiconductor material, a plurality of gate structures on the lower pattern and spaced apart from each other in the first direction, wherein each of the plurality of gate structures includes a gate electrode and a gate insulating film, a source/drain recess between adjacent ones of the gate structures, wherein a bottom of the source/drain recess is in the lower pattern, a bottom insulating liner in the bottom of the source/drain recess, and a source/drain pattern in the source/drain recess and on top of the bottom insulating liner.

公开(公告)号：US11521900B2

公开(公告)日：2022-12-06

申请号：US17134710

申请日：2020-12-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gi Gwan Park ,  Jung Gun You ,  Ki Il Kim ,  Sug Hyun Sung ,  Myung Yoon Um

IPC: H01L21/8238 ,  H01L29/66 ,  H01L29/78 ,  H01L27/092 ,  H01L21/762 ,  H01L21/8234 ,  H01L29/165

Abstract: A method of manufacturing a semiconductor device includes forming a first fin-type pattern and a second fin-type pattern which are separated by a first trench between facing ends thereof, forming a first insulating layer filling the first trench, removing a portion of the first insulating layer to form a second trench on the first insulating layer, and forming a third trench by enlarging a width of the second trench.

公开(公告)号：US10032864B2

公开(公告)日：2018-07-24

申请号：US15292515

申请日：2016-10-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyung Seok Min ,  Mi Gyeong Gwon ,  Seong Jin Nam ,  Sug Hyun Sung ,  Young Hoon Song ,  Young Mook Oh

IPC: H01L29/78 ,  H01L29/06 ,  H01L21/762 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/08 ,  H01L29/16 ,  H01L29/161 ,  H01L21/311 ,  H01L29/165 ,  H01J37/32

Abstract: Semiconductor devices are provided. The semiconductor device includes a first fin and a second fin on a substrate and a field insulation layer between the first fin and the second fin. The field insulation layer include a first insulation layer and a second insulation layer on the first insulation layer and connected to the first insulation layer. The second insulation layer is wider than the first insulation layer. A ratio of a top width to a bottom width of each of the first fin and the second fin exceeds 0.5.