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Patent Agency Ranking
公开(公告)号：US20230371392A1
公开(公告)日：2023-11-16
申请号：US18118571
申请日：2023-03-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Yoonyoung LEE , Sanghwan Park , Yongsung Park , Jeongheon Park , Hyeonwoo Seo
Abstract: A magnetoresistive memory device includes: a lower electrode; a lower magnetic material layer on the lower electrode; a tunnel barrier layer on the lower magnetic material layer; an upper magnetic material layer on the tunnel barrier layer; a cap structure, on the upper magnetic material layer, including first layers and second layers, alternately layered; a cap conductive layer on the cap structure; and an upper electrode on the cap conductive layer, wherein the first layers include a first material including a non-magnetic material, and the second layers include a second material including a magnetic material.
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公开(公告)号：US20240105657A1
公开(公告)日：2024-03-28
申请号：US18240273
申请日：2023-08-30
Applicant: Samsung Electronics Co., Ltd.
Inventor： Hansung Ryu , Yongsung Park , Jongbeom Park , Junho Lee , Jihyun Lee
IPC: H01L23/00
CPC classification number: H01L24/13 , H01L24/16 , H01L2224/13013 , H01L2224/13014 , H01L2224/13113 , H01L2224/13541 , H01L2224/13583 , H01L2224/16145 , H01L2224/16227 , H01L2924/384
Abstract: A semiconductor package includes a first substrate, a first bonding pad on the first substrate, a solder ball on the first bonding pad, and a blocking layer on the solder ball, wherein a thickness of the blocking layer varies in a direction away from the first substrate.
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公开(公告)号：US20230223327A1
公开(公告)日：2023-07-13
申请号：US18076137
申请日：2022-12-06
Applicant: Samsung Electronics Co., Ltd.
Inventor： Minkyeong Park , Yongsung Park
IPC: H01L23/498 , H01L23/00 , H01L25/065
CPC classification number: H01L23/49838 , H01L24/73 , H01L24/48 , H01L24/32 , H01L24/33 , H01L24/49 , H01L25/0657 , H01L24/16 , H01L23/49816 , H01L2225/06506 , H01L2225/0651 , H01L2225/06524 , H01L2225/06562 , H01L2225/06513 , H01L2225/06541 , H01L2924/1438 , H01L2924/15311 , H01L2924/15313 , H01L2224/73204 , H01L2224/73215 , H01L2224/73265 , H01L2224/73253 , H01L2225/06568 , H01L2224/48147 , H01L2224/48227 , H01L2224/32145 , H01L2224/32225 , H01L2224/16145 , H01L2224/16227 , H01L2224/48011 , H01L2224/48091 , H01L2224/4903 , H01L2224/49052 , H01L2224/3201 , H01L2224/3303 , H01L23/49822
Abstract: A package base substrate includes a base layer; a plurality of lower surface connection pads disposed on a lower surface of the base layer; a plurality of lower surface wiring patterns disposed on a lower surface of the base layer and respectively connected to a set of lower surface connection pads of the plurality of lower surface connection pads; and a lower surface solder resist layer covering a portion of each of the plurality of lower surface connection pads and the plurality of lower surface wiring patterns on a lower surface of the base layer, wherein each of at least some of the lower surface connection pads of the set of lower surface connection pads has a teardrop shape in a plan view, and includes a ball land portion having a planar circular shape, including a terminal contact portion exposed without being covered by the lower surface solder resist layer, and an edge portion surrounding the terminal contact portion and covered by the lower surface solder resist layer; and a connection reinforcement portion between the ball land portion and the lower surface wiring pattern, including an extension line portion having a width that is the same as a line width of the lower surface wiring pattern and extending from the ball land portion to the lower surface wiring pattern, and a corner reinforcement portion filling a corner between the ball land portion and the extension line portion, and wherein an extension length of the extension line portion has a value greater than a radius of the terminal contact portion.
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公开(公告)号：US20220158085A1
公开(公告)日：2022-05-19
申请号：US17358435
申请日：2021-06-25
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sanghwan Park , Jaehoon Kim , Yongsung Park , Hyeonwoo Seo , Sechung Oh , Hyun Cho
Abstract: A magnetic memory device including a magnetic tunnel junction is provided. The magnetic tunnel junction includes a fixed layer, a polarization enhancement structure on the fixed layer, a tunnel barrier layer on the polarization enhancement structure, and a free layer on the tunnel barrier layer, wherein the polarization enhancement structure includes a plurality of polarization enhancement layers and at least one spacer layer which separates the plurality of polarization enhancement layers from each other. A thickness of each of the plurality of polarization enhancement layers is from 5 Å to about 20 Å, and a thickness of the at least one spacer layer is from about 2 Å to about 15 Å.
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公开(公告)号：US11944014B2
公开(公告)日：2024-03-26
申请号：US17358435
申请日：2021-06-25
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sanghwan Park , Jaehoon Kim , Yongsung Park , Hyeonwoo Seo , Sechung Oh , Hyun Cho
CPC classification number: H10N50/10 , G11C11/161 , H10B61/22 , H10N50/80 , H10N50/85
Abstract: A magnetic memory device including a magnetic tunnel junction is provided. The magnetic tunnel junction includes a fixed layer, a polarization enhancement structure on the fixed layer, a tunnel barrier layer on the polarization enhancement structure, and a free layer on the tunnel barrier layer, wherein the polarization enhancement structure includes a plurality of polarization enhancement layers and at least one spacer layer which separates the plurality of polarization enhancement layers from each other. A thickness of each of the plurality of polarization enhancement layers is from 5 Å to about 20 Å, and a thickness of the at least one spacer layer is from about 2 Å to about 15 Å.
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