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    Compensated semiconductor pressure sensor
    5.
    发明授权
    Compensated semiconductor pressure sensor 有权
    补偿半导体压力传感器

    公开(公告)号：US06229190B1

    公开(公告)日：2001-05-08

    申请号：US09216073

    申请日：1998-12-18

    申请人： Janusz Bryzek ,  David W. Burns ,  Steven S. Nasiri ,  Sean S. Cahill

    发明人： Janusz Bryzek ,  David W. Burns ,  Steven S. Nasiri ,  Sean S. Cahill

    IPC分类号： H01L2982

    CPC分类号： G01L19/147 ,  G01L9/0042 ,  G01L9/0054 ,  G01L19/0038 ,  G01L19/143 ,  G01P2015/084 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/16151 ,  H01L2924/16195 ,  H01L2924/00014

    摘要： A semiconductor pressure sensor compatible with fluid and gaseous media applications is described. The semiconductor pressure sensor includes a sensor capsule having a semiconductor die and a silicon cap that is bonded to the semiconductor die. The semiconductor die includes a diaphragm that incorporates piezoresistive sensors thereon, and a stress isolation mechanism for isolating the diaphragm from packaging and mounting stresses. The silicon cap includes a cavity for allowing the diaphragm to deflect. The semiconductor pressure sensor further includes a pressure port that is hermetically attached to the semiconductor die. The sensor capsule and pressure port may be incorporated into a plastic housing. In one embodiment, the silicon cap is bonded to the semiconductor die to form an integral pressure reference. In an alternative embodiment, a second pressure port is provided for allowing gage or differential pressure measurements. A technique for incorporating the piezoresistive sensors is also described. An ASIC may be optionally attached to the silicon cap, and/or active electronic circuitry may be fabricated on the semiconductor die or silicon cap. Additional coatings may be optionally applied to the pressure port and semiconductor die for enhancing chemical resistance.

    摘要翻译： 描述了与流体和气体介质应用相兼容的半导体压力传感器。 半导体压力传感器包括具有半导体管芯和粘合到半导体管芯上的硅帽的传感器封装。 半导体管芯包括在其上结合有压阻传感器的隔膜以及用于将隔膜与封装和安装应力隔离的应力隔离机构。 硅帽包括用于允许隔膜偏转的空腔。 半导体压力传感器还包括气密地附接到半导体管芯的压力端口。 传感器胶囊和压力端口可以结合到塑料外壳中。 在一个实施例中，硅帽结合到半导体管芯以形成整体的压力参考。 在替代实施例中，提供了用于允许量规或差压测量的第二压力端口。 还描述了一种用于结合压阻传感器的技术。 ASIC可以可选地附接到硅帽，和/或有源电子电路可以制造在半导体管芯或硅帽上。 另外的涂层可以任选地施加到压力端口和半导体管芯上以提高耐化学性。

    Method for forming a semiconductor sensor
    6.
    发明授权
    Method for forming a semiconductor sensor 失效
    半导体传感器的形成方法

    公开(公告)号：US5484745A

    公开(公告)日：1996-01-16

    申请号：US141055

    申请日：1993-10-26

    申请人： Sean S. Cahill

    发明人： Sean S. Cahill

    IPC分类号： G01L9/12 ,  G01L9/00 ,  H01L29/84 ,  H01L27/20

    CPC分类号： G01L9/0042 ,  Y10S148/012 ,  Y10S148/159 ,  Y10S438/928 ,  Y10S438/977

    摘要： A method for forming at least one corrugation member in a semiconductor material, contains the step of: forming a semiconductor material layer onto a substrate, masking a first surface of the semiconductor material, etching the first surface to form first cavity thereon, removing a mask from the semiconductor material, masking the first surface and second surface of the semiconductor material, etching the second surface to form second cavity thereon, the second cavity being defined into the first cavity, removing the mask from the semiconductor material, depositing a specified masking material selected in accordance with a characteristic of the substrate onto the semiconductor material, etching an unmasked portion of the semiconductor material and depositing the same material as the abovementioned specified masking material selected in accordance with a characteristic of the substrate onto the semiconductor material and the specified masking material which has been deposited onto the semiconductor to form the corrugation member.

    摘要翻译： 一种用于在半导体材料中形成至少一个波纹构件的方法，包括以下步骤：在衬底上形成半导体材料层，掩蔽半导体材料的第一表面，蚀刻第一表面以在其上形成第一腔，去除掩模 从所述半导体材料掩蔽所述半导体材料的第一表面和第二表面，蚀刻所述第二表面以在其上形成第二腔，所述第二腔被限定到所述第一腔中，从所述半导体材料移除所述掩模，沉积特定的掩蔽材料 根据衬底的特性被选择到半导体材料上，蚀刻半导体材料的未掩模部分并将与根据衬底的特性选择的上述指定掩模材料相同的材料沉积到半导体材料上并且将特定掩模 已经沉积在s上的材料 以形成波纹构件。

    Chip-scale packaged pressure sensor
    8.
    发明授权
    Chip-scale packaged pressure sensor 失效
    芯片级封装压力传感器

    公开(公告)号：US06346742B1

    公开(公告)日：2002-02-12

    申请号：US09190500

    申请日：1998-11-12

    申请人： Janusz Bryzek ,  David W. Burns ,  Sean S. Cahill ,  Steven S. Nasiri

    发明人： Janusz Bryzek ,  David W. Burns ,  Sean S. Cahill ,  Steven S. Nasiri

    IPC分类号： H01L2312

    CPC分类号： G01L19/147 ,  G01L19/0038 ,  G01P2015/0828 ,  H01L2224/48091 ,  H01L2924/01322 ,  H01L2924/10253 ,  H01L2924/00014 ,  H01L2924/00

    摘要： A chip-scale sensor package is described. In one embodiment, the chip-scale sensor package includes a semiconductor substrate having a sensor region, and a semiconductor cap having a recess. The semiconductor cap is bonded to the semiconductor substrate with a thermocompression bond to form a cavity therebetween. The semiconductor substrate is bonded to the semiconductor cap using different types of materials. The semiconductor substrate and/or the semiconductor cap may optionally include a semiconductor device such as an electronically trimmable integrated circuit fabricated thereon. In addition, the semiconductor substrate may optionally include an integral stress isolation flexible region for isolation of the sensor region.

    摘要翻译： 描述了芯片级传感器封装。 在一个实施例中，芯片级传感器封装包括具有传感器区域的半导体衬底和具有凹部的半导体盖。 半导体盖通过热压接合到半导体衬底上以在其间形成空腔。 使用不同类型的材料将半导体衬底接合到半导体帽。 半导体衬底和/或半导体帽可以可选地包括诸如其上制造的电子可调整体集成电路的半导体器件。 此外，半导体衬底可以可选地包括用于隔离传感器区域的整体应力隔离柔性区域。

    Piezoresistive pressure sensor with sculpted diaphragm
    9.
    发明授权
    Piezoresistive pressure sensor with sculpted diaphragm 失效
    压电式压力传感器，带雕刻膜片

    公开(公告)号：US6006607A

    公开(公告)日：1999-12-28

    申请号：US144118

    申请日：1998-08-31

    申请人： Janusz Bryzek ,  David W. Burns ,  Sean S. Cahill ,  Steven S. Nasiri ,  James B. Starr

    发明人： Janusz Bryzek ,  David W. Burns ,  Sean S. Cahill ,  Steven S. Nasiri ,  James B. Starr

    IPC分类号： G01L9/00 ,  G01L9/06

    CPC分类号： G01L9/0042 ,  G01L9/0054

    摘要： The present invention is a semiconductor pressure sensor. In one embodiment, the semiconductor pressure sensor includes a diaphragm having a first thickness and at least cone raised boss that is coupled to a first side of the diaphragm. The at least one raised boss increases the diaphragm thickness in the region occupied by the at least one raised boss to a second thickness. A plurality of piezoresistors are disposed on a second side of the diaphragm in regions of the first thickness. In another embodiment, a semiconductor pressure sensor diaphragm includes at least one raised boss disposed along a central axis on a first side of the diaphragm. At least two raised bridge regions are disposed along the central axis, interconnecting the at least one raised boss and a diaphragm edge. Each raised bridge region is narrower than the raised boss. A plurality of piezoresistors are disposed on the raised bridge regions of the diaphragm along the central axis.

    摘要翻译： 本发明是半导体压力传感器。 在一个实施例中，半导体压力传感器包括具有第一厚度和至少锥形凸起的隔膜，该凸起联接到隔膜的第一侧。 所述至少一个凸起凸台将所述至少一个凸起凸起所占据的区域中的隔膜厚度增加到第二厚度。 多个压电电阻器设置在第一厚度的区域中的隔膜的第二侧上。 在另一个实施例中，半导体压力传感器膜片包括至少一个凸起的凸起部分，其沿着中心轴线设置在隔膜的第一侧上。 至少两个凸起的桥接区域沿着中心轴线布置，将至少一个凸起的凸起和隔膜边缘互连。 每个凸起的桥梁区域比凸起的凸起更窄。 多个压电电阻器沿着中心轴设置在隔膜的凸起的桥接区域上。

    Semiconductor sensor anodic-bonding process, wherein bonding of corrugation is prevented
    10.
    发明授权
    Semiconductor sensor anodic-bonding process, wherein bonding of corrugation is prevented 失效
    半导体传感器阳极结合工艺，其中防止了波纹的接合

    公开(公告)号：US5545594A

    公开(公告)日：1996-08-13

    申请号：US141054

    申请日：1993-10-26

    申请人： Sean S. Cahill

    发明人： Sean S. Cahill

    IPC分类号： G01L9/12 ,  G01L9/00 ,  H01L29/84 ,  H01L21/46 ,  H01G7/00

    CPC分类号： G01L9/0073 ,  G01L9/0042

    摘要： A method for bonding a silicon substrate and a glass substrate through an anodic-bonding process, including steps of: forming at least two holes in the glass substrate; forming a recess on the glass substrate, the recess confronting an undesired bonding portion defined in the silicon substrate; depositing a metal layer on the glass substrate with a predetermined pattern; depositing a dielectric layer on the metal layer, the insulating layer covering substantially the entire surface of the metal layer; and bonding the glass substrate and the semiconductor material.

    摘要翻译： 一种通过阳极结合工艺粘合硅衬底和玻璃衬底的方法，包括以下步骤：在玻璃衬底中形成至少两个孔; 在所述玻璃基板上形成凹部，所述凹部面对限定在所述硅基板中的不期望的结合部; 以预定图案在玻璃基板上沉积金属层; 在所述金属层上沉积介电层，所述绝缘层基本上覆盖所述金属层的整个表面; 并且接合玻璃基板和半导体材料。