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公开(公告)号:US20210159342A1
公开(公告)日:2021-05-27
申请号:US16493491
申请日:2018-03-15
发明人: Yoshinobu ASAMI
IPC分类号: H01L29/786 , H01L29/221 , H01L29/66
摘要: A semiconductor device capable of miniaturization or high integration and manufacture of a semiconductor device are provided. The semiconductor device includes a first insulator; an oxide over the first insulator; a second insulator and first and second conductors over the oxide; a third conductor over the second insulator; a fourth conductor over the first conductor; a fifth conductor over the second conductor; a third insulator over the first insulator and the first and second conductors; a fourth insulator over the second and third insulators and the third conductor; and a fifth insulator over the fourth insulator. The first and second conductors are provided to face each other with the second insulator therebetween. The second insulator is provided along an inner wall of an opening provided in the third insulator, facing side surfaces of the first and second conductors, and a top surface of the oxide. The level of a top surface of the third conductor is higher than the levels of top surfaces of the second and third insulators. The fourth insulator is provided along the top surfaces of the second and third insulators and the top surface and a side surface of the third conductor.
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公开(公告)号:US20200295196A1
公开(公告)日:2020-09-17
申请号:US16888904
申请日:2020-06-01
发明人: Yoshinobu ASAMI
IPC分类号: H01L29/786 , H01L29/423 , H01L29/66 , H01L21/02 , H01L21/465 , H01L21/3115 , H01L21/469 , H01L27/12
摘要: A semiconductor device with low parasitic capacitance is provided. The semiconductor device includes a first oxide insulator, an oxide semiconductor, a second oxide insulator, a gate insulating layer, a gate electrode layer, source and drain electrode layers and an insulating layer. The oxide semiconductor includes first to fifth regions. The first region overlaps with the source electrode layer. The second region overlaps with the drain electrode layer. The third region overlaps with the gate electrode layer. The fourth region is between the first region and the third region. The fifth region is between the second region and the third region. The fourth region and the fifth region each contain an element N (N is hydrogen, nitrogen, helium, neon, argon, krypton, or xenon). A top surface of the insulating layer is positioned at a lower level than top surfaces of the source and drain electrode layers.
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公开(公告)号:US20200161309A1
公开(公告)日:2020-05-21
申请号:US16626708
申请日:2018-06-29
发明人: Yoshinobu ASAMI
IPC分类号: H01L27/108 , H01L29/24 , G11C11/405
摘要: A semiconductor device with a large storage capacity per unit area can be provided. A memory cell including a first transistor, a second transistor, a third transistor, a fourth transistor, a first capacitor, and a second capacitor includes a stack including a first conductor, a first insulator over the first conductor, a second conductor over the first insulator, a second insulator over the second conductor, and a third conductor over the second insulator; a first oxide arranged in a ring-like shape on a side surface of an opening portion of the second conductor; a fourth conductor arranged in a ring-like shape in contact with an inner wall of the first oxide; a cylindrical third insulator arranged to penetrate the stack, the first oxide, and the fourth conductor; and a second oxide arranged in contact with an inner wall of the third insulator.
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公开(公告)号:US20160284859A1
公开(公告)日:2016-09-29
申请号:US15081251
申请日:2016-03-25
发明人: Yoshinobu ASAMI
IPC分类号: H01L29/786 , H01L21/4757 , H01L29/06 , H01L21/467 , H01L29/423 , H01L29/66
CPC分类号: H01L29/7869 , H01L21/02063 , H01L21/02554 , H01L21/02565 , H01L21/0262 , H01L21/02631 , H01L21/31155 , H01L21/465 , H01L21/469 , H01L27/1207 , H01L29/42384 , H01L29/66969 , H01L29/78603 , H01L29/78648 , H01L29/78696
摘要: A semiconductor device with low parasitic capacitance is provided. The semiconductor device includes a first oxide insulator, an oxide semiconductor, a second oxide insulator, a gate insulating layer, a gate electrode layer, source and drain electrode layers and an insulating layer. The oxide semiconductor includes first to fifth regions. The first region overlaps with the source electrode layer. The second region overlaps with the drain electrode layer. The third region overlaps with the gate electrode layer. The fourth region is between the first region and the third region. The fifth region is between the second region and the third region. The fourth region and the fifth region each contain an element N (N is hydrogen, nitrogen, helium, neon, argon, krypton, or xenon). A top surface of the insulating layer is positioned at a lower level than top surfaces of the source and drain electrode layers.
摘要翻译: 提供具有低寄生电容的半导体器件。 半导体器件包括第一氧化物绝缘体,氧化物半导体,第二氧化物绝缘体,栅极绝缘层,栅极电极层,源极和漏极电极层以及绝缘层。 氧化物半导体包括第一至第五区域。 第一区域与源电极层重叠。 第二区域与漏电极层重叠。 第三区域与栅电极层重叠。 第四区域在第一区域和第三区域之间。 第五区域在第二区域和第三区域之间。 第四区域和第五区域各自含有元素N(N是氢,氮,氦,氖,氩,氪或氙)。 绝缘层的顶表面位于比源极和漏极电极层的顶表面更低的水平。
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公开(公告)号:US20160005740A1
公开(公告)日:2016-01-07
申请号:US14844069
申请日:2015-09-03
IPC分类号: H01L27/108
CPC分类号: H01L27/1082 , B82Y10/00 , G11C11/34 , G11C13/0014 , G11C2213/79 , H01L23/4828 , H01L27/105 , H01L27/1203 , H01L27/1244 , H01L27/28 , H01L29/458 , H01L29/7869 , H01L2924/0002 , H01L2924/00
摘要: A semiconductor device that can transmit and receive data without contact is popular partly as some railway passes, electronic money cards, and the like; however, it has been a prime task to provide an inexpensive semiconductor device for further popularization. In view of the above current conditions, a semiconductor device of the present invention includes a memory with a simple structure for providing an inexpensive semiconductor device and a manufacturing method thereof. A memory element included in the memory includes a layer containing an organic compound, and a source electrode or a drain electrode of a TFT provided in the memory element portion is used as a conductive layer which forms a bit line of the memory element.
摘要翻译: 可以在没有接触的情况下发送和接收数据的半导体器件部分地受到一些铁路通行证,电子货币卡等的普及; 然而,提供便宜的半导体器件以进一步普及是主要的任务。 鉴于上述现有条件,本发明的半导体器件包括具有用于提供便宜的半导体器件的简单结构的存储器及其制造方法。 包括在存储器中的存储元件包括含有有机化合物的层,并且将设置在存储元件部分中的TFT的源电极或漏电极用作形成存储元件的位线的导电层。
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公开(公告)号:US20240334747A1
公开(公告)日:2024-10-03
申请号:US18580254
申请日:2022-07-15
发明人: Hayato YAMAWAKI , Sachiko KAWAKAMI , Eriko AOYAMA , Miki KURIHARA , Yoshinobu ASAMI , Takahiro FUJIE , Ryo TAGASHIRA
IPC分类号: H10K59/122 , H10K59/12
CPC分类号: H10K59/122 , H10K59/1201
摘要: A display apparatus-including a first pixel, a second pixel adjacent to the first pixel, a first insulating layer, and a second insulating layer over the first insulating layer is provided. The first pixel includes a first pixel electrode, a first EL layer covering the first pixel electrode, a third insulating layer over the first EL layer, and a common electrode over the first EL layer. The common electrode is in contact with part of the top surface of the first EL layer. The first EL layer contains a first organic compound. The amount of an organic compound that includes an oxide of the first organic compound or a partial structure of the first organic compound and is contained in the first EL layer is greater than 0 and less than or equal to 1/10 of an amount of the first organic compound contained in the first EL layer.
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公开(公告)号:US20220157818A1
公开(公告)日:2022-05-19
申请号:US17509157
申请日:2021-10-25
IPC分类号: H01L27/105 , H01L27/12 , H01L29/786
摘要: A first transistor, a second transistor, a capacitor, and first to third conductors are included. The first transistor includes a first gate, a source, and a drain. The second transistor includes a second gate, a third gate over the second gate, first and second low-resistance regions, and an oxide sandwiched between the second gate and the third gate. The capacitor includes a first electrode, a second electrode, and an insulator sandwiched therebetween. The first low-resistance region overlaps with the first gate. The first conductor is electrically connected to the first gate and is connected to a bottom surface of the first low-resistance region. The capacitor overlaps with the first low-resistance region. The second conductor is electrically connected to the drain. The third conductor overlaps with the second conductor and is connected to the second conductor and a side surface of the second low-resistance region.
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公开(公告)号:US20210126130A1
公开(公告)日:2021-04-29
申请号:US16643453
申请日:2018-08-24
发明人: Shunpei YAMAZAKI , Yoshinobu ASAMI , Takahisa ISHIYAMA , Motomu KURATA , Ryo TOKUMARU , Noritaka ISHIHARA , Yusuke NONAKA
IPC分类号: H01L29/786 , H01L29/22 , H01L29/66
摘要: A semiconductor device with favorable reliability is provided. The semiconductor device includes a first insulator; a second insulator positioned over the first insulator; an oxide positioned over the second insulator; a first conductor and a second conductor positioned apart from each other over the oxide; a third insulator positioned over the oxide, the first conductor, and the second conductor; a third conductor positioned over the third insulator and at least partly overlapping with a region between the first conductor and the second conductor; a fourth insulator positioned to cover the oxide, the first conductor, the second conductor, the third insulator, and the third conductor; a fifth insulator positioned over the fourth insulator; and a sixth insulator positioned over the fifth insulator. An opening reaching the second insulator is formed in at least part of the fourth insulator; the fifth insulator is in contact with the second insulator through the opening; and the first insulator, the fourth insulator, and the sixth insulator have a lower oxygen permeability than the second insulator.
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公开(公告)号:US20200227562A1
公开(公告)日:2020-07-16
申请号:US16630977
申请日:2018-07-26
IPC分类号: H01L29/786 , H01L29/24 , H01L27/108
摘要: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes an oxide; a first conductor and a second conductor apart from each other over the oxide; a first insulator over the first conductor and the second conductor, in which an opening is formed to overlap with a region between the first conductor and the second conductor; a third conductor in the opening; and a second insulator between the oxide, the first conductor, the second conductor, and the first insulator and the third conductor. The second insulator has a first thickness between the oxide and the third conductor, and has a second thickness between the first conductor or the second conductor and the third conductor. The first thickness is smaller than the second thickness.
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公开(公告)号:US20180026140A1
公开(公告)日:2018-01-25
申请号:US15704093
申请日:2017-09-14
发明人: Shunpei YAMAZAKI , Yoshinobu ASAMI , Yutaka OKAZAKI , Motomu KURATA , Katsuaki TOCHIBAYASHI , Shinya SASAGAWA , Kensuke YOSHIZUMI , Hideomi SUZAWA
IPC分类号: H01L29/786 , H01L21/477 , H01L21/4757 , H01L29/66 , H01L33/00 , H01L21/47
CPC分类号: H01L29/7869 , H01L21/47 , H01L21/4757 , H01L21/477 , H01L27/1207 , H01L27/1225 , H01L29/66969 , H01L29/78648 , H01L33/00
摘要: A miniaturized transistor, a transistor with low parasitic capacitance, a transistor with high frequency characteristics, or a semiconductor device including the transistor is provided. The semiconductor device includes a first insulator, an oxide semiconductor over the first insulator, a first conductor and a second conductor that are in contact with the oxide semiconductor, a second insulator that is over the first and second conductors and has an opening reaching the oxide semiconductor, a third insulator over the oxide semiconductor and the second insulator, and a fourth conductor over the third insulator. The first conductor includes a first region and a second region. The second conductor includes a third region and a fourth region. The second region faces the third region with the first conductor and the first insulator interposed therebetween. The second region is thinner than the first region. The third region is thinner than the fourth region.
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