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1.发明申请Carbon-fiber web structure type field emitter electrode and fabrication method of the same 失效碳纤维网结构型场发射极电极及其制造方法相同公开(公告)号：US20060066201A1
公开(公告)日：2006-03-30
申请号：US11064960
申请日：2005-02-25
IPC分类号： H01J1/14
CPC分类号： H01J1/304 , B82Y10/00 , D01D5/003 , H01J9/025 , H01J2201/30469
摘要： The present invention provides a field emitter electrode and a method for fabricating the same. The method comprises the steps of mixing a carbonizable polymer, carbon nanotubes and a solvent to prepare a carbon nanotube-containing polymer solution, electrospinning (or electrostatic spinning) the polymer solution to form a nanofiber web layer on a substrate, stabilizing the nanofiber web layer such that the polymer present in the nanofiber web layer is crosslinked, and carbonizing the nanofiber web layer such that the crosslinked polymer is converted to a carbon fiber.
摘要翻译： 本发明提供一种场致发射电极及其制造方法。 该方法包括将可碳化聚合物，碳纳米管和溶剂混合以制备含碳纳米管的聚合物溶液，静电纺丝（或静电纺丝）聚合物溶液以在基材上形成纳米纤维网层，稳定纳米纤维网层 使得存在于纳米纤维网层中的聚合物交联，并将纳米纤维网层碳化，使得交联聚合物转化为碳纤维。
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公开(公告)号：US20060052026A1
公开(公告)日：2006-03-09
申请号：US11000196
申请日：2004-12-01
CPC分类号： H01J9/025
摘要： Disclosed herein is a simplified method of producing a field emission type cold-cathode device, which can reduce the number of processes required to produce the field emission type cold-cathode device. The method includes applying an insulating material on a mesh-shaped thin conductive metal film to a predetermined thickness to integrally form a gate and an insulating layer, or simultaneously forming an insulating layer and a spacer on a mesh-shaped thin conductive metal film, and subsequently mounting the resulting structure on an upper side of a cathode.
摘要翻译： 本文公开了一种制造场致发射型冷阴极器件的简化方法，其可以减少制造场致发射型冷阴极器件所需的工艺数量。 该方法包括将网状薄导电金属膜上的绝缘材料施加到预定厚度以一体地形成栅极和绝缘层，或者同时在网状薄导电金属膜上形成绝缘层和间隔物，以及 随后将所得结构安装在阴极的上侧。
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公开(公告)号：US20070020397A1
公开(公告)日：2007-01-25
申请号：US11435429
申请日：2006-05-16
申请人： Jae Cho , Myeong Hong , Seung Ra , Il Maeng , Jeong Kwak , Choon Lee , Sang Lee
发明人： Jae Cho , Myeong Hong , Seung Ra , Il Maeng , Jeong Kwak , Choon Lee , Sang Lee
CPC分类号： H05K3/107 , H05K3/045 , H05K2201/09036 , H05K2203/0108 , H05K2203/0723
摘要： Disclosed herein is a method of fabricating a printed circuit board using an imprinting process, including forming a plating layer on an insulating layer having a plurality of recessed patterns formed through an imprinting process, and etching and polishing the portion of the plating layer using an etchant, resulting in a low polishing process cost and eliminating the need for an additional polishing process, because deterioration of the surface of the insulting layer is prevented.
摘要翻译： 本文公开了一种使用压印工艺制造印刷电路板的方法，包括在具有通过压印工艺形成的多个凹陷图案的绝缘层上形成镀层，并且使用蚀刻剂蚀刻和抛光该镀层的该部分 导致抛光工艺成本低，并且不需要额外的抛光工艺，因为防止了绝缘层表面的劣化。
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公开(公告)号：US20060226566A1
公开(公告)日：2006-10-12
申请号：US11326778
申请日：2006-01-05
申请人： Jeong Kwak , Il Maeng , Seung Ra
发明人： Jeong Kwak , Il Maeng , Seung Ra
IPC分类号： B29C59/02
CPC分类号： B29C59/02 , B29C2043/463 , H05K3/0014 , H05K3/107 , H05K2201/09036 , H05K2203/0108 , H05K2203/0143
摘要： The present invention relates to an imprinting apparatus, system and method. Specifically, the present invention relates to an imprinting apparatus, system and method, which can be applied to a large substrate, in which a substrate is aligned, imprinted through sequential pressurization by the imprinting apparatus to form a circuit pattern on the substrate and easily released from the imprinting apparatus.
摘要翻译： 本发明涉及压印装置，系统和方法。 具体地说，本发明涉及一种压印装置，系统和方法，其可以应用于通过压印装置的顺序加压而印刷基板的大型基板，以在基板上形成电路图案并且容易地释放 来自压印设备。
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公开(公告)号：US20060240360A1
公开(公告)日：2006-10-26
申请号：US11334240
申请日：2006-01-17
IPC分类号： B28B11/08
CPC分类号： H05K3/107 , H01L2251/105 , H05K3/045 , H05K3/181 , H05K2201/09972 , H05K2203/0108 , Y10T29/49126
摘要： The present invention relates to a method of manufacturing a printed circuit board using an imprinting process, in which a pattern having a large area can be uniformly formed using a plurality of molds, and the plurality of molds is sequentially removed, thereby solving problems occurring in release of the molds from an insulating layer.
摘要翻译： 本发明涉及使用压印工艺制造印刷电路板的方法，其中可以使用多个模具均匀地形成具有大面积的图案，并且顺序地移除多个模具，从而解决了在 从绝缘层释放模具。
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6.发明申请Method of manufacturing multilayered ceramic capacitor by spin coating and multilayered ceramic capacitor 失效通过旋涂和多层陶瓷电容器制造多层陶瓷电容器的方法公开(公告)号：US20050128680A1
公开(公告)日：2005-06-16
申请号：US11011092
申请日：2004-12-15
CPC分类号： H01G4/30 , H01G4/1227 , Y10T29/417 , Y10T29/43 , Y10T29/435
摘要： Disclosed herein is a method of manufacturing a multilayered ceramic capacitor by a spin coating process, and a multilayered ceramic capacitor obtained by the above method. The method of the current invention provides a plurality of dielectric layers formed by spin coating, in which the process of coating the dielectric layer and the process of printing the inner electrode can be provided as a single process. Therefore, the thickness of the dielectric layer is easily controlled while the dielectric layer is formed to be thin. Further, since the dielectric layers and the inner electrodes are formed successively, the processes of separating and layering the dielectric layers, and the process of compressing the ceramic multilayered body can be omitted. Thereby, the ceramic multilayered body need not be compressed, and thus, a pillowing phenomenon does not occur in the multilayered ceramic capacitor.
摘要翻译： 本文公开了通过旋涂工艺制造多层陶瓷电容器的方法和通过上述方法获得的多层陶瓷电容器。 本发明的方法提供了通过旋涂形成的多个电介质层，其中涂覆介电层的过程和印刷内电极的过程可以作为单一工艺提供。 因此，在电介质层形成得较薄的同时容易控制电介质层的厚度。 此外，由于电介质层和内部电极依次形成，所以可以省略介电层的分离和分层工艺以及压缩陶瓷多层体的工艺。 因此，陶瓷多层体不需要被压缩，因此在多层陶瓷电容器中不会发生卷绕现象。
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公开(公告)号：US20050132548A1
公开(公告)日：2005-06-23
申请号：US11002183
申请日：2004-12-03
CPC分类号： H01G4/005 , H01G4/12 , H01G4/30 , Y10T29/417
摘要： A method for manufacturing a multilayer ceramic capacitor, in which internal electrodes printed on each of a plurality of dielectric sheets have reduced thicknesses using an absorption member, thereby allowing the multilayer ceramic capacitor to have a high capacity and be minimized. The method includes printing the internal electrodes on each of the dielectric sheets, and stacking the dielectric sheets, wherein the internal electrodes formed on each of the dielectric sheets have a reduced thickness by causing an absorptive member to contact the surface of each of the dielectric sheets provided with the internal electrodes and then separating the absorptive member from the surface so that portions of the internal electrodes having a designated thickness are eliminated, and the dielectric sheets provided with the internal electrodes having the reduced thickness are stacked to form a chip element.
摘要翻译： 一种制造多层陶瓷电容器的方法，其中印刷在多个电介质片材的每一个上的内部电极使用吸收构件具有减小的厚度，从而允许多层陶瓷电容器具有高容量并且被最小化。 该方法包括在每个电介质片上印刷内部电极，并叠放电介质片，其中形成在每个电介质片上的内部电极通过使吸收构件接触每个电介质片的表面而具有减小的厚度 设置有内部电极，然后将吸收构件从表面分离，使得部分具有指定厚度的内部电极被去除，并且设置有具有减小的厚度的内部电极的电介质层被堆叠以形成芯片元件。
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8.发明申请公开(公告)号：US20060222833A1
公开(公告)日：2006-10-05
申请号：US11327111
申请日：2006-01-06
申请人： Il Maeng , Myeong Hong , Choon Lee , Jeong Kwak , Jae Cho , Seung Ra
发明人： Il Maeng , Myeong Hong , Choon Lee , Jeong Kwak , Jae Cho , Seung Ra
CPC分类号： H05K3/107 , H05K3/0014 , H05K3/005 , H05K2201/0209 , H05K2203/0108 , Y10T428/24917
摘要： The present invention relates to an imprinting mold for a printed circuit board, having excellent durability, and a method of manufacturing a printed circuit board using the same. Specifically, this invention provides an imprinting mold for a printed circuit board, having excellent durability, in which the mold having a surface structure corresponding to a plurality of via holes and a pattern to be formed is prepared by incorporating 30-80 parts by weight of a filler, having an average particle size of 0.1-5.0 μm, into 100 parts by weight of a heat or UV curing prepolymer. In addition, a method of manufacturing a printed circuit board using the imprinting mold is provided.
摘要翻译： 本发明涉及具有优异的耐久性的用于印刷电路板的印模，以及使用其的印刷电路板的制造方法。 具体而言，本发明提供一种印刷电路板的耐压性优异的耐压性，其中具有与多个通孔相对应的表面结构的模具和待形成的图案通过将30-80重量份的 将平均粒度为0.1-5.0μm的填料加入到100重量份的热固化或UV固化预聚物中。 此外，提供了使用压印模具制造印刷电路板的方法。
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