Method of manufacturing a very deep STI (shallow trench isolation)
    1.
    发明授权
    Method of manufacturing a very deep STI (shallow trench isolation) 有权
    制造非常深的STI(浅沟槽隔离)的方法

    公开(公告)号:US06436791B1

    公开(公告)日:2002-08-20

    申请号:US09880259

    申请日:2001-06-14

    IPC分类号: H01L21302

    CPC分类号: H01L21/76224

    摘要: A method of forming a shallow trench isolation structure comprising the following steps. A substrate having an upper surface is provided. A pad oxide layer is formed upon the substrate. A nitride layer is formed over the pad oxide layer. The nitride layer having an upper surface. A trench is formed by etching the nitride layer, pad oxide layer and a portion of the substrate. The trench having a bottom and side walls. An oxide film is deposited upon the etched nitride layer surface, and the bottom and side walls of trench. The oxide film is removed from over the etched nitride layer surface, and the bottom of the trench to expose a portion of substrate within the trench. The removal of oxide film leaving oxide spacers over the trench side walls. Epitaxial silicon is selectively deposited over the exposed portion of substrate, filling the trench. A thermal oxide layer is formed over the epitaxial silicon, annealing the interface between the epitaxial silicon and the oxide spacers. The etched nitride layer and the oxide layer from over the etched substrate; and a portion of the oxide spacers extending above the surface of the etched substrate are removed, whereby the shallow trench isolation structure is formed within the trench.

    摘要翻译: 一种形成浅沟槽隔离结构的方法,包括以下步骤。 提供具有上表面的基板。 衬底氧化层形成在衬底上。 在衬垫氧化物层上形成氮化物层。 氮化物层具有上表面。 通过蚀刻氮化物层,衬垫氧化物层和衬底的一部分来形成沟槽。 沟槽具有底部和侧壁。 在蚀刻的氮化物层表面和沟槽的底部和侧壁上沉积氧化物膜。 从蚀刻的氮化物层表面上方的氧化膜和沟槽的底部去除氧化膜,以露出沟槽内的衬底的一部分。 去除在沟槽侧壁上留下氧化物间隔物的氧化物膜。 外延硅被选择性地沉积在衬底的暴露部分上,填充沟槽。 在外延硅上形成热氧化层,退火外延硅与氧化物间隔物之间​​的界面。 蚀刻的氮化物层和来自蚀刻的衬底上的氧化物层; 并且去除在蚀刻的衬底的表面上方延伸的氧化物间隔物的一部分,由此在沟槽内形成浅沟槽隔离结构。

    Shallow trench isolation process
    2.
    发明授权
    Shallow trench isolation process 有权
    浅沟槽隔离工艺

    公开(公告)号:US06784077B1

    公开(公告)日:2004-08-31

    申请号:US10270973

    申请日:2002-10-15

    IPC分类号: H01L2176

    CPC分类号: H01L21/76224

    摘要: A method of forming a silicon oxide, shallow trench isolation (STI) region, featuring a silicon rich, silicon oxide layer used to protect the STI region from a subsequent wet etch procedure, has been developed. The method features depositing a silicon oxide layer via PECVD procedures, without RF bias, using a high silane to oxygen ratio, resulting in a silicon rich, silicon oxide layer, located surrounding the STI region. The low etch rate of the silicon rich, silicon oxide layer, protect the silicon oxide STI region from buffered hydrofluoric wet etch procedures, used for removal of a dioxide pad layer.

    摘要翻译: 已经开发了一种形成氧化硅,浅沟槽隔离(STI)区域的方法,其特征在于用于保护STI区域免受后续湿蚀刻过程的富硅氧化硅层。 该方法的特征是通过PECVD方法沉积氧化硅层,无需RF偏压,使用高硅烷与氧气比,导致位于STI区周围的富含硅的氧化硅层。 富硅氧化硅层的低蚀刻速率保护硅氧化物STI区域免受用于去除二氧化物焊盘层的缓冲氢氟酸湿蚀刻工艺。

    Hillock reduction in copper films
    7.
    发明申请
    Hillock reduction in copper films 有权
    铜膜中的小丘减少

    公开(公告)号:US20060270227A1

    公开(公告)日:2006-11-30

    申请号:US11136238

    申请日:2005-05-24

    摘要: A method for treating a copper surface of a semiconductor device provides exposing the copper surface to a citric acid solution after the surface is formed using CMP (chemical mechanical polishing) or other methods. The citric acid treatment may take place during a cleaning operation that takes place in a wafer scrubber, or subsequent to such an operation. The citric acid treatment removes copper oxides that form on copper surfaces exposed to the environment and prevents hillock formation during subsequent high temperature operations. The copper surface is then annealed and the annealing followed by an NH3 plasma treatment which again removes any copper oxides that may be present. The NH3 plasma operation roughens exposed surfaces improving the adhesion of subsequently-formed films such as a dielectric film preferably formed in-situ with the NH3 plasma treatment. The subsequently-formed film is formed over an oxide-free, hillock-free copper surface.

    摘要翻译: 用于处理半导体器件的铜表面的方法在使用CMP(化学机械抛光)或其它方法形成表面之后,使铜表面暴露于柠檬酸溶液。 柠檬酸处理可以在在晶圆洗涤器中进行的清洁操作中或者在这种操作之后进行。 柠檬酸处理除去在暴露于环境的铜表面上形成的铜氧化物,并防止在随后的高温操作期间形成小丘。 然后将铜表面退火并进行退火,然后进行NH 3等离子体处理,其再次除去可能存在的任何铜氧化物。 NH 3等离子体操作使暴露的表面粗糙化,改善随后形成的膜的粘附性,例如优选用NH 3等离子体处理原位形成的电介质膜。 随后形成的膜形成在无氧化物的无小丘的铜表面上。

    Manufacture method of metal bottom ARC
    8.
    发明授权
    Manufacture method of metal bottom ARC 有权
    金属底部ARC的制造方法

    公开(公告)号:US06573189B1

    公开(公告)日:2003-06-03

    申请号:US10044859

    申请日:2001-11-07

    IPC分类号: H01L21302

    CPC分类号: H01L21/0276

    摘要: A new method of preventing photoresist footing by forming a silicon oxynitride ARC layer having an oxygen-rich surface is described. An insulating layer is provided on a substrate. A metal layer is deposited overlying the insulating layer. A silicon oxynitride antireflective coating layer having an oxygen-rich surface is deposited overlying the metal layer. A photoresist mask is formed overlying the antireflective coating layer wherein the antireflective coating layer prevents photoresist footing. The antireflective coating layer and the metal layer are etched away where they are not covered by the photoresist mask to complete formation of metal lines in the fabrication of an integrated circuit.

    摘要翻译: 描述了通过形成具有富氧表面的氧氮化硅ARC层来防止光致抗蚀剂底脚的新方法。 绝缘层设置在基板上。 沉积在绝缘层上的金属层。 具有富氧表面的氧氮化硅抗反射涂层沉积在金属层上。 形成覆盖抗反射涂层的抗蚀剂掩模,其中抗反射涂层防止光致抗蚀剂底脚。 抗反射涂层和金属层被蚀刻掉,其中它们不被光致抗蚀剂掩模覆盖,以在集成电路的制造中完成金属线的形成。

    CMP process leaving no residual oxide layer or slurry particles
    9.
    发明授权
    CMP process leaving no residual oxide layer or slurry particles 有权
    CMP工艺不留下残留的氧化物层或浆料颗粒

    公开(公告)号:US06660638B1

    公开(公告)日:2003-12-09

    申请号:US10038389

    申请日:2002-01-03

    IPC分类号: H01L21461

    摘要: Two problems seen in CMP as currently executed are a tendency for slurry particles to remain on the surface and the formation of a final layer of oxide. These problems have been solved by adding to the slurry a quantity of TMAH or TBAH. This has the effect of rendering the surface being polished hydrophobic. In that state a residual layer of oxide will not be left on the surface at the conclusion of CMP. Nor will many slurry abrasive particles remain cling to the freshly polished surface. Those that do are readily removed by a simple rinse or buffing. As an alternative, the CMP process may be performed in three stages—first convention CMP, then polishing in a solution of TMAH or TBAH, and finally a gentle rinse or buffing.

    摘要翻译: 当前执行的CMP中看到的两个问题是浆料颗粒保留在表面上并形成最后一层氧化物的倾向。 这些问题已经通过向浆料中加入一定量的TMAH或TBAH来解决。 这具有使表面被抛光的疏水性的效果。 在该状态下,在CMP结束时,残留的氧化层不会残留在表面上。 许多浆料磨料颗粒也不会保持粘附到新鲜抛光的表面。 那些可以通过简单的冲洗或抛光容易地去除。 作为替代方案,CMP工艺可以分三个阶段执行 - 第一个惯例CMP,然后在TMAH或TBAH的溶液中抛光,最后进行柔和的冲洗或抛光。

    Methods to reduce metal bridges and line shorts in integrated circuits
    10.
    发明授权
    Methods to reduce metal bridges and line shorts in integrated circuits 有权
    降低集成电路中金属桥和线路短路的方法

    公开(公告)号:US06372645B1

    公开(公告)日:2002-04-16

    申请号:US09439367

    申请日:1999-11-15

    IPC分类号: H01L2144

    CPC分类号: H01L21/76838 H01L21/32051

    摘要: In the first option of the present invention, a semiconductor structure is provided and an overlying titanium nitride barrier layer is deposited thereon at about 100° C. At least Al and Cu is sputtered over the titanium nitride barrier layer from about 270 to 300° C. to form an Al—Cu alloy containing metal layer. The sputtered Al—Cu alloy containing metal layer is promptly cooled at a cooling rate greater than about 100° C./minute to a temperature below 200° C. to form a Al—Cu alloy containing metal layer having minimal CuAl2 grain growth. The semiconductor structure is removed from the cooling chamber and the semiconductor structure is processed further below 200° C. to form semiconductor device precursors. In the second option of the present invention, a semiconductor structure having an overlying barrier layer is provided. At least Al and Cu is sputtered over the barrier layer at a first temperature to form an Al—Cu alloy containing metal layer having CuAl2 grains of a first average size. The semiconductor structure is processed and then heated to a second temperature to dissolve the CuAl2 grains of a first average size then rapidly cooling to a third temperature whereby the CuAl2 grains formed have a second average size within the Al—Cu alloy containing metal layer. The second average size CuAl2 grains being less than the first average size CuAl2 grains.

    摘要翻译: 在本发明的第一种选择中,提供了一种半导体结构,并在其上沉积了大约100℃的上覆氮化钛阻挡层。至少Al和Cu溅射在氮化钛阻挡层上约270-300℃ 以形成含有金属层的Al-Cu合金。 将溅射的含有Al-Cu合金的金属层以大于约100℃/分钟的冷却速度迅速冷却到低于200℃的温度,以形成含有最小CuAl 2晶粒生长的金属层的Al-Cu合金。 将半导体结构从冷却室中移除,半导体结构进一步在200℃以下进行处理以形成半导体器件前体。 在本发明的第二个选择中,提供了具有上覆阻挡层的半导体结构。 在第一温度下至少将Al和Cu溅射在阻挡层上,以形成含有具有第一平均尺寸的CuAl 2晶粒的金属层的Al-Cu合金。 将半导体结构加工,然后加热至第二温度以溶解第一平均尺寸的CuAl 2晶粒,然后快速冷却至第三温度,由此形成的CuAl 2晶粒在含有Al-Cu合金的金属层内具有第二平均尺寸。 第二平均尺寸CuAl2晶粒小于第一平均尺寸CuAl2晶粒。