公开(公告)号：US5867350A

公开(公告)日：1999-02-02

申请号：US819322

申请日：1997-03-18

申请人： Shuichi Haga ,  Mamoru Sasaki ,  Hideo Suyama ,  Nobuhiro Sugawara ,  Akio Takada ,  Mikiya Kurosu ,  Chizuru Ohshima

发明人： Shuichi Haga ,  Mamoru Sasaki ,  Hideo Suyama ,  Nobuhiro Sugawara ,  Akio Takada ,  Mikiya Kurosu ,  Chizuru Ohshima

IPC分类号： G11B5/31 ,  G11B5/39 ,  G11B5/40 ,  G11B5/11

CPC分类号： G11B5/3903 ,  G11B5/313 ,  G11B5/40

摘要： A magneto-resistance effect magnetic head having a uniform bias distribution and adapted for avoiding shorting between a magneto-resistance device and a bias conductor wherein a magneto-resistance device 5 and a bias conductor 6 for applying a bias magnetic field to the magneto-resistance device 5 are interposed between a lower shielding magnetic member 1 and an upper shielding magnetic member 2. The bias conductor is embedded in a groove formed in the shielding magnetic member provided on the opposite side of forward and rear electrodes with respect to the magneto-resistance effect device.

摘要翻译： 一种磁阻效应磁头，具有均匀的偏置分布并且适于避免在磁阻元件和偏置导体之间的短路，其中磁阻元件5和用于向磁阻施加偏置磁场的偏置导体6 装置5插入在下屏蔽磁性构件1和上屏蔽磁性构件2之间。偏置导体嵌入形成在屏蔽磁性构件中的槽中，该屏蔽磁性构件设置在前后电极的相对于磁阻的相反侧 效果器。

公开(公告)号：US5875078A

公开(公告)日：1999-02-23

申请号：US694182

申请日：1996-08-08

申请人： Hideo Suyama ,  Takuji Shibata ,  Norio Saito ,  Mamoru Sasaki ,  Akio Takada ,  Jin Sato ,  Shuichi Haga

发明人： Hideo Suyama ,  Takuji Shibata ,  Norio Saito ,  Mamoru Sasaki ,  Akio Takada ,  Jin Sato ,  Shuichi Haga

IPC分类号： G11B5/31 ,  G11B5/39 ,  G11B5/455

CPC分类号： G11B5/3903 ,  G11B5/3906 ,  G11B5/455 ,  G11B5/3945

摘要： In a magnetoresistance thin film magnetic head, a bias conductor and a magnetoresistive magnetic sensing section are electrically connected to each other in series. Further, the bias conductor (7) is formed in such a pattern as to have a width and distance from a magnetic recording medium facing surface which become larger as it is away from a portion transversing the magnetoresistive magnetic sensing section.

摘要翻译： 在磁阻薄膜磁头中，偏置导体和磁阻磁感应部分串联电连接。 此外，偏置导体（7）形成为具有与磁记录介质相对表面的宽度和距离的图案，该距离随着远离磁阻感测部分的部分而变大。

公开(公告)号：US5270893A

公开(公告)日：1993-12-14

申请号：US783166

申请日：1991-10-28

申请人： Mamoru Sasaki ,  Hideo Suyama ,  Takuji Shibata ,  Kenichiro Tsunewaki

发明人： Mamoru Sasaki ,  Hideo Suyama ,  Takuji Shibata ,  Kenichiro Tsunewaki

IPC分类号： G11B5/39 ,  C11B5/39 ,  C11B5/147

CPC分类号： G11B5/3903 ,  G11B5/3967

摘要： A magneto-resistance effect type thin film magnetic head which does not produce significant Barkhausen noises and has stabilized characteristics even where the track width is smaller than, for example, 10 .mu.m. The magnetic head comprises a base member, a lower layer thin film magnetic core and an upper layer thin film magnetic core layered on the base member in such a manner that a magnetic gap is formed between front ends thereof, the gap being open to an opposing face of the magnetic head which is in contact with or opposed to a magnetic record medium, and a magneto-resistance effect magnetic sensing section disposed in the magnetic gap between the lower and upper layer thin film magnetic cores. The front end of the lower layer thin film magnetic core which defines the magnetic gap has a width selected to be smaller than the width of the front end of the upper layer thin film magnetic core which defines the magnetic gap so as to define a track width of the magnetic gap.

摘要翻译： 磁阻效应型薄膜磁头不产生明显的巴克豪森噪声，并且即使在轨道宽度小于例如10μm的情况下也具有稳定的特性。 磁头包括基底部件，下层薄膜磁芯和层叠在基底部件上的上层薄膜磁芯，使得在其前端之间形成磁隙，间隙开放到相对的位置 与磁记录介质接触或相对的磁头的表面，以及设置在下层和上层薄膜磁芯之间的磁隙中的磁阻效应磁感应部分。 限定磁隙的下层薄膜磁芯的前端的宽度被选择为小于限定磁隙的上层薄膜磁芯的前端的宽度，以便限定磁道宽度 的磁隙。

公开(公告)号：US5272582A

公开(公告)日：1993-12-21

申请号：US766503

申请日：1991-09-27

申请人： Takuji Shibata ,  Kenichiro Tsunewaki ,  Mamoru Sasaki ,  Hideo Suyama ,  Norio Saito

发明人： Takuji Shibata ,  Kenichiro Tsunewaki ,  Mamoru Sasaki ,  Hideo Suyama ,  Norio Saito

IPC分类号： G11B5/39 ,  G11B5/40

CPC分类号： G11B5/3903 ,  G11B5/40

摘要： A magneto-resistance effect type magnetic head incorporates a grounded conductive layer, a second thin film magnetic core and an MR sensing part, the conductive layer being located near the thin film magnetic core, the layer and the core being electrically connected. The conductive layer is further connected electrically to an electrode of the MR sensing part, the electrode facing an air bearing surface. This setup protects the MR sensing part from static electricity destruction, thus providing a magneto-resistance effect type magnetic head of high reliability.

公开(公告)号：US20100216395A1

公开(公告)日：2010-08-26

申请号：US12665264

申请日：2008-06-13

申请人： Mamoru Sasaki

发明人： Mamoru Sasaki

IPC分类号： H04B7/24

CPC分类号： H04B1/04 ,  H04B1/7174

摘要： A transmitter (1) applies current from a power supply node to a ground node in synchronization with only a rise of an input signal and transmits a transmission signal including an RF pulse signal to a receiver (2). The receiver (2) applies current from a node (231) on which precharge is performed to a ground node only at the reception of the RF pulse signal, decreases the potential of the node (231) from a precharge potential Va to 0 V, and outputs an H-level output signal by detecting the decreased potential 0 V. After receiving the RF pulse signal, the receiver (2) performs precharge to change the potential of the node (231) to the potential Va.

摘要翻译： 发射机（1）仅与输入信号的上升同步地从电源节点向接地节点施加电流，并将包括RF脉冲信号的发送信号发送到接收机（2）。 接收器（2）仅在接收到RF脉冲信号时将来自执行预充电的节点（231）的电流施加到接地节点，从而将节点（231）的电位从预充电电位Va减小到0V， 并且通过检测降低的电位0V来输出H电平输出信号。接收器（2）在接收到RF脉冲信号之后，执行预充电以将节点（231）的电位改变为电位Va。

公开(公告)号：US20050077905A1

公开(公告)日：2005-04-14

申请号：US10497514

申请日：2002-12-03

申请人： Mamoru Sasaki

发明人： Mamoru Sasaki

IPC分类号： G01R31/28 ,  G01R1/04 ,  G01R31/317 ,  G01R31/3185 ,  G01R31/319 ,  G01R31/00

CPC分类号： G01R31/31905 ,  G01R1/045 ,  G01R1/0483 ,  G01R31/2889 ,  G01R31/31716 ,  G01R31/318533 ,  G01R31/31926

摘要： The invention relates to a test method and a test apparatus for a semiconductor integrated circuit device having a high-speed input/output device, and it has for its object to perform the test of the high-speed I/O exceeding 1 GHz, promptly by a simple board construction, without altering a test system for individual I/O specifications. A semiconductor integrated circuit device (1) having a high-speed input/output device (2) is set on a load board (3) which is provided with loopback paths (4) each connecting the external output terminal and external input terminal of the semiconductor integrated circuit device (1) by transmission lines, and the operation of the high-speed input/output device (2) is tested within the semiconductor integrated circuit device (1) by utilizing test means (5) disposed inside the semiconductor integrated circuit device (1), and the loopback paths (4).

摘要翻译： 本发明涉及一种具有高速输入/输出装置的半导体集成电路装置的测试方法和测试装置，其目的是对超过1GHz的高速I / O进行测试 通过简单的电路板结构，不需要更改单个I / O规范的测试系统。 具有高速输入/输出装置（2）的半导体集成电路装置（1）被设置在负载板（3）上，该负载板（3）设置有环路（4），每个环回路径连接外部输出端子和外部输入端子 半导体集成电路器件（1），通过利用设置在半导体集成电路内部的测试装置（5）在半导体集成电路器件（1）内测试高速输入/输出器件（2）的操作 设备（1）和环回路径（4）。

公开(公告)号：US5992007A

公开(公告)日：1999-11-30

申请号：US839370

申请日：1997-04-18

申请人： Kenji Morii ,  Atsushi Kitajima ,  Mamoru Sasaki ,  Tokio Kikuchi

发明人： Kenji Morii ,  Atsushi Kitajima ,  Mamoru Sasaki ,  Tokio Kikuchi

IPC分类号： H02K15/03 ,  H02K15/14

CPC分类号： H02K15/03 ,  Y10T29/49012 ,  Y10T29/49771 ,  Y10T29/49863 ,  Y10T29/53022 ,  Y10T29/53161

摘要： An apparatus for covering a plurality of permanent magnets on a rotor with a cylindrical sleeve has a movable jig, a holder jig having a plurality of insertion grooves for inserting therein the permanent magnets disposed in grooves of the rotor, the holder jig and the movable jig being pressable partly into an insertion end of the cylindrical sleeve, a plurality of resilient members disposed in the insertion grooves for pressing the permanent magnets against the outer circumferential surface of the rotor, and a presser device for inserting the movable jig, together with the rotor and the permanent magnets into the cylindrical sleeve under the guidance of the holder jig. The permanent magnets on the rotor are reliably and efficiently covered with the cylindrical sleeve without the need for an adhesive to secure the permanent magnets to the rotor.

摘要翻译： 一种用圆筒形套筒覆盖转子上的多个永磁体的装置具有可动夹具，具有多个插入槽的支架夹具，用于插入设置在转子槽中的永久磁铁，夹具夹具和活动夹具 可部分地压入圆筒形套筒的插入端中的多个弹性构件，设置在插入槽中的多个弹性构件，用于将永磁体按压在转子的外周面上，以及用于将可动夹具与转子一起插入的压紧装置 并在保持架夹具的引导下将永磁体插入圆筒套筒中。 转子上的永磁体可靠地有效地被圆柱形套筒覆盖，而不需要粘合剂将永磁体固定到转子上。

公开(公告)号：US5394010A

公开(公告)日：1995-02-28

申请号：US849630

申请日：1992-03-12

申请人： Hiroshi Tazawa ,  Chiaki Takubo ,  Yoshiharu Tsuboi ,  Mamoru Sasaki

发明人： Hiroshi Tazawa ,  Chiaki Takubo ,  Yoshiharu Tsuboi ,  Mamoru Sasaki

IPC分类号： H01L23/34 ,  H01L21/48 ,  H01L23/31 ,  H01L23/495 ,  H01L23/50 ,  H01L25/00 ,  H01L25/10 ,  H01L25/11 ,  H01L25/18 ,  H05K1/18 ,  H05K3/34 ,  H01L23/02 ,  H01L23/12

CPC分类号： H01L23/3107 ,  H01L21/4842 ,  H01L23/49541 ,  H01L23/49555 ,  H01L25/105 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2225/1029 ,  H01L2225/1041 ,  H01L2225/1094 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/1815 ,  H05K1/181 ,  H05K3/3421

摘要： A semiconductor assembly comprises first and second containers which contain respective semiconductor chips and are stacked one over another. First and second external leads extending from the insides of the respective containers to outside thereof are bent so as to be connected to each other. The first and the second containers may be provided at corresponding positions with a recess and a projection to be engaged each other for positional alignment. There may be provided first and second heat radiating plates extending from the insides of the respective containers to outside thereof are bent so as to be connected to each other.

摘要翻译： 半导体组件包括第一和第二容器，其包含相应的半导体芯片并且彼此层叠。 从各个容器的内部延伸到其外部的第一和第二外部引线被弯曲以彼此连接。 第一和第二容器可以设置在相应的位置处，其中凹部和凸起彼此接合以进行位置对准。 可以提供从各个容器的内部延伸到其外侧的第一和第二散热板被弯曲以彼此连接。

公开(公告)号：US08476801B2

公开(公告)日：2013-07-02

申请号：US12937086

申请日：2009-03-16

申请人： Hitoshi Shiobara ,  Mamoru Sasaki ,  Kenji Misao ,  Mitsuhiro Yamada

发明人： Hitoshi Shiobara ,  Mamoru Sasaki ,  Kenji Misao ,  Mitsuhiro Yamada

IPC分类号： H02K3/28

CPC分类号： H02K3/522 ,  H02K3/18 ,  H02K15/095 ,  Y10T29/53143

摘要： An apparatus for manufacturing a stator. On a split core of the stator, there are wound main conductors and two auxiliary conductors, which are thinner than but correspond to the main conductors. These main conductors are arrayed and wound in a plurality of layers, such that the main conductors of an upper layer are arranged in the valleys between the adjoining main conductors of a layer. For the main conductors of a first layer, the auxiliary conductors are arranged in a first space and a second space. For the main conductors of the second and subsequent layers, the auxiliary conductors are arranged in a third space, and the auxiliary conductors are arranged in a fourth space.

摘要翻译： 一种用于制造定子的装置。 在定子的分体式芯上，有主导体和主导体相比较薄的主导体和两个辅助导体。 这些主导体排列并缠绕成多个层，使得上层的主导体布置在层的相邻主导体之间的谷中。 对于第一层的主导体，辅助导体布置在第一空间和第二空间中。 对于第二层和后续层的主导体，辅助导体布置在第三空间中，并且辅助导体布置在第四空间中。

公开(公告)号：US07545663B2

公开(公告)日：2009-06-09

申请号：US11440398

申请日：2006-05-25

申请人： Hiroaki Ikeda ,  Mamoru Sasaki ,  Atsushi Iwata

发明人： Hiroaki Ikeda ,  Mamoru Sasaki ,  Atsushi Iwata

IPC分类号： G11C5/06

CPC分类号： G11C7/1051 ,  G11C5/02 ,  G11C7/1039 ,  G11C7/1078 ,  G11C7/1087 ,  G11C2207/107 ,  H01L23/481 ,  H01L2224/05573 ,  H01L2224/13025 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2224/05599

摘要： Data transfer speed is increased in a semiconductor storage device in which the core unit and the interface unit are separate chips. The device has a plurality of core chips through in which a memory cell is formed, and an interface chip in which a peripheral circuit is formed for the memory cell. The plurality of core chips through have latch circuit units through for temporarily storing data to be outputted by the memory cell, and latch circuit units through for temporarily storing data to be inputted to the memory cell, respectively, and these latch circuit units through and latch circuit units through are connected in a cascade to the interface chip. Since the plurality of latch circuit units connected in a cascade can thereby perform a pipeline operation, it becomes possible to achieve high-speed data transfer.

摘要翻译： 在核心单元和接口单元是分离的芯片的半导体存储设备中，数据传输速度增加。 该装置具有通过其中形成有存储单元的多个核芯片，以及形成用于存储单元的外围电路的接口芯片。 多个核芯片通过具有用于临时存储由存储单元输出的数据的锁存电路单元，以及用于临时存储要输入到存储单元的数据的锁存电路单元，并且这些锁存电路单元通过和锁存 电路单元通过级联连接到接口芯片。 由于串联连接的多个锁存电路单元能够进行流水线运行，因此能够实现高速数据传送。