公开(公告)号：US07311852B2

公开(公告)日：2007-12-25

申请号：US09820695

申请日：2001-03-30

申请人： Si Yi Li ,  Helen H. Zhu ,  S. M. Reza Sadjadi ,  James V. Tietz ,  Bryan A. Helmer

发明人： Si Yi Li ,  Helen H. Zhu ,  S. M. Reza Sadjadi ,  James V. Tietz ,  Bryan A. Helmer

IPC分类号： H01L21/3065

CPC分类号： H01L21/7681 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/76807

摘要： A semiconductor manufacturing process wherein a low-k dielectric layer is plasma etched with selectivity to an overlying mask layer. The etchant gas can be oxygen-free and include a fluorocarbon reactant, a nitrogen reactant and an optional carrier gas, the fluorocarbon reactant and nitrogen reactant being supplied to a chamber of a plasma etch reactor at flow rates such that the fluorocarbon reactant flow rate is less than the nitrogen reactant flow rate. The etch rate of the low-k dielectric layer can be at least 5 times higher than that of a silicon dioxide, silicon nitride, silicon oxynitride or silicon carbide mask layer. The process is useful for etching 0.25 micron and smaller contact or via openings in forming structures such as damascene structures.

摘要翻译： 一种半导体制造工艺，其中低k电介质层被等离子体蚀刻，对上覆掩模层具有选择性。 蚀刻剂气体可以是无氧的并且包括氟碳反应物，氮反应物和任选的载气，所述碳氟反应物和氮反应物以流速供给到等离子体蚀刻反应器的室，使得碳氟化合物反应物流速为 小于氮气反应物流量。 低k电介质层的蚀刻速率可以比二氧化硅，氮化硅，氮氧化硅或碳化硅掩模层的蚀刻速率高至少5倍。 该方法对于在形成结构如镶嵌结构中蚀刻0.25微米和较小的接触或通孔开口是有用的。

公开(公告)号：US07166535B2

公开(公告)日：2007-01-23

申请号：US10430013

申请日：2003-05-06

申请人： Si Yi Li ,  S. M. Reza Sadjadi ,  James V. Tietz

发明人： Si Yi Li ,  S. M. Reza Sadjadi ,  James V. Tietz

IPC分类号： H01L21/461 ,  H01L21/302

CPC分类号： H01L21/3065 ,  H01L21/31116 ,  H01L21/32137

摘要： A process for plasma etching silicon carbide with selectivity to an overlying and/or underlying dielectric layer of material. The dielectric material can comprise silicon dioxide, silicon oxynitride, silicon nitride or various low-k dielectric materials including organic low-k materials. The etching gas includes a chlorine containing gas such as Cl2, an oxygen containing gas such as O2, and a carrier gas such as Ar. In order to achieve a desired selectivity to such dielectric materials, the plasma etch gas chemistry is selected to achieve a desired etch rate of the silicon carbide while etching the dielectric material at a slower rate. The process can be used to selectively etch a hydrogenated silicon carbide etch stop layer or silicon carbide substrate.

摘要翻译： 用于等离子体蚀刻碳化硅的方法，其具有对材料的上覆和/或下层介电层的选择性。 介电材料可以包括二氧化硅，氮氧化硅，氮化硅或包括有机低k材料的各种低k电介质材料。 蚀刻气体包括诸如Cl 2的含氯气体，诸如O 2的含氧气体和诸如Ar的载气。 为了实现对这种介电材料的期望的选择性，选择等离子体蚀刻气体化学物质以在较慢的速率蚀刻电介质材料时实现所需的碳化硅蚀刻速率。 该方法可用于选择性蚀刻氢化碳化硅蚀刻停止层或碳化硅衬底。

公开(公告)号：US06919278B2

公开(公告)日：2005-07-19

申请号：US10199190

申请日：2002-07-19

申请人： Sean S. Kang ,  Si Yi Li ,  S. M. Reza Sadjadi

发明人： Sean S. Kang ,  Si Yi Li ,  S. M. Reza Sadjadi

IPC分类号： H01J37/00 ,  H01L21/04 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/461 ,  H01L21/768

CPC分类号： H01L21/3065 ,  H01L21/31116 ,  H01L21/32137

摘要： A system and method for achieving a silicon carbide to low-k dielectric etch selectivity ratio of greater than 1:1 using a chlorine containing gas and either hydrogen (H2) gas or nitrogen (N2) gas is described. The method is applied to a semiconductor substrate having a low-k dielectric layer and a silicon carbide layer. The chlorine containing gas is a gas mixture that includes either HCl, BCl3, Cl2, or any combination thereof. In one embodiment, the method provides for supplying an etchant gas comprising a chlorine containing gas and a hydrogen (H2) gas. The etchant gas is then energized to generate a plasma which then etches openings in the silicon carbide at a faster etch rate than the low-k dielectric etch rate. In an alternative embodiment, the etchant gas mixture comprises a chlorine containing gas and a nitrogen (N2) gas.

摘要翻译： 一种用于使用含氯气体和氢气（H 2/2）气体或氮气（N 2）的气体来实现碳化硅至低k电介质蚀刻选择比大于1:1的系统和方法， 2气体）。 该方法应用于具有低k电介质层和碳化硅层的半导体衬底。 含氯气体是包含HCl，BCl 3，Cl 2 H 2或其任何组合的气体混合物。 在一个实施方案中，该方法提供了供应包含含氯气体和氢气（H 2 H 2）气体的蚀刻剂气体。 然后将蚀刻剂气体通电以产生等离子体，然后等离子体以比低k电介质蚀刻速率更快的蚀刻速率蚀刻碳化硅中的开口。 在替代实施例中，蚀刻剂气体混合物包括含氯气体和氮气（N 2/2）气体。

公开(公告)号：US06875699B1

公开(公告)日：2005-04-05

申请号：US10138041

申请日：2002-05-01

申请人： Stephan Lassig ,  S. M. Reza Sadjadi ,  Vinay Pohray ,  Si Yi Li ,  Thomas W. Mountsier ,  Chiu Chi

发明人： Stephan Lassig ,  S. M. Reza Sadjadi ,  Vinay Pohray ,  Si Yi Li ,  Thomas W. Mountsier ,  Chiu Chi

IPC分类号： G03F7/09 ,  H01L21/311 ,  H01L21/312 ,  H01L21/316 ,  H01L21/768 ,  H01L21/302

CPC分类号： H01L21/02063 ,  G03F7/091 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/312 ,  H01L21/3124 ,  H01L21/3127 ,  H01L21/31629 ,  H01L21/31695 ,  H01L21/76808 ,  H01L21/76829

摘要： A method of forming a damascene structure above a substrate is provided. A low-k dielectric layer is formed over the substrate, wherein the low-k dielectric layer does not have a trench stop layer. A plurality of vias are etched through the low-k dielectric layer. Via plugs are formed in the plurality of vias. A plurality of trenches are etched into the low-k dielectric layer, wherein the etching with sufficiently high via plugs minimizes facet formation at the tops of vias exposed to the etch and wherein the trench etch process removes fences caused by the via plugs. The via plugs are stripped.

摘要翻译： 提供了一种在衬底上形成镶嵌结构的方法。 低k电介质层形成在衬底上，其中低k电介质层不具有沟槽停止层。 通过低k电介质层蚀刻多个通孔。 通过插塞形成在多个通孔中。 多个沟槽被蚀刻到低k电介质层中，其中具有足够高的通孔插塞的蚀刻最小化暴露于蚀刻的通孔顶部的小面形成，并且其中沟槽蚀刻工艺移除由通孔插塞引起的栅栏。 通孔塞被剥去。

公开(公告)号：US06670278B2

公开(公告)日：2003-12-30

申请号：US09820726

申请日：2001-03-30

申请人： Si Yi Li ,  Helen H. Zhu ,  S. M. Reza Sadjadi ,  David R. Pirkle ,  James Bowers ,  Michael Goss

发明人： Si Yi Li ,  Helen H. Zhu ,  S. M. Reza Sadjadi ,  David R. Pirkle ,  James Bowers ,  Michael Goss

IPC分类号： H01L21302

CPC分类号： H01L21/7681 ,  H01L21/31116 ,  H01L21/76807

摘要： The invention provides a process for plasma etching silicon carbide with selectivity to an overlapping and/or underlying dielectric layer of material. The etching gas includes a hydrogen-containing fluorocarbon gas such as CH3F, an oxygen-containing gas such as O2 and an optional carrier gas such as Ar. The dielectric material can comprise silicon dioxide, silicon nitride, silicon oxynitride or various low-k dielectric materials including organic low-k materials. In order to achieve a desired selectivity to such dielectric materials, the plasma etch gas chemistry is selected to achieve a desired etch rate of the silicon carbide while etching the dielectric material at a slower rate. The process can be used to selectively etch a hydrogenated silicon carbide etch stop layer or silicon carbide substrates.