公开(公告)号：US09071410B2

公开(公告)日：2015-06-30

申请号：US14591845

申请日：2015-01-07

Applicant: Silicon Image, Inc.

Inventor： Inyeol Lee ,  Baegin Sung ,  Hanwoong Sohn ,  Shinje Tahk ,  Sun Woo Baek ,  Chandlee B. Harrell

IPC: H04L7/02 ,  H04L7/00 ,  H04L7/027 ,  H04L7/033

CPC classification number: H04L7/0087 ,  H04B3/23 ,  H04B7/015 ,  H04L7/0278 ,  H04L7/033 ,  H04L7/042 ,  H04L25/4904 ,  H04L25/493

Abstract: Embodiments of the invention are generally directed to simultaneous transmission of clock and bidirectional data over a communication channel. An embodiment of a transmitting device includes a modulator to generate a modulated signal including a clock signal and a data signal, the clock signal being modulated by a first signal edge of the modulated signal and the data signal being modulated by a position of a second signal edge of the modulated signal; a driver to drive the modulated signal on a communication channel; an echo canceller to subtract reflected signals on the communication channel; and a data recovery module to recover a signal received on the communication channel, the received signal being encoded by Return-to-Zero (RZ) encoding, the signal being received simultaneously with driving the modulated signal on the communication channel.

公开(公告)号：US20150270946A1

公开(公告)日：2015-09-24

申请号：US14731342

申请日：2015-06-04

Applicant: Silicon Image, Inc.

Inventor： Inyeol Lee ,  Baegin Sung ,  Hanwoong Sohn ,  Shinje Tahk ,  Sun Woo Baek ,  Chandlee B. Harrell

IPC: H04L7/00 ,  H04L25/493 ,  H04B3/23 ,  H04L7/04 ,  H04L25/49

CPC classification number: H04L7/0087 ,  H04B3/23 ,  H04B7/015 ,  H04L7/0278 ,  H04L7/033 ,  H04L7/042 ,  H04L25/4904 ,  H04L25/493

Abstract: Embodiments of the invention are generally directed to simultaneous transmission of clock and bidirectional data over a communication channel. An embodiment of a transmitting device includes a modulator to generate a modulated signal including a clock signal and a data signal, the clock signal being modulated by a first signal edge of the modulated signal and the data signal being modulated by a position of a second signal edge of the modulated signal; a driver to drive the modulated signal on a communication channel; an echo canceller to subtract reflected signals on the communication channel; and a data recovery module to recover a signal received on the communication channel, the received signal being encoded by Return-to-Zero (RZ) encoding, the signal being received simultaneously with driving the modulated signal on the communication channel.

Abstract translation: 本发明的实施例一般涉及通过通信信道同时传输时钟和双向数据。 发射装置的实施例包括调制器，用于产生包括时钟信号和数据信号的调制信号，时钟信号由调制信号的第一信号边沿调制，数据信号由第二信号的位置调制 调制信号的边缘; 在通信信道上驱动调制信号的驱动器; 回波消除器，用于减去通信信道上的反射信号; 以及数据恢复模块，用于恢复在通信信道上接收到的信号，所述接收信号通过归零（RZ）编码进行编码，该信号与在通信信道上驱动调制信号同时接收。

公开(公告)号：US20130329828A1

公开(公告)日：2013-12-12

申请号：US13834927

申请日：2013-03-15

Applicant: Silicon Image, Inc.

Inventor： Inyeol Lee ,  Baegin Sung ,  Hanwoong Sohn ,  Shinje Tahk ,  Sun Woo Baek ,  Chandlee B. Harrell

IPC: H04B7/015

CPC classification number: H04L7/0087 ,  H04B3/23 ,  H04B7/015 ,  H04L7/0278 ,  H04L7/033 ,  H04L7/042 ,  H04L25/4904 ,  H04L25/493

Abstract: Embodiments of the invention are generally directed to simultaneous transmission of clock and bidirectional data over a communication channel. An embodiment of a transmitting device includes a modulator to generate a modulated signal including a clock signal and a data signal, the clock signal being modulated by a first signal edge of the modulated signal and the data signal being modulated by a position of a second signal edge of the modulated signal; a driver to drive the modulated signal on a communication channel; an echo canceller to subtract reflected signals on the communication channel; and a data recovery module to recover a signal received on the communication channel, the received signal being encoded by Return-to-Zero (RZ) encoding, the signal being received simultaneously with driving the modulated signal on the communication channel.

公开(公告)号：US20160261073A1

公开(公告)日：2016-09-08

申请号：US14636971

申请日：2015-03-03

Applicant: Silicon Image, Inc.

Inventor： Youchul Jeong ,  Jaemin Kim ,  Baegin Sung

IPC: H01R13/6461 ,  H01R13/66 ,  H01R24/60 ,  H04N21/4363

CPC classification number: H01R13/6461 ,  H01R13/6471 ,  H01R13/6585 ,  H01R13/665 ,  H01R13/6658 ,  H01R24/60 ,  H01R24/62 ,  H01R2107/00 ,  H04N21/43635

Abstract: In one embodiment, an HDMI connector includes a plurality of conductive paths. The plurality of conductive paths correspond to four channels, i.e., three differential data channels and one differential clock channel. Each channel includes three conductive paths, which correspond to a differential pair and a dedicated ground. Each conductive path has a contact on one end and a pin on the opposite end. The pins of the plurality of conductive paths are arranged to attach to corresponding surface mounting pads in at least two columns of contact points. For each channel, the pad for the dedicated ground is larger than the pads for the differential pair, thereby providing shielding between the differential pairs of different channels.

Abstract translation: 在一个实施例中，HDMI连接器包括多个导电路径。 多个导电路径对应于四个通道，即三个差分数据通道和一个差分时钟通道。 每个通道包括对应于差分对和专用地的三个导电路径。 每个导电路径在一端具有接触，在另一端具有一个销。 多个导电路径的引脚布置成附接到至少两列接触点中的对应的表面安装焊盘。 对于每个通道，用于专用地的焊盘大于差分对的焊盘，从而在不同通道的差分对之间提供屏蔽。

公开(公告)号：US20150358020A1

公开(公告)日：2015-12-10

申请号：US14296377

申请日：2014-06-04

Applicant: Silicon Image, Inc.

Inventor： Youchul Jeong ,  Junwoo Lee ,  Inyeol Lee ,  Baegin Sung

IPC: H03K19/00 ,  H03K19/003

CPC classification number: H03K19/0005 ,  H03K19/00346

Abstract: In one embodiment, an apparatus for transmitting a signal with an improved termination is disclosed. The apparatus includes a driver to generate a differential mode signal superimposed on a common mode signal at a differential driver output of the driver. The differential driver output includes a first driver output and a second driver output. The apparatus also includes a termination circuit coupled between the first driver output and the second driver output. The termination circuit includes a capacitor connected to a node. The termination circuit also includes a first resistor and a first inductive element coupled in series between the first driver output and the node. In addition, the termination circuit includes a second resistor and a second inductive element coupled in series between the second driver output and the node.

Abstract translation: 在一个实施例中，公开了一种用于发送具有改进的终端的信号的装置。 该装置包括驱动器，以在驱动器的差分驱动器输出处产生叠加在共模信号上的差模信号。 差分驱动器输出包括第一驱动器输出和第二驱动器输出。 该装置还包括耦合在第一驱动器输出和第二驱动器输出之间的终端电路。 终端电路包括连接到节点的电容器。 终端电路还包括串联耦合在第一驱动器输出和节点之间的第一电阻器和第一电感元件。 此外，终端电路包括串联耦合在第二驱动器输出和节点之间的第二电阻器和第二电感元件。

公开(公告)号：US20150117580A1

公开(公告)日：2015-04-30

申请号：US14591845

申请日：2015-01-07

Applicant: Silicon Image, Inc.

Inventor： Inyeol Lee ,  Baegin Sung ,  Hanwoong Sohn ,  Shinje Tahk ,  Sun Woo Baek ,  Chandlee B. Harrell

IPC: H04L7/00 ,  H04L7/033 ,  H04L7/027

CPC classification number: H04L7/0087 ,  H04B3/23 ,  H04B7/015 ,  H04L7/0278 ,  H04L7/033 ,  H04L7/042 ,  H04L25/4904 ,  H04L25/493

Abstract: Embodiments of the invention are generally directed to simultaneous transmission of clock and bidirectional data over a communication channel. An embodiment of a transmitting device includes a modulator to generate a modulated signal including a clock signal and a data signal, the clock signal being modulated by a first signal edge of the modulated signal and the data signal being modulated by a position of a second signal edge of the modulated signal; a driver to drive the modulated signal on a communication channel; an echo canceller to subtract reflected signals on the communication channel; and a data recovery module to recover a signal received on the communication channel, the received signal being encoded by Return-to-Zero (RZ) encoding, the signal being received simultaneously with driving the modulated signal on the communication channel.

公开(公告)号：US09356402B2

公开(公告)日：2016-05-31

申请号：US14636052

申请日：2015-03-02

Applicant: Silicon Image, Inc.

Inventor： Baegin Sung ,  Chandlee B. Harrell ,  Gyudong Kim ,  Shrikant Ranade

IPC: H01R13/648 ,  H01R13/6585 ,  H01R13/6471

CPC classification number: H01R13/6585 ,  H01R13/6471

Abstract: In one embodiment, a source device and sink device communicate with one another via a multimedia link. The multimedia link includes a cable and a plug. The cable includes one or more data lines, power lines, ground lines or control bus lines. The plug includes a plurality of pins each connected to the one or more lines included in the cable. The plug also includes a ground plane and a power plane, wherein a ground pin of the plug connects the ground plane to the ground line of the cable of the multimedia link and a power pin of the plug connects the ground plane to the power line of the cable. In one example, the ground plane and power plane are placed within a threshold distance of one another, such that the power line connected to the power plane via the power pin behaves as a signal return path.

Abstract translation: 在一个实施例中，源设备和宿设备经由多媒体链路相互通信。 多媒体链路包括电缆和插头。 电缆包括一条或多条数据线，电源线，地线或控制总线。 插头包括多个引脚，每个引脚均连接到电缆中包括的一条或多条线。 插头还包括接地平面和电力平面，其中插头的接地引脚将接地平面连接到多媒体链路的电缆的接地线，并且插头的电源引脚将接地平面连接到 电缆。 在一个示例中，接地平面和功率平面被放置在彼此的阈值距离内，使得经由电源引脚连接到电源平面的电力线表现为信号返回路径。

公开(公告)号：US20150255933A1

公开(公告)日：2015-09-10

申请号：US14636052

申请日：2015-03-02

Applicant: Silicon Image, Inc.

Inventor： Baegin Sung ,  Chandlee B. Harrell ,  Gyudong Kim ,  Shrikant Ranade

IPC: H01R24/30 ,  H01R24/22 ,  H01R13/6581

CPC classification number: H01R13/6585 ,  H01R13/6471

Abstract: In one embodiment, a source device and sink device communicate with one another via a multimedia link. The multimedia link includes a cable and a plug. The cable includes one or more data lines, power lines, ground lines or control bus lines. The plug includes a plurality of pins each connected to the one or more lines included in the cable. The plug also includes a ground plane and a power plane, wherein a ground pin of the plug connects the ground plane to the ground line of the cable of the multimedia link and a power pin of the plug connects the ground plane to the power line of the cable. In one example, the ground plane and power plane are placed within a threshold distance of one another, such that the power line connected to the power plane via the power pin behaves as a signal return path.

Abstract translation: 在一个实施例中，源设备和宿设备经由多媒体链路相互通信。 多媒体链路包括电缆和插头。 电缆包括一条或多条数据线，电源线，地线或控制总线。 插头包括多个引脚，每个引脚均连接到电缆中包括的一条或多条线。 插头还包括接地平面和电力平面，其中插头的接地引脚将接地平面连接到多媒体链路的电缆的接地线，并且插头的电源引脚将接地平面连接到 电缆。 在一个示例中，接地平面和功率平面被放置在彼此的阈值距离内，使得经由电源引脚连接到电源平面的电力线表现为信号返回路径。

公开(公告)号：US08958497B2

公开(公告)日：2015-02-17

申请号：US13834927

申请日：2013-03-15

Applicant: Silicon Image, Inc.

Inventor： Inyeol Lee ,  Baegin Sung ,  Hanwoong Sohn ,  Shinje Tahk ,  Sun Woo Baek ,  Chandlee B. Harrell

IPC: H04B15/00 ,  H04B7/015 ,  H04L25/49 ,  H04B3/23

CPC classification number: H04L7/0087 ,  H04B3/23 ,  H04B7/015 ,  H04L7/0278 ,  H04L7/033 ,  H04L7/042 ,  H04L25/4904 ,  H04L25/493

Abstract: Embodiments of the invention are generally directed to simultaneous transmission of clock and bidirectional data over a communication channel. An embodiment of a transmitting device includes a modulator to generate a modulated signal including a clock signal and a data signal, the clock signal being modulated by a first signal edge of the modulated signal and the data signal being modulated by a position of a second signal edge of the modulated signal; a driver to drive the modulated signal on a communication channel; an echo canceller to subtract reflected signals on the communication channel; and a data recovery module to recover a signal received on the communication channel, the received signal being encoded by Return-to-Zero (RZ) encoding, the signal being received simultaneously with driving the modulated signal on the communication channel.

Abstract translation: 本发明的实施例一般涉及通过通信信道同时传输时钟和双向数据。 发射装置的实施例包括调制器，用于产生包括时钟信号和数据信号的调制信号，时钟信号由调制信号的第一信号边沿调制，数据信号由第二信号的位置调制 调制信号的边缘; 在通信信道上驱动调制信号的驱动器; 回波消除器，用于减去通信信道上的反射信号; 以及数据恢复模块，用于恢复在通信信道上接收到的信号，所述接收信号通过归零（RZ）编码进行编码，该信号与在通信信道上驱动调制信号同时接收。

公开(公告)号：US20140241457A1

公开(公告)日：2014-08-28

申请号：US13776577

申请日：2013-02-25

Applicant: Silicon Image, Inc.

Inventor： Daekyeung Kim ,  Daeyun Shim ,  Baegin Sung

IPC: H04L7/00

CPC classification number: G09G5/006 ,  G09G5/008 ,  G09G2370/12 ,  H04L7/0008 ,  H04L25/49

Abstract: Techniques and mechanisms for exchanging communications which each represent a respective combination of data and clock signaling. In an embodiment, encoder logic generates a first signal pair, including encoding a first differential data signal pair with a first clock signal of a differential clock signal pair. The encoder logic further generates a second signal pair, including encoding a second differential data signal pair with a second clock signal of the same differential clock signal pair. In another embodiment, decoder logic receives and decodes the first signal pair and the second signal pair, wherein the decoding generates the first differential data signal pair, the second differential data signal pair and a clock signal.

Abstract translation: 用于交换通信的技术和机制，其各自表示数据和时钟信令的相应组合。 在一个实施例中，编码器逻辑产生第一信号对，包括用差分时钟信号对的第一时钟信号对第一差分数据信号对进行编码。 编码器逻辑还产生第二信号对，包括用相同的差分时钟信号对的第二时钟信号对第二差分数据信号对进行编码。 在另一个实施例中，解码器逻辑接收并解码第一信号对和第二信号对，其中解码产生第一差分数据信号对，第二差分数据信号对和时钟信号。