公开(公告)号：US07799685B2

公开(公告)日：2010-09-21

申请号：US10958866

申请日：2004-10-04

申请人： Stephen E. Savas ,  Songlin Xu ,  David Dutton ,  Andreas Kadavanich ,  Rene George

发明人： Stephen E. Savas ,  Songlin Xu ,  David Dutton ,  Andreas Kadavanich ,  Rene George

IPC分类号： H01L21/302 ,  H01L21/461

CPC分类号： H01L21/31138 ,  H01L21/02063 ,  H01L21/02071 ,  H01L21/67207

摘要： In a technique for fabricating an integrated circuit to include an active device structure which supports an electrical interconnect structure, a photoresist layer is used prior to forming an electrical interconnect structure on the active device structure. The photoresist and related residues are removed by exposing the photoresist and exposed regions of the active device structure to one or more reactive species that are generated using a gas mixture including hydrogen gas, as a predominant source of the reactive species, in a plasma source such that the photoresist and residues are continuously exposed to hydrogen-based reactive species. An associated system architecture is described which provides for a substantial flow of hydrogen gas in the process chamber.

摘要翻译： 在用于制造集成电路以包括支持电互连结构的有源器件结构的技术中，在有源器件结构上形成电互连结构之前，使用光致抗蚀剂层。 通过将活性器件结构的光致抗蚀剂和暴露区域暴露于一种或多种使用包含作为反应性物质的主要来源的氢气的气体混合物在等离子体源中产生的反应性物质来除去光致抗蚀剂和相关残余物，例如 光致抗蚀剂和残留物连续暴露于基于氢的反应物种。 描述了相关联的系统架构，其提供了处理室中的大量氢气流。

公开(公告)号：US08413604B2

公开(公告)日：2013-04-09

申请号：US11564134

申请日：2006-11-28

申请人： Rene George ,  Andreas Kadavanich ,  Daniel J. Devine ,  Stephen E. Savas ,  John Zajac ,  Hongching Shan

发明人： Rene George ,  Andreas Kadavanich ,  Daniel J. Devine ,  Stephen E. Savas ,  John Zajac ,  Hongching Shan

IPC分类号： C23C16/00 ,  C23F1/00 ,  H01L21/306

CPC分类号： H01L21/67069 ,  H01J37/321 ,  H01J37/32431 ,  H01L21/02104 ,  H01L21/3065 ,  H01L21/6715 ,  H05H1/46

摘要： A more uniform plasma process is implemented for treating a treatment object using an inductively coupled plasma source which produces an asymmetric plasma density pattern at the treatment surface using a slotted electrostatic shield having uniformly spaced-apart slots. The slotted electrostatic shield is modified in a way which compensates for the asymmetric plasma density pattern to provide a modified plasma density pattern at the treatment surface. A more uniform radial plasma process is described in which an electrostatic shield arrangement is configured to replace a given electrostatic shield in a way which provides for producing a modified radial variation characteristic across the treatment surface. The inductively coupled plasma source defines an axis of symmetry and the electrostatic shield arrangement is configured to include a shape that extends through a range of radii relative to the axis of symmetry.

摘要翻译： 实施了更均匀的等离子体处理，以使用电感耦合等离子体源来处理处理对象，该等离子体源使用具有均匀间隔开的狭缝的开槽静电屏蔽件在处理表面处产生不对称等离子体密度图案。 槽式静电屏蔽以补偿不对称等离子体密度图案的方式进行修改，以在处理表面提供改良的等离子体密度图案。 描述了更均匀的径向等离子体处理，其中静电屏蔽装置被配置为以提供在整个处理表面上产生修改的径向变化特征的方式来替换给定的静电屏蔽。 电感耦合等离子体源限定对称轴，并且静电屏蔽装置被配置为包括相对于对称轴延伸穿过半径范围的形状。

公开(公告)号：US07232767B2

公开(公告)日：2007-06-19

申请号：US10803453

申请日：2004-03-18

申请人： Rene George ,  Andreas Kadavanich ,  Daniel J. Devine ,  Stephen E. Savas ,  John Zajac ,  Hongching Shan

发明人： Rene George ,  Andreas Kadavanich ,  Daniel J. Devine ,  Stephen E. Savas ,  John Zajac ,  Hongching Shan

IPC分类号： H01L21/302

CPC分类号： H01L21/67069 ,  H01J37/321 ,  H01J37/32431 ,  H01L21/02104 ,  H01L21/3065 ,  H01L21/6715 ,  H05H1/46

摘要： A more uniform plasma process is implemented for treating a treatment object using an inductively coupled plasma source which produces an asymmetric plasma density pattern at the treatment surface using a slotted electrostatic shield having uniformly spaced-apart slots. The slotted electrostatic shield is modified in a way which compensates for the asymmetric plasma density pattern to provide a modified plasma density pattern at the treatment surface. A more uniform radial plasma process is described in which an electrostatic shield arrangement is configured to replace a given electrostatic shield in a way which provides for producing a modified radial variation characteristic across the treatment surface. The inductively coupled plasma source defines an axis of symmetry and the electrostatic shield arrangement is configured to include a shape that extends through a range of radii relative to the axis of symmetry.

摘要翻译： 实施了更均匀的等离子体处理，以使用电感耦合等离子体源来处理处理对象，该等离子体源使用具有均匀间隔开的狭缝的开槽静电屏蔽件在处理表面处产生不对称等离子体密度图案。 槽式静电屏蔽以补偿不对称等离子体密度图案的方式进行修改，以在处理表面提供改良的等离子体密度图案。 描述了更均匀的径向等离子体处理，其中静电屏蔽装置被配置为以提供在整个处理表面上产生修改的径向变化特征的方式来替换给定的静电屏蔽。 电感耦合等离子体源限定对称轴，并且静电屏蔽装置被配置为包括相对于对称轴延伸穿过半径范围的形状。

公开(公告)号：US20070269975A1

公开(公告)日：2007-11-22

申请号：US11436950

申请日：2006-05-18

申请人： Stephen E. Savas ,  Li Hou ,  Songlin Xu

发明人： Stephen E. Savas ,  Li Hou ,  Songlin Xu

IPC分类号： H01L21/4763

CPC分类号： H01L21/76814 ,  H01L21/02063 ,  H01L21/31138 ,  H01L21/76829

摘要： In device fabrication, a photoresist layer is formed on an insulation layer, above a stop layer that is supported directly on an active device structure. Holes are needed through the insulation layer to reach a contact arrangement, defined by the active device structure in which each contact is covered by the stop layer and some of the contacts include a silicide material. A plurality of contact openings are etched through the insulation layer to expose the stop layer above each contact, which may produce etch related residue. The photoresist and residues are then stripped using a first plasma that contains oxygen, without removing the stop layer such that the stop layer protects the silicide material from the oxygen. Thereafter, etching is performed to remove the stop layer from the contacts using a second plasma that is oxygen free and which contains hydrogen.

摘要翻译： 在器件制造中，光致抗蚀剂层形成在绝缘层上方，直接支撑在有源器件结构上的停止层之上。 通过绝缘层需要孔以达到由有源器件结构限定的接触装置，其中每个触点被阻挡层覆盖，并且一些触点包括硅化物材料。 通过绝缘层蚀刻多个接触开口以暴露每个接触件上方的停止层，这可能产生与蚀刻有关的残留物。 然后使用含有氧的第一等离子体剥离光致抗蚀剂和残余物，而不去除停止层，使得停止层保护硅化物材料免受氧气的影响。 此后，使用无氧的含有氢的第二等离子体来进行蚀刻以从触点去除停止层。

公开(公告)号：US06379576B2

公开(公告)日：2002-04-30

申请号：US09192810

申请日：1998-11-16

申请人： Leroy Luo ,  Rene George ,  Stephen E. Savas ,  Craig Ranft ,  Wolfgang Helle ,  Robert Guerra

发明人： Leroy Luo ,  Rene George ,  Stephen E. Savas ,  Craig Ranft ,  Wolfgang Helle ,  Robert Guerra

IPC分类号： C23F100

CPC分类号： H01L21/02071 ,  G03F7/427 ,  H01J37/321 ,  H01J37/32357 ,  H01J2237/335 ,  H01L21/02046 ,  H01L21/02063 ,  H01L21/31116 ,  H01L21/31138 ,  Y10S134/902 ,  Y10S438/906

摘要： Variable mode plasma system and method for processing a semiconductor wafer. The modulation of the plasma potential relative to the semiconductor wafer is varied for different process steps. A capacitive shield may be selectively grounded to vary the level of capacitive coupling and modulation of the plasma. Process pressures, gases and power level may also be modified for different process steps. Plasma properties may easily be tailored to specific layers and materials being processed on the surface of the wafer. Variable mode processes may be adapted for (i) removal of photoresist after high-dose ion implant, (ii) post metal etch polymer removal, (iii) via clean, and (iv) other plasma enhanced processes.

摘要翻译： 可变模式等离子体系统和半导体晶片的处理方法。 对于不同的工艺步骤，等离子体电位相对于半导体晶片的调制是不同的。 可以选择性地接地电容屏蔽以改变等离子体的电容耦合和调制的电平。 过程压力，气体和功率水平也可以针对不同的工艺步骤进行修改。 等离子体性质可以容易地适应于在晶片表面上被处理的特定层和材料。 可变模式工艺可以适用于（i）高剂量离子注入后去除光致抗蚀剂，（ii）金属后蚀刻聚合物去除，（iii）通过清洁，和（iv）其它等离子体增强过程。

公开(公告)号：US07947605B2

公开(公告)日：2011-05-24

申请号：US11736727

申请日：2007-04-18

申请人： Rene George ,  Stephen E. Savas

发明人： Rene George ,  Stephen E. Savas

IPC分类号： H01L21/302

CPC分类号： G03F7/42 ,  G03F7/405 ,  H01L21/26513

摘要： A method is described for use in a system that removes an implant crust that is formed as an outermost layer of photoresist in a photoresist pattern that is supported by a workpiece. The photoresist pattern defines apertures which lead to an active device region. The active device region is formed by an ion implantation which produces the implant crust. A filler material is applied such that the filler material reaches a fill depth in each aperture. The workpiece and the filler material are exposed to a treatment environment to remove the implant crust on the laterally extending surface of the photoresist as the filler material protects the active device region. Thereafter, a remaining portion of the photoresist layer is removed. An associated intermediate assembly, including the workpiece, is described.

摘要翻译： 描述了一种用于在由工件支撑的光致抗蚀剂图案中去除形成为光致抗蚀剂的最外层的植入物外壳的系统中的方法。 光致抗蚀剂图案限定了通向有源器件区域的孔。 有源器件区域由产生植入物外壳的离子注入形成。 施加填充材料使得填充材料在每个孔中达到填充深度。 当填充材料保护有源器件区域时，工件和填充材料暴露于处理环境以去除光致抗蚀剂的横向延伸表面上的植入物外壳。 此后，除去光致抗蚀剂层的剩余部分。 描述了包括工件的相关联的中间组件。

公开(公告)号：US09184072B2

公开(公告)日：2015-11-10

申请号：US11829258

申请日：2007-07-27

申请人： Daniel J. Devine ,  Charles Crapuchettes ,  Dixit Desai ,  Rene George ,  Vincent C. Lee ,  Yuya Matsuda ,  Jonathan Mohn ,  Ryan M. Pakulski ,  Stephen E. Savas ,  Martin Zucker

发明人： Daniel J. Devine ,  Charles Crapuchettes ,  Dixit Desai ,  Rene George ,  Vincent C. Lee ,  Yuya Matsuda ,  Jonathan Mohn ,  Ryan M. Pakulski ,  Stephen E. Savas ,  Martin Zucker

IPC分类号： B01J19/08 ,  B23P17/04 ,  H01L21/67

CPC分类号： H01L21/6719 ,  H01L21/67069 ,  Y10T29/49

摘要： An apparatus and method are described for processing workpieces in a treatment process. A multi-wafer chamber defines a chamber interior including at least two processing stations within the chamber interior such that the processing stations share the chamber interior. Each processing station includes a plasma source and a workpiece pedestal for exposing one of the workpieces to the treatment process using a respective plasma source. The chamber includes an arrangement of one or more electrically conductive surfaces that are asymmetrically disposed about the workpiece at each processing station in a way which produces a given level of uniformity of the treatment process on a major surface of each workpiece. A shield arrangement provides an enhanced uniformity of exposure of the workpiece to the respective one of the plasma sources that is greater than the given level of uniformity that would be provided in an absence of the shield arrangement.

摘要翻译： 描述了用于在处理过程中处理工件的装置和方法。 多晶片室限定腔室内部，其包括腔室内部的至少两个处理站，使得处理站共享腔室内部。 每个处理站包括等离子体源和用于使用相应的等离子体源将工件中的一个暴露于处理过程的工件基座。 腔室包括一个或多个导电表面的布置，其以在每个加工工位上围绕工件不对称地设置，以在每个工件的主表面上产生给定水平的处理工艺的均匀性。 屏蔽装置提供了工件对等离子体源的相对一个的曝光增强的均匀性，其大于在没有屏蔽装置的情况下提供的给定的均匀度水平。

公开(公告)号：US20090028761A1

公开(公告)日：2009-01-29

申请号：US11829258

申请日：2007-07-27

申请人： Daniel J. Devine ,  Charles Crapuchettes ,  Dixit Desai ,  Rene George ,  Vincent C. Lee ,  Yuya Matsuda ,  Jonathan Mohn ,  Ryan M. Pakulski ,  Stephen E. Savas ,  Martin Zucker

发明人： Daniel J. Devine ,  Charles Crapuchettes ,  Dixit Desai ,  Rene George ,  Vincent C. Lee ,  Yuya Matsuda ,  Jonathan Mohn ,  Ryan M. Pakulski ,  Stephen E. Savas ,  Martin Zucker

IPC分类号： B01J19/08 ,  B23P17/04

CPC分类号： H01L21/6719 ,  H01L21/67069 ,  Y10T29/49

摘要： An apparatus and method are described for processing workpieces in a treatment process. A multi-wafer chamber defines a chamber interior including at least two processing stations within the chamber interior such that the processing stations share the chamber interior. Each processing station includes a plasma source and a workpiece pedestal for exposing one of the workpieces to the treatment process using a respective plasma source. The chamber includes an arrangement of one or more electrically conductive surfaces that are asymmetrically disposed about the workpiece at each processing station in a way which produces a given level of uniformity of the treatment process on a major surface of each workpiece. A shield arrangement provides an enhanced uniformity of exposure of the workpiece to the respective one of the plasma sources that is greater than the given level of uniformity that would be provided in an absence of the shield arrangement.

摘要翻译： 描述了用于在处理过程中处理工件的装置和方法。 多晶片室限定腔室内部，其包括腔室内部的至少两个处理站，使得处理站共享腔室内部。 每个处理站包括等离子体源和用于使用相应的等离子体源将工件中的一个暴露于处理过程的工件基座。 腔室包括一个或多个导电表面的布置，其以在每个加工工位上围绕工件不对称地设置，以在每个工件的主表面上产生给定水平的处理工艺的均匀性。 屏蔽装置提供了工件对等离子体源的相对一个的曝光增强的均匀性，其大于在没有屏蔽装置的情况下提供的给定的均匀度水平。

公开(公告)号：US07534362B2

公开(公告)日：2009-05-19

申请号：US11180294

申请日：2005-07-13

申请人： Stephen E. Savas

发明人： Stephen E. Savas

IPC分类号： B44C1/22 ,  C03C15/00 ,  C03C25/68 ,  C23F1/00

CPC分类号： H01J37/32082 ,  H01J37/3244

摘要： Apparatus and process for controlling etching of silicon-based or organic materials on large rectangular substrates for manufacture of flat panel displays or other devices. The disclosed etching process can remove silicon-based materials or organic polymers with a rate distribution such that all areas of the panel are finished at nearly the same time. It does so while minimizing electrical charging of the workpiece that could cause damage to the devices. The etching chamber employs a parallel plate RF discharge between two electrodes, one of which is the showerhead for gas introduction and the other supports the substrate to be processed. Reactant and other gases are provided to the discharge by a novel showerhead structure. The gases which provide reactants for etching silicon-based materials include halogenated compounds. Oxygen, water vapor or hydrogen with other gas additives may be used for etching organic polymers. The uniformity of etching across the substrate is controlled by adding other gas(es), including inert diluents, which can control the etching rate for either silicon-based materials or organic materials by accelerating and/or decreasing it. In addition, the distribution of the gases which are added can be varied to make the surface potential of the substrate more uniform. With a showerhead having a single reservoir that feeds all gases into the discharge, the gases may be added to the reservoir through multiple distribution structures within or adjacent to the reservoir. These structures are each supplied separately with the additive gases and, in turn, feed them to the different regions of the reservoir. The invention can thus provide different etching rates for different parts of the substrate, as may be required to finish film removal in all areas of the panel at nearly the same time. The invention also provides for chemical conversion of inorganic residues remaining after the oxidation of an organic polymer in the ashing process by addition of small amounts of halogenated gas(es) to the mixture flowing through the plasma sources. With the system and process of the invention, space efficiency, operating cost and capital cost for making large substrates can be reduced significantly.

公开(公告)号：US06551447B1

公开(公告)日：2003-04-22

申请号：US09707368

申请日：2000-11-06

申请人： Stephen E. Savas ,  Brad S. Mattson ,  Martin L. Hammond ,  Steven C. Selbrede

发明人： Stephen E. Savas ,  Brad S. Mattson ,  Martin L. Hammond ,  Steven C. Selbrede

IPC分类号： H01L2100

CPC分类号： H01J37/32871 ,  H01J37/321 ,  H01J37/32357 ,  H01J37/32422 ,  H01J37/32706 ,  Y10S156/912

摘要： A plasma reactor and methods for processing semiconductor wafers are described. Gases are introduced into a reactor chamber. An induction coil surrounds the reactor chamber. RF power is applied to the induction coil and is inductively coupled into the reactor chamber causing a plasma to form. A split Faraday shield is interposed between the induction coil and the reactor chamber to substantially block the capacitive coupling of energy into the reactor chamber which may modulate the plasma potential. The configuration of the split Faraday shield may be selected to control the level of modulation of the plasma potential. For etch processes, a separate powered electrode may be used to accelerate ions toward a wafer surface. For isotropic etching processes, charged particles may be filtered from the gas flow, while a neutral activated species passes unimpeded to a wafer surface.

摘要翻译： 描述了等离子体反应器和半导体晶片的处理方法。 将气体引入反应室。 感应线圈围绕反应室。 RF功率被施加到感应线圈并感应耦合到反应室中，形成等离子体。 在感应线圈和反应室之间插入分裂的法拉第屏蔽，以基本上阻挡能量进入反应室的电容耦合，这可以调制等离子体电位。 可以选择分裂法拉第屏蔽的配置来控制等离子体电位的调制水平。 对于蚀刻工艺，可以使用单独的供电电极来将离子加速朝向晶片表面。 对于各向同性蚀刻工艺，可以从气流中过滤带电粒子，而中性活性物质无阻碍地通过晶片表面。