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14 条记录 (耗时 0.028 秒)

    Electronic package having buried passive components
    1.
    发明授权
    Electronic package having buried passive components 失效
    具有埋地无源元件的电子封装

    公开(公告)号：US5757611A

    公开(公告)日：1998-05-26

    申请号：US631397

    申请日：1996-04-12

    申请人： Stephen R. Gurkovich ,  Theodore R. Vasilow ,  Andrew J. Piloto ,  Deborah P. Partlow ,  Kenneth C. Radford ,  Alex E. Bailey

    发明人： Stephen R. Gurkovich ,  Theodore R. Vasilow ,  Andrew J. Piloto ,  Deborah P. Partlow ,  Kenneth C. Radford ,  Alex E. Bailey

    IPC分类号： H01L23/498 ,  H05K1/03 ,  H05K1/16 ,  H05K3/46 ,  H01G4/06

    CPC分类号： H01L23/49822 ,  H01L23/49894 ,  H05K1/162 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/0306 ,  H05K3/4611 ,  H05K3/4629 ,  H05K3/4688

    摘要： The invention provides for an electronic package having a buried passive component such as a capacitor therein, and a method for fabricating the same. The electronic package preferably includes a passive component portion which includes a plurality of layers of high K dielectric material, a signal processing portion which includes a plurality of layers of low K dielectric material, and at least one buffer layer interposed between the passive component portion and the signal processing portion. Metallization is preferably printed upon at least one of the layers of high K dielectric material and at least one of the layers of low K dielectric material. Preferably, the layers are co-fired at a temperature below approximately 1200.degree. C. to form the electronic package and each of the buffer layers contains approximately 25 to 100% barium compound. Via conductors may also be provided through the buffer layers to electrically couple the passive component portion and the signal processing portion and the metallization and the via conductors may be selected from highly conductive materials such as gold, silver, copper and alloys thereof.

    摘要翻译： 本发明提供一种具有埋入式无源元件（例如电容器）的电子封装及其制造方法。 电子封装优选地包括无源元件部分，其包括多层高K电介质材料，信号处理部分，其包括多层低K电介质材料，以及至少一个缓冲层，介于无源元件部分和 信号处理部分。 金属化优选印刷在高K电介质材料的层中的至少一层和低K电介质材料层中的至少一层中。 优选地，这些层在低于约1200℃的温度下共烧以形成电子封装，并且每个缓冲层含有约25至100％的钡化合物。 还可以通过缓冲层提供通孔导体，以电耦合无源部件部分和信号处理部分，并且金属化和通孔导体可以选自高导电材料，例如金，银，铜及其合金。

    Method of manufacturing ferromagnetic toroids used in ferrite phase shifters
    3.
    发明授权
    Method of manufacturing ferromagnetic toroids used in ferrite phase shifters 失效
    在铁素体移相器中使用的铁磁环圈的制造方法

    公开(公告)号：US06673181B1

    公开(公告)日：2004-01-06

    申请号：US09984317

    申请日：2001-10-29

    申请人： Cynthia W. Berry ,  Deborah P. Partlow ,  Alex E. Bailey

    发明人： Cynthia W. Berry ,  Deborah P. Partlow ,  Alex E. Bailey

    IPC分类号： B32B3126

    CPC分类号： H01P11/00 ,  H01P1/195 ,  Y10T156/1056 ,  Y10T156/1057 ,  Y10T156/1062 ,  Y10T156/1064

    摘要： A fabrication process for ferrite toroids which utilizes ferrite ceramic tape having an improved elongation characteristic. The process utilizes a set of rigid mandrels which are employed in the final lamination to support the rectangular cross section of the internal cavity of a respective ferrite tube, thereby reducing stress concentration and permitting the highest lamination pressure to be used in the final step. The mandrels are removed prior to panel densification. The tape and mandrels operate together to minimize cracks and pores in the toroids and provide an added advantage of maintaining high tolerances in the internal cavity dimensions as well as the cavity-to-cavity alignment.

    摘要翻译： 铁氧体环形体的制造方法，其使用具有改善的伸长率特性的铁氧体陶瓷带。 该方法利用一组刚性心轴，其用于最终层压以支撑相应铁氧体管的内腔的矩形横截面，从而减少应力集中并允许在最后步骤中使用最高层压压力。 在面板致密化之前将心轴移除。 带和心轴一起工作以使环形圈中的裂纹和孔隙最小化，并提供了在内部空腔尺寸以及空腔到腔体对准中保持高公差的附加优点。

    Piezoelectric ceramic material including processes for preparation thereof and applications therefor
    4.
    发明授权
    Piezoelectric ceramic material including processes for preparation thereof and applications therefor 失效
    压电陶瓷材料，包括其制备方法及其应用

    公开(公告)号：US5527480A

    公开(公告)日：1996-06-18

    申请号：US60399

    申请日：1987-06-11

    申请人： Alex E. Bailey ,  Inam Jawed ,  Andrew P. Ritter ,  Audrey E. Sutherland ,  Stephen R. Winzer

    发明人： Alex E. Bailey ,  Inam Jawed ,  Andrew P. Ritter ,  Audrey E. Sutherland ,  Stephen R. Winzer

    IPC分类号： C04B35/497 ,  H01L41/187 ,  C04B35/46 ,  C04B35/64

    CPC分类号： H01L41/187 ,  C04B35/497

    摘要： This invention relates to new ceramic piezoelectric compositions having superior electrical properties, processes for the preparation of the new piezoelectric composition and applications for the new compositions. Specifically, a solid solution composition of 85.5-87.5 molar percent lead zinc niobate, 9.5-9.7 molar percent lead titanate and 3-5 molar percent of a barium titanate dopant or strontium titanate dopant has exhibited desirable electrical properties. This specific composition is well suited for use in a 3-1 connectivity composite, which can be used as a hydrophone. These compositions may be prepared by oxide sintering techniques utilizing extremely high purity materials, or alternatively, by a sol gel process.

    摘要翻译： 本发明涉及具有优异电性能的新陶瓷压电组合物，用于制备新的压电组合物的方法和新组合物的应用。 具体地说，85.5-87.5摩尔％的铌酸铅锌，9.5-9.7摩尔％的钛酸铅和3-5摩尔％的钛酸钡掺杂剂或钛酸锶钛掺杂剂的固溶体组合物表现出所需的电性能。 该特定组合物非常适用于可用作水听器的3-1连接复合材料。 这些组合物可以通过使用极高纯度材料的氧化物烧结技术，或者通过溶胶凝胶法制备。

    Method for LTCC circuitry
    5.
    发明授权
    Method for LTCC circuitry 有权
    LTCC电路的方法

    公开(公告)号：US07820490B2

    公开(公告)日：2010-10-26

    申请号：US11450417

    申请日：2006-06-12

    申请人： Cynthia W. Berry ,  Alex E. Bailey

    发明人： Cynthia W. Berry ,  Alex E. Bailey

    IPC分类号： H01L29/74

    CPC分类号： H01L23/49883 ,  H01L23/13 ,  H01L23/49833 ,  H01L2224/73265 ,  H01L2924/09701 ,  H05K1/092 ,  H05K1/182 ,  H05K3/248 ,  H05K3/328 ,  H05K2201/035 ,  H05K2203/049 ,  Y10T29/49018 ,  Y10T29/49078 ,  Y10T29/49155

    摘要： An LTCC (low temperature cofired ceramic) structure which has conductors to which leads are to be bonded for connection to external circuitry. The conductors include additives to promote adhesion to the ceramic layer. The presence of these additives degrade bonding performance. For better bondability of the leads, a pure conductor metal layer, devoid of the additives is placed on the conductors in areas where leads are to be bonded. This pure conductor metal layer may be cofired with the stack of ceramic layers or may be post fired after stack firing.

    摘要翻译： LTCC（低温共烧陶瓷）结构，其具有用于连接到外部电路的引线的导体。 导体包括用于促进与陶瓷层的粘附的添加剂。 这些添加剂的存在降低了粘合性能。 为了使引线具有更好的粘合性，在引线要被接合的区域中的导体上放置没有添加剂的纯导体金属层。 该纯导体金属层可以与陶瓷层的堆叠共烧，或者可以在堆叠烧制之后进行烧制。

    Method of laminating low temperature co-fired ceramic (LTCC) Material
    8.
    发明授权
    Method of laminating low temperature co-fired ceramic (LTCC) Material 有权
    低温共烧陶瓷（LTCC）材料的层压方法

    公开(公告)号：US07240424B2

    公开(公告)日：2007-07-10

    申请号：US10922850

    申请日：2004-08-23

    申请人： Cynthia W. Berry ,  Alex E. Bailey

    发明人： Cynthia W. Berry ,  Alex E. Bailey

    IPC分类号： H05K3/36 ,  B32B37/02

    CPC分类号： H01M8/12 ,  H01L21/481 ,  H05K1/0306 ,  H05K1/183 ,  H05K3/4629 ,  H05K3/4697 ,  H05K2203/061 ,  H05K2203/063 ,  Y10T29/43 ,  Y10T29/435 ,  Y10T29/49126 ,  Y10T156/1062

    摘要： A method of forming an LTCC structure having at least one open cavity on each of first and second opposing sides is disclosed that includes the steps of forming a first LTCC structure including a first side having a plurality of cavities and a second side, subjecting the first LTCC structure to a first pressure, forming a second LTCC structure including a first side having a plurality of cavities and a second side, subjecting the second LTCC structure to a second pressure, arranging the first LTCC structure and the second LTCC structure such that the first LTCC structure second side faces the second LTCC structure second side, and subjecting the placed-together first and second LTCC structures to a third pressure to join the first LTCC structure to the second LTCC structure. A product formed by the subject method is also disclosed.

    摘要翻译： 公开了一种在第一和第二相对侧的每一个上形成具有至少一个开放空腔的LTCC结构的方法，其包括形成第一LTCC结构的步骤，所述第一LTCC结构包括具有多个腔和第二侧的第一侧， LTCC结构形成第一压力，形成包括具有多个空腔的第一侧和第二侧的第二LTCC结构，使第二LTCC结构受到第二压力，将第一LTCC结构和第二LTCC结构布置成使得第一 LTCC结构第二面朝向第二LTCC结构第二面，并且将放置在一起的第一和第二LTCC结构施加到第三压力以将第一LTCC结构连接到第二LTCC结构。 还公开了通过本发明方法形成的产品。

    Total internal reflection spatial light modulation apparatus and method of fabrication thereof
    10.
    发明授权
    Total internal reflection spatial light modulation apparatus and method of fabrication thereof 失效
    全内反射空间光调制装置及其制造方法

    公开(公告)号：US5455709A

    公开(公告)日：1995-10-03

    申请号：US48331

    申请日：1993-03-23

    申请人： Thomas C. Dula, III ,  Paul J. Caldwell ,  Alex E. Bailey

    发明人： Thomas C. Dula, III ,  Paul J. Caldwell ,  Alex E. Bailey

    IPC分类号： G02B26/08 ,  G02F1/05 ,  G02F1/19 ,  G09F9/37 ,  G02F1/36 ,  B23K26/00 ,  G02B26/00 ,  G02F1/03

    CPC分类号： G02B26/0833 ,  G02B26/0858 ,  G02F1/05 ,  G02F1/195 ,  G09F9/372

    摘要： Total internal light spatial light modulation apparatus includes a light source for projecting infrared light; a prism for reflecting the projected light from an internal surface therein; and an array of pixel posts made of electrostrictive material and positioned proximate a back face of the internal surface for selectively eliminating pixel areas of reflection of the projected light to form an image thereby. A multiplexer is provided to select a set of pixel posts to be electrically charged which corresponds with the image, and electrical contacts are formed on each pixel post no permit electrical charging of each selected pixel post. Method of fabricating the pixel post array, wherein each row of the pixel post array is formed as a monolithic structure, includes the steps of providing a slab of alternate layers of ferroelectric and electrically-conductive material; vapor-depositing electrical contacts on the slabs in electrical communication with the layers of electrically-conductive material at locations corresponding to the pixel posts to be fabricated; securing the slabs together in a front-to-back relationship with divider plates positioned therebetween; and cross-cutting a number of grooves through the slabs to define the pixel posts of each row.

    摘要翻译： 总内部光空间光调制装置包括用于投射红外光的光源; 用于从其内表面反射投影光的棱镜; 以及由电致伸缩材料制成的并且靠近内表面的背面定位的像素柱阵列，用于选择性地消除投影光的反射的像素区域以形成图像。 提供多路复用器以选择与图像相对应的要充电的一组像素柱，并且在每个像素柱上形成电触点，不允许每个选择的像素柱的电荷。 制造像素柱阵列的方法，其中像素柱阵列的每行形成为单片结构，包括提供铁电和导电材料的交替层的平板的步骤; 在与要制造的像素柱相对应的位置处，在导电材料层上电气地沉积在平板上的电触点; 将板坯以与之相对的分隔板以前后关系固定在一起; 并跨越板坯横切多个凹槽以限定每行的像素柱。