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    NAND flash memory devices and methods of fabricating the same
    7.
    发明授权
    NAND flash memory devices and methods of fabricating the same 失效
    NAND闪存器件及其制造方法

    公开(公告)号：US07608507B2

    公开(公告)日：2009-10-27

    申请号：US12216393

    申请日：2008-07-03

    申请人： Ji-Hwon Lee ,  Sung-Hoi Hur

    发明人： Ji-Hwon Lee ,  Sung-Hoi Hur

    IPC分类号： H01L21/336

    CPC分类号： H01L27/115 ,  H01L27/11519 ,  H01L27/11521 ,  H01L27/11524 ,  H01L27/11568

    摘要： A NAND includes a device isolation pattern disposed in a region of a substrate defining a plurality of active regions. Memory transistors having memory gate patterns, constituting a cell string, cross the plurality of active regions. Select transistors are disposed over the memory transistors, and lower plugs are disposed on each side of the cell string to electrically connect the plurality of active regions on both sides of the cell string and the select transistors.

    摘要翻译： NAND包括设置在限定多个有源区的衬底的区域中的器件隔离图案。 具有构成单元串的存储器栅极图案的存储晶体管跨过多个有源区。 选择晶体管设置在存储晶体管的上方，并且下部插头设置在单元串的每一侧，以电连接单元串和选择晶体管的两侧上的多个有源区。

    NAND-type flash memory devices and methods of fabricating the same
    8.
    发明申请
    NAND-type flash memory devices and methods of fabricating the same 有权
    NAND型闪存器件及其制造方法

    公开(公告)号：US20050023600A1

    公开(公告)日：2005-02-03

    申请号：US10921656

    申请日：2004-08-19

    申请人： Kwang-Shik Shin ,  Kyu-Charn Park ,  Heung-Kwun Oh ,  Sung-Hoi Hur ,  Sang-Bin Song ,  Jung-Dal Choi

    发明人： Kwang-Shik Shin ,  Kyu-Charn Park ,  Heung-Kwun Oh ,  Sung-Hoi Hur ,  Sang-Bin Song ,  Jung-Dal Choi

    IPC分类号： H01L21/768 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/78 ,  H01L29/788

    CPC分类号： H01L27/11521 ,  H01L21/76802 ,  H01L27/115 ,  H01L27/11524

    摘要： NAND-type flash memory devices and methods of fabricating the same are provided. The NAND-type flash memory device includes a plurality of isolation layers running parallel with each other, which are formed at predetermined regions of a semiconductor substrate. This device also includes a string selection line pattern, a plurality of word line patterns and a ground selection line pattern which cross over the isolation layers and active regions between the isolation layers. Source regions are formed in the active regions adjacent to the ground selection line patterns and opposite the string selection line pattern. The source regions and the isolation layers between the source regions are covered with a common source line running parallel with the ground selection line pattern.

    摘要翻译： 提供了NAND​​型闪存器件及其制造方法。 NAND型闪速存储器件包括彼此平行延伸的多个隔离层，它们形成在半导体衬底的预定区域。 该装置还包括串联选择线图案，多个字线图案和跨越隔离层和隔离层之间的有源区域的接地选择线图案。 源极区域形成在与地选择线图案相邻的有源区域中并且与串选择线图案相反。 源极区域和源极区域之间的隔离层被与地选择线图案平行延伸的公共源极线覆盖。

    Non-volatile memory device and method for fabricating the same
    9.
    发明授权
    Non-volatile memory device and method for fabricating the same 有权

    公开(公告)号：US06677639B2

    公开(公告)日：2004-01-13

    申请号：US10188389

    申请日：2002-07-01

    申请人： Chang-Hyun Lee ,  Jung-Dal Choi ,  Byung-Kwan You ,  Sung-Hoi Hur

    发明人： Chang-Hyun Lee ,  Jung-Dal Choi ,  Byung-Kwan You ,  Sung-Hoi Hur

    IPC分类号： H01L2976

    CPC分类号： H01L27/11568 ,  H01L27/115

    摘要： A non-volatile memory device and fabrication method thereof are provided. A floating region is formed on an active region on a substrate. Trenches define the active region. The floating region is made of an ONO layer. A gate electrode is formed on the floating region. A mask is formed on the gate electrode. A thermal oxidation is performed to make a sidewall oxide and a trench oxide on the sidewall of the gate electrode and the trench, respectively. As a result, the widths of the gate electrode and the active region become less than the width of the floating region, thereby forming protrusions at ends of the floating region. Isolation regions are formed in the trenches and include the sidewall oxide and the trench oxide. The isolation regions surround the protrusions. As a result, electric field induced on the sidewall of the floating region is decreased. Moreover, the thermal oxidation cures any damage to the sidewalls of the floating region. Accordingly, leakage current can be substantially suppressed at the boundary region between the isolation region and the floating region.

    Method of forming non-volatile memory having floating trap type device
    10.
    发明授权
    Method of forming non-volatile memory having floating trap type device 失效
    形成具有浮动陷阱型装置的非易失性存储器的方法

    公开(公告)号：US06677200B2

    公开(公告)日：2004-01-13

    申请号：US10194182

    申请日：2002-07-12

    申请人： Chang-Hyun Lee ,  Jung-Dal Choi ,  Sung-Hoi Hur

    发明人： Chang-Hyun Lee ,  Jung-Dal Choi ,  Sung-Hoi Hur

    IPC分类号： H01L213366

    CPC分类号： H01L29/792 ,  H01L21/28282 ,  H01L29/66833 ,  Y10S438/954

    摘要： A method of forming a non-volatile memory having a floating trap-type device is disclosed in the present invention. In the method, a relatively thick thermal oxide layer is formed at a semiconductor substrate and patterned to leave a thick thermal oxide pattern at a high-voltage region (a high-voltage region defining step). An oxide-nitride-oxide (ONO) layer is formed over substantially the entire surface (the substantial surface) of the semiconductor substrate and patterned to leave an ONO pattern at a cell memory region (a cell memory region defining step). After the high-voltage region defining step and the cell memory region defining step, a thermal oxidizing process is performed with respect to the semiconductor substrate where a low-voltage region is exposed, thereby forming a relatively thin gate insulation layer for a low-voltage type device (a low-voltage region defining region).

    摘要翻译： 在本发明中公开了形成具有浮动陷阱型装置的非易失性存储器的方法。 在该方法中，在半导体衬底上形成相对较厚的热氧化物层，并将其图案化以在高电压区域（高电压区域限定步骤）处留下厚的热氧化物图案。 在半导体衬底的基本上整个表面（基本表面）上形成氧化物 - 氧化物（ONO）层，并将其图案化以在单元存储区（单元存储区定义步骤）处留下ONO图案。 在高电压区域定义步骤和电池存储区域限定步骤之后，对于暴露低电压区域的半导体衬底进行热氧化处理，从而形成用于低电压的较薄的栅极绝缘层 （低电压区域限定区域）。