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    Triode structure field emission device
    2.
    发明授权
    Triode structure field emission device 失效
    三极结构场发射装置

    公开(公告)号：US06420726B2

    公开(公告)日：2002-07-16

    申请号：US09749813

    申请日：2000-12-28

    申请人： Yong-soo Choi ,  Jun-hee Choi ,  Nae-sung Lee ,  Jong-min Kim

    发明人： Yong-soo Choi ,  Jun-hee Choi ,  Nae-sung Lee ,  Jong-min Kim

    IPC分类号： H01L2906

    CPC分类号： H01J3/022 ,  H01J21/105

    摘要： A triode field emission device using a field emission material and a driving method thereof are provided. In this device, gate electrodes serving to take electrons out of a field emission material on cathodes are installed on a substrate below the cathodes, so that the manufacture of the device is easy. Also, electrons emitted from the field emission material are controlled by controlling gate voltage.

    摘要翻译： 提供了使用场致发射材料的三极场场发射装置及其驱动方法。 在该器件中，用于从阴极上的场发射材料中取出电子的栅电极安装在阴极下方的衬底上，使得器件的制造容易。 此外，通过控制栅极电压来控制从场发射材料发射的电子。

    2D/3D switchable integral imaging systems
    3.
    发明授权
    2D/3D switchable integral imaging systems 有权
    2D / 3D可切换积分成像系统

    公开(公告)号：US08319902B2

    公开(公告)日：2012-11-27

    申请号：US12654701

    申请日：2009-12-29

    申请人： Sun-il Kim ,  Jong-min Kim

    发明人： Sun-il Kim ,  Jong-min Kim

    IPC分类号： G02F1/1335

    CPC分类号： G02F1/29 ,  G02B3/14 ,  G02B26/004 ,  G02F1/1323 ,  G02F1/13439 ,  G02F2001/294 ,  G02F2202/36 ,  H04N13/305 ,  H04N13/359

    摘要： An integral imaging system may include a lens unit. The lens unit may include a first substrate; a second substrate; a first electrode on the first substrate; a second electrode on the second substrate; a liquid crystal layer between the first and second substrates; and an array of nanostructures protruding from the first substrate into the liquid crystal layer. The first and second electrodes may be configured to apply one or more voltages to the array of nanostructures. When the one or more voltages are applied to the array of nanostructures, one or more electric fields may be formed between the array of nanostructures and the second electrode, varying an arrangement of molecules in the liquid crystal layer and forming a refractive index distribution in the liquid crystal layer.

    摘要翻译： 整体成像系统可以包括透镜单元。 透镜单元可以包括第一基板; 第二基板; 第一基板上的第一电极; 第二基板上的第二电极; 第一和第二基板之间的液晶层; 以及从第一基板突出到液晶层的纳米结构的阵列。 第一和第二电极可以被配置为向纳米结构阵列施加一个或多个电压。 当将一个或多个电压施加到纳米结构阵列时，可以在纳米结构阵列和第二电极之间形成一个或多个电场，改变液晶层中分子的排列并在其中形成折射率分布 液晶层。

    2D/3D switchable integral imaging systems
    4.
    发明申请
    2D/3D switchable integral imaging systems 有权
    2D / 3D可切换积分成像系统

    公开(公告)号：US20100208152A1

    公开(公告)日：2010-08-19

    申请号：US12654701

    申请日：2009-12-29

    申请人： Sun-il Kim ,  Jong-min Kim

    发明人： Sun-il Kim ,  Jong-min Kim

    IPC分类号： G02F1/29

    CPC分类号： G02F1/29 ,  G02B3/14 ,  G02B26/004 ,  G02F1/1323 ,  G02F1/13439 ,  G02F2001/294 ,  G02F2202/36 ,  H04N13/305 ,  H04N13/359

    摘要： An integral imaging system may include a lens unit. The lens unit may include a first substrate; a second substrate; a first electrode on the first substrate; a second electrode on the second substrate; a liquid crystal layer between the first and second substrates; and an array of nanostructures protruding from the first substrate into the liquid crystal layer. The first and second electrodes may be configured to apply one or more voltages to the array of nanostructures. When the one or more voltages are applied to the array of nanostructures, one or more electric fields may be formed between the array of nanostructures and the second electrode, varying an arrangement of molecules in the liquid crystal layer and forming a refractive index distribution in the liquid crystal layer.

    摘要翻译： 整体成像系统可以包括透镜单元。 透镜单元可以包括第一基板; 第二基板; 第一基板上的第一电极; 第二基板上的第二电极; 第一和第二基板之间的液晶层; 以及从第一基板突出到液晶层的纳米结构的阵列。 第一和第二电极可以被配置为向纳米结构阵列施加一个或多个电压。 当将一个或多个电压施加到纳米结构阵列时，可以在纳米结构阵列和第二电极之间形成一个或多个电场，改变液晶层中分子的排列并在其中形成折射率分布 液晶层。

    Constant voltage output generator with proportional feedback and control method of the same
    5.
    发明授权
    Constant voltage output generator with proportional feedback and control method of the same 有权
    恒压输出发生器具有比例反馈和控制方式相同

    公开(公告)号：US08598947B2

    公开(公告)日：2013-12-03

    申请号：US13085546

    申请日：2011-04-13

    申请人： Jong-min Kim

    发明人： Jong-min Kim

    IPC分类号： G05F1/575

    CPC分类号： G05F1/575

    摘要： An electric device and a control method of the same, the electric device including a load terminal, a constant voltage output unit to generate an output voltage to the load terminal, a feedback circuit having a plurality of feedback circuit elements to generate a feedback signal to the constant voltage output unit to adjust the output voltage, and a controller to set a power mode of the electric device and to generate a control signal according to an enable signal and the set power mode such that the control signal corresponds to one or more of the feedback circuit elements to adjust the feedback signal, wherein the enable signal corresponds to a level of the output voltage.

    摘要翻译： 一种电气装置及其控制方法，所述电气装置包括负载端子，向所述负载端子产生输出电压的恒压输出单元，具有多个反馈电路元件的反馈电路，以产生反馈信号， 所述恒压输出单元用于调节所述输出电压，以及控制器，用于设置所述电气设备的功率模式，并根据使能信号和所述设定功率模式产生控制信号，使得所述控制信号对应于 反馈电路元件来调整反馈信号，其中使能信号对应于输出电压的电平。

    Mask used for LIGA process, method of manufacturing the mask, and method of manufacturing microstructure using LIGA process
    8.
    发明授权
    Mask used for LIGA process, method of manufacturing the mask, and method of manufacturing microstructure using LIGA process 有权
    用于LIGA工艺的掩模，制造掩模的方法以及使用LIGA工艺制造微结构的方法

    公开(公告)号：US07609805B2

    公开(公告)日：2009-10-27

    申请号：US11896273

    申请日：2007-08-30

    申请人： Chan-wook Baik ,  Yong-wan Jin ,  Gun-sik Park ,  Jong-min Kim ,  Young-min Shin ,  Jin-kyu So

    发明人： Chan-wook Baik ,  Yong-wan Jin ,  Gun-sik Park ,  Jong-min Kim ,  Young-min Shin ,  Jin-kyu So

    IPC分类号： G21K5/00

    CPC分类号： G03F7/00 ,  G03F1/22 ,  G03F9/7053 ,  G03F9/7076

    摘要： A mask used for a Lithographie, Galvanofomung, and Abformung (LIGA) process, a method for manufacturing the mask, and a method for manufacturing a microstructure using a LIGA process. The method for manufacturing the microstructure using the LIGA process contemplates forming a substrate for the microstructure, a plurality of photosensitive layers, each photosensitive layer having a plating hole and an aligning pinhole, and an aligning pin capable of being inserted into the aligning pinhole, with the aligning pinholes of the photosensitive layers being formed in corresponding positions, and repeating a process of stacking the photosensitive layer on the substrate for the microstructure and a process of forming a plating layer by plating the plating hole of the stacked photosensitive layer with a metal for a number of times corresponding to the number of the photosensitive layers, and when the photosensitive layers are stacked on the substrate for the structure, the photosensitive layers being aligned with one another by inserting the aligning pin into the aligning pinholes of all the photosensitive layers stacked on the substrate for the microstructure to penetrate all the photosensitive layers.

    摘要翻译： 用于石版印刷，Galvanofomung和Abformung（LIGA）工艺的掩模，用于制造掩模的方法以及使用LIGA工艺制造微结构的方法。 使用LIGA方法制造微结构的方法考虑形成用于微结构的基底，多个感光层，每个感光层具有电镀孔和对准针孔，以及能够插入到对准针孔中的对准销， 感光层的对准针孔形成在相应的位置上，并且重复将用于微结构的基板上的感光层层叠的工艺和通过用金属镀覆层叠的感光层的电镀孔来形成镀层的工艺 对应于感光层的数量的次数，并且当感光层堆叠在用于结构的基板上时，感光层通过将对准销插入到所有感光层的对准针孔中而彼此对准 在基板上用于微结构穿透 感光层。

    Field emission type backlight device
    9.
    发明申请
    Field emission type backlight device 失效
    场发射型背光装置

    公开(公告)号：US20050179380A1

    公开(公告)日：2005-08-18

    申请号：US11048738

    申请日：2005-02-03

    申请人： Tae-sik Oh ,  Jong-min Kim ,  Jae-eun Jung ,  Jung-woo Kim ,  Hang-woo Lee

    发明人： Tae-sik Oh ,  Jong-min Kim ,  Jae-eun Jung ,  Jung-woo Kim ,  Hang-woo Lee

    IPC分类号： G02F1/13357 ,  H01J3/02 ,  H01J63/06 ,  H01J1/00 ,  H01J17/49

    CPC分类号： B82Y10/00 ,  G02F1/133602 ,  H01J3/022 ,  H01J63/06 ,  H01J2201/30469

    摘要： A field emission type backlight device can include upper and lower substrates facing each other with a gap between them, an anode electrode on a lower side of the upper substrate, a fluorescent layer on a lower side of the anode electrode, a lower gate electrode on an upper side of the lower substrate, an insulating layer on an upper side of the lower gate electrode, a cathode electrode on an upper side of the insulating layer, and a gate electrode that is provided on an upper side of the insulating layer and electrically connected to the lower gate electrode.

    摘要翻译： 场致发射型背光装置可以包括彼此面对的上下基板，上基板的下侧的阳极电极，阳极电极的下侧的荧光层， 下基板的上侧，下部栅电极的上侧的绝缘层，绝缘层的上侧的阴极，以及设置在绝缘层的上侧的电极，电绝缘层 连接到下栅电极。

    Method of fabricating a high voltage semiconductor device using SIPOS
    10.
    发明授权
    Method of fabricating a high voltage semiconductor device using SIPOS 失效
    使用SIPOS制造高压半导体器件的方法

    公开(公告)号：US06660570B2

    公开(公告)日：2003-12-09

    申请号：US10140181

    申请日：2002-05-08

    申请人： Jin-kyeong Kim ,  Jong-min Kim ,  Kyung-wook Kim ,  Tae-hoon Kim ,  Cheol Choi ,  Chang-wook Kim

    发明人： Jin-kyeong Kim ,  Jong-min Kim ,  Kyung-wook Kim ,  Tae-hoon Kim ,  Cheol Choi ,  Chang-wook Kim

    IPC分类号： H01L21332

    CPC分类号： H01L29/405 ,  H01L29/66272 ,  H01L29/73 ,  H01L29/7322

    摘要： A high voltage semiconductor device including a semiconductor substrate on which a semi-insulating polycrystalline silicon layer is formed to alleviate electric field concentration in a field region, is disclosed. A thermal oxide layer is formed on the semi-insulating polycrystalline silicon layer to serve as a protective layer. The thermal oxide layer forms a good interface with the semi-insulating polycrystalline silicon layer compared to a wet etched oxide layer or a chemical vapor deposition (CVD) oxide layer, thereby decreasing the amount of leakage current. In addition, compared to a dual semi-insulating polycrystalline silicon layer, the thermal oxide layer exhibits a high surface protection effect and a high resistance against dielectric breakdown. It also allows a great reduction in fabrication time. In particular, the semi-insulating polycrystalline silicon layer is removed from the active region, thereby preventing the direct current (DC) gain of a device from being lowered within a low collector current range caused by the semi-insulating polycrystalline silicon layer.

    摘要翻译： 公开了一种包括半导体衬底的高电压半导体器件，半导体衬底上形成有半绝缘多晶硅层以减轻场区域中的电场集中。 在半绝缘多晶硅层上形成热氧化层作为保护层。 与湿蚀刻氧化物层或化学气相沉积（CVD）氧化物层相比，热氧化物层与半绝缘多晶硅层形成良好的界面，从而减少漏电流量。 另外，与双半绝缘多晶硅层相比，热氧化层具有高的表面保护效果和高耐电介质击穿电阻。 它还可以大大减少制造时间。 特别地，从有源区域去除半绝缘多晶硅层，从而防止器件的直流（DC）增益在由半绝缘多晶硅层引起的集电极电流范围内降低。