公开(公告)号：US08598947B2

公开(公告)日：2013-12-03

申请号：US13085546

申请日：2011-04-13

Applicant: Jong-min Kim

Inventor： Jong-min Kim

IPC: G05F1/575

CPC classification number: G05F1/575

Abstract: An electric device and a control method of the same, the electric device including a load terminal, a constant voltage output unit to generate an output voltage to the load terminal, a feedback circuit having a plurality of feedback circuit elements to generate a feedback signal to the constant voltage output unit to adjust the output voltage, and a controller to set a power mode of the electric device and to generate a control signal according to an enable signal and the set power mode such that the control signal corresponds to one or more of the feedback circuit elements to adjust the feedback signal, wherein the enable signal corresponds to a level of the output voltage.

Abstract translation: 一种电气装置及其控制方法，所述电气装置包括负载端子，向所述负载端子产生输出电压的恒压输出单元，具有多个反馈电路元件的反馈电路，以产生反馈信号， 所述恒压输出单元用于调节所述输出电压，以及控制器，用于设置所述电气设备的功率模式，并根据使能信号和所述设定功率模式产生控制信号，使得所述控制信号对应于 反馈电路元件来调整反馈信号，其中使能信号对应于输出电压的电平。

公开(公告)号：US08445366B2

公开(公告)日：2013-05-21

申请号：US12457916

申请日：2009-06-25

Applicant: Jung-hyun Lee ,  Jong-min Kim ,  Dong-joon Ma ,  Chang-soo Lee

Inventor： Jung-hyun Lee ,  Jong-min Kim ,  Dong-joon Ma ,  Chang-soo Lee

IPC: H01L21/428 ,  H01L21/477

CPC classification number: H01L21/02689 ,  H01J37/317 ,  H01J2237/3156 ,  H01J2237/316 ,  H01L21/02532

Abstract: Electron beam annealing apparatuses for annealing a thin layer on a substrate and annealing methods using the apparatuses are provided. The electron beam annealing apparatuses may include an electron beam scanning unit that may scan a pulsed electron beam onto a substrate.

Abstract translation: 提供了用于退火衬底上的薄层的电子束退火装置和使用该装置的退火方法。 电子束退火装置可以包括可以将脉冲电子束扫描到衬底上的电子束扫描单元。

公开(公告)号：US08319902B2

公开(公告)日：2012-11-27

申请号：US12654701

申请日：2009-12-29

Applicant: Sun-il Kim ,  Jong-min Kim

Inventor： Sun-il Kim ,  Jong-min Kim

IPC: G02F1/1335

CPC classification number: G02F1/29 ,  G02B3/14 ,  G02B26/004 ,  G02F1/1323 ,  G02F1/13439 ,  G02F2001/294 ,  G02F2202/36 ,  H04N13/305 ,  H04N13/359

Abstract: An integral imaging system may include a lens unit. The lens unit may include a first substrate; a second substrate; a first electrode on the first substrate; a second electrode on the second substrate; a liquid crystal layer between the first and second substrates; and an array of nanostructures protruding from the first substrate into the liquid crystal layer. The first and second electrodes may be configured to apply one or more voltages to the array of nanostructures. When the one or more voltages are applied to the array of nanostructures, one or more electric fields may be formed between the array of nanostructures and the second electrode, varying an arrangement of molecules in the liquid crystal layer and forming a refractive index distribution in the liquid crystal layer.

Abstract translation: 整体成像系统可以包括透镜单元。 透镜单元可以包括第一基板; 第二基板; 第一基板上的第一电极; 第二基板上的第二电极; 第一和第二基板之间的液晶层; 以及从第一基板突出到液晶层的纳米结构的阵列。 第一和第二电极可以被配置为向纳米结构阵列施加一个或多个电压。 当将一个或多个电压施加到纳米结构阵列时，可以在纳米结构阵列和第二电极之间形成一个或多个电场，改变液晶层中分子的排列并在其中形成折射率分布 液晶层。

公开(公告)号：US20110168980A1

公开(公告)日：2011-07-14

申请号：US12801892

申请日：2010-06-30

Applicant: Jae-hyun Hur ,  Jong-jin Park ,  Seung-nam Cha ,  Jong-min Kim ,  Chi-yul Yoon

Inventor： Jae-hyun Hur ,  Jong-jin Park ,  Seung-nam Cha ,  Jong-min Kim ,  Chi-yul Yoon

IPC: H01L29/775 ,  H01B3/30 ,  D01D5/084 ,  D01D5/06 ,  D01D5/30 ,  D01D5/08 ,  D01D5/11 ,  H01B1/12

CPC classification number: H01L29/775 ,  B82Y10/00 ,  D01D5/34 ,  D01D5/36 ,  D01F1/09 ,  H01L29/0665 ,  H01L29/0673 ,  H01L51/0558 ,  Y10T428/2913

Abstract: A nanofiber composite including a nanofiber formed of a hydrophobic polymer, a nanowire formed of a conductive or semiconductive organic material that is oriented in the nanofiber in the longitudinal direction of the nanofiber, and an ionic active material.

Abstract translation: 一种纳米纤维复合体，其包含由疏水性聚合物形成的纳米纤维，由在纳米纤维中沿纳米纤维的长度方向取向的导电性或半导体性有机材料形成的纳米线，以及离子型活性物质。

公开(公告)号：US07609805B2

公开(公告)日：2009-10-27

申请号：US11896273

申请日：2007-08-30

Applicant: Chan-wook Baik ,  Yong-wan Jin ,  Gun-sik Park ,  Jong-min Kim ,  Young-min Shin ,  Jin-kyu So

Inventor： Chan-wook Baik ,  Yong-wan Jin ,  Gun-sik Park ,  Jong-min Kim ,  Young-min Shin ,  Jin-kyu So

IPC: G21K5/00

CPC classification number: G03F7/00 ,  G03F1/22 ,  G03F9/7053 ,  G03F9/7076

Abstract: A mask used for a Lithographie, Galvanofomung, and Abformung (LIGA) process, a method for manufacturing the mask, and a method for manufacturing a microstructure using a LIGA process. The method for manufacturing the microstructure using the LIGA process contemplates forming a substrate for the microstructure, a plurality of photosensitive layers, each photosensitive layer having a plating hole and an aligning pinhole, and an aligning pin capable of being inserted into the aligning pinhole, with the aligning pinholes of the photosensitive layers being formed in corresponding positions, and repeating a process of stacking the photosensitive layer on the substrate for the microstructure and a process of forming a plating layer by plating the plating hole of the stacked photosensitive layer with a metal for a number of times corresponding to the number of the photosensitive layers, and when the photosensitive layers are stacked on the substrate for the structure, the photosensitive layers being aligned with one another by inserting the aligning pin into the aligning pinholes of all the photosensitive layers stacked on the substrate for the microstructure to penetrate all the photosensitive layers.

Abstract translation: 用于石版印刷，Galvanofomung和Abformung（LIGA）工艺的掩模，用于制造掩模的方法以及使用LIGA工艺制造微结构的方法。 使用LIGA方法制造微结构的方法考虑形成用于微结构的基底，多个感光层，每个感光层具有电镀孔和对准针孔，以及能够插入到对准针孔中的对准销， 感光层的对准针孔形成在相应的位置上，并且重复将用于微结构的基板上的感光层层叠的工艺和通过用金属镀覆层叠的感光层的电镀孔来形成镀层的工艺 对应于感光层的数量的次数，并且当感光层堆叠在用于结构的基板上时，感光层通过将对准销插入到所有感光层的对准针孔中而彼此对准 在基板上用于微结构穿透 感光层。

公开(公告)号：US20050179380A1

公开(公告)日：2005-08-18

申请号：US11048738

申请日：2005-02-03

Applicant: Tae-sik Oh ,  Jong-min Kim ,  Jae-eun Jung ,  Jung-woo Kim ,  Hang-woo Lee

Inventor： Tae-sik Oh ,  Jong-min Kim ,  Jae-eun Jung ,  Jung-woo Kim ,  Hang-woo Lee

IPC: G02F1/13357 ,  H01J3/02 ,  H01J63/06 ,  H01J1/00 ,  H01J17/49

CPC classification number: B82Y10/00 ,  G02F1/133602 ,  H01J3/022 ,  H01J63/06 ,  H01J2201/30469

Abstract: A field emission type backlight device can include upper and lower substrates facing each other with a gap between them, an anode electrode on a lower side of the upper substrate, a fluorescent layer on a lower side of the anode electrode, a lower gate electrode on an upper side of the lower substrate, an insulating layer on an upper side of the lower gate electrode, a cathode electrode on an upper side of the insulating layer, and a gate electrode that is provided on an upper side of the insulating layer and electrically connected to the lower gate electrode.

Abstract translation: 场致发射型背光装置可以包括彼此面对的上下基板，上基板的下侧的阳极电极，阳极电极的下侧的荧光层， 下基板的上侧，下部栅电极的上侧的绝缘层，绝缘层的上侧的阴极，以及设置在绝缘层的上侧的电极，电绝缘层 连接到下栅电极。

公开(公告)号：US06660570B2

公开(公告)日：2003-12-09

申请号：US10140181

申请日：2002-05-08

Applicant: Jin-kyeong Kim ,  Jong-min Kim ,  Kyung-wook Kim ,  Tae-hoon Kim ,  Cheol Choi ,  Chang-wook Kim

Inventor： Jin-kyeong Kim ,  Jong-min Kim ,  Kyung-wook Kim ,  Tae-hoon Kim ,  Cheol Choi ,  Chang-wook Kim

IPC: H01L21332

CPC classification number: H01L29/405 ,  H01L29/66272 ,  H01L29/73 ,  H01L29/7322

Abstract: A high voltage semiconductor device including a semiconductor substrate on which a semi-insulating polycrystalline silicon layer is formed to alleviate electric field concentration in a field region, is disclosed. A thermal oxide layer is formed on the semi-insulating polycrystalline silicon layer to serve as a protective layer. The thermal oxide layer forms a good interface with the semi-insulating polycrystalline silicon layer compared to a wet etched oxide layer or a chemical vapor deposition (CVD) oxide layer, thereby decreasing the amount of leakage current. In addition, compared to a dual semi-insulating polycrystalline silicon layer, the thermal oxide layer exhibits a high surface protection effect and a high resistance against dielectric breakdown. It also allows a great reduction in fabrication time. In particular, the semi-insulating polycrystalline silicon layer is removed from the active region, thereby preventing the direct current (DC) gain of a device from being lowered within a low collector current range caused by the semi-insulating polycrystalline silicon layer.

Abstract translation: 公开了一种包括半导体衬底的高电压半导体器件，半导体衬底上形成有半绝缘多晶硅层以减轻场区域中的电场集中。 在半绝缘多晶硅层上形成热氧化层作为保护层。 与湿蚀刻氧化物层或化学气相沉积（CVD）氧化物层相比，热氧化物层与半绝缘多晶硅层形成良好的界面，从而减少漏电流量。 另外，与双半绝缘多晶硅层相比，热氧化层具有高的表面保护效果和高耐电介质击穿电阻。 它还可以大大减少制造时间。 特别地，从有源区域去除半绝缘多晶硅层，从而防止器件的直流（DC）增益在由半绝缘多晶硅层引起的集电极电流范围内降低。

公开(公告)号：US06420726B2

公开(公告)日：2002-07-16

申请号：US09749813

申请日：2000-12-28

Applicant: Yong-soo Choi ,  Jun-hee Choi ,  Nae-sung Lee ,  Jong-min Kim

Inventor： Yong-soo Choi ,  Jun-hee Choi ,  Nae-sung Lee ,  Jong-min Kim

IPC: H01L2906

CPC classification number: H01J3/022 ,  H01J21/105

Abstract: A triode field emission device using a field emission material and a driving method thereof are provided. In this device, gate electrodes serving to take electrons out of a field emission material on cathodes are installed on a substrate below the cathodes, so that the manufacture of the device is easy. Also, electrons emitted from the field emission material are controlled by controlling gate voltage.

Abstract translation: 提供了使用场致发射材料的三极场场发射装置及其驱动方法。 在该器件中，用于从阴极上的场发射材料中取出电子的栅电极安装在阴极下方的衬底上，使得器件的制造容易。 此外，通过控制栅极电压来控制从场发射材料发射的电子。

公开(公告)号：US5998916A

公开(公告)日：1999-12-07

申请号：US38050

申请日：1998-03-11

Applicant: Jong-min Kim

Inventor： Jong-min Kim

IPC: H01J3/02 ,  H01J9/02 ,  H01J1/05

CPC classification number: H01J3/022 ,  H01J9/025

Abstract: A field emission device in which resistors are used and a method for fabricating the same are provided. The resistor layer is formed by depositing diamond like carbon (DLC) on the cathodes by the PECVD method in the field emission device using the resistor according to the present invention. Accordingly, fabrication yield is high since the adhesion of the resistor layer to the cathodes is improved. Various types of resistor layers can be formed since the resistor layer has excellent chemical durability. The reliability and consistency of the fabrication process is improved since the doping level is easily controlled.

Abstract translation: 提供了使用电阻器的场致发射器件及其制造方法。 电阻层通过使用本发明的电阻器的场致发射器件中的PECVD方法在阴极上沉积金刚石状碳（DLC）而形成。 因此，由于电阻层与阴极的粘合性提高，所以制造成品率高。 可以形成各种类型的电阻层，因为电阻层具有优异的化学耐久性。 改善了制造工艺的可靠性和一致性，因为易于控制掺杂水平。

公开(公告)号：US5662815A

公开(公告)日：1997-09-02

申请号：US509459

申请日：1995-07-31

Applicant: Jong-min Kim

Inventor： Jong-min Kim

IPC: H01J9/02 ,  H01J1/30 ,  H01J1/304

CPC classification number: H01J1/3042 ,  H01J2329/00

Abstract: A multiple micro-tip field emission device is fabricated by forming a titanium adhesion layer under a striped tungsten cathode, etching the tungsten cathode radially using an aluminum mask and selectively etching the titanium adhesion layer, so that multiple micro-tips are formed due to the intrinsic internal stress of the tungsten itself. Thereby, the adjustment of the tip size is optionally available during the process and has excellent reproducibility since the process uses the intrinsic internal stress of the tungsten and the characteristic of a buffered oxide etching (BOE) method. Also, the output current can be controlled in a wide range from nA to mA because of the multiple micro-tips. By forming the tips with tungsten, the device has good strength, oxidation characteristics and work function and has good electrical, chemical and mechanical endurance.

Abstract translation: 通过在条状钨阴极下形成钛粘合层，使用铝掩模径向蚀刻钨阴极并选择性地蚀刻钛粘合层来制造多微尖端场致发射器件，从而由于形成多个微尖端 钨本身的内在内应力。 因此，由于该工艺使用钨的本征内应力和缓冲氧化物蚀刻（BOE）方法的特性，因此在工艺期间可选地调整尖端尺寸并且具有优异的再现性。 此外，由于多个微尖端，输出电流可以在从nA到mA的宽范围内控制。 通过钨形成尖端，该装置具有良好的强度，氧化特性和作用功能，具有良好的电气，化学和机械耐久性。