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1.发明申请EXPOSURE METHOD OF WAFER SUBSTRATE, MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE, AND EXPOSURE TOOL 审中-公开滤波器基板的曝光方法，半导体器件的制造方法和曝光工具公开(公告)号：US20160124323A1
公开(公告)日：2016-05-05
申请号：US14706871
申请日：2015-05-07
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Hsueh-Yi CHUNG , Yung-Cheng CHEN , Fei-Gwo TSAI , Chi-Hung LIAO , Shih-Chi FU , Wei-Ti HSU , Jui-Ping CHUANG , Tzong-Sheng CHANG , Kuei-Shun CHEN , Meng-Wei CHEN
CPC classification number: G03F7/70433 , G03F1/50 , G03F1/68 , G03F1/70 , G03F1/78 , G03F7/20 , G03F7/70141 , G03F7/70158 , G03F7/70716 , H01L22/30
Abstract: A method for exposing a wafer substrate includes forming a reticle having a device pattern. A relative orientation between the device pattern and a mask field of an exposure tool is determined based on mask field utilization. The reticle is loaded on the exposure tool. The wafer substrate is rotated based on an orientation of the device pattern. Radiation is projected through the reticle onto the rotated wafer substrate by the exposure tool, thereby imaging the device pattern onto the rotated wafer substrate.
Abstract translation: 曝光晶片衬底的方法包括形成具有器件图案的掩模版。 基于掩模场利用率确定曝光工具的装置图案和掩模场之间的相对取向。 掩模版装载在曝光工具上。 基于装置图案的取向旋转晶片基板。 通过曝光工具将辐射通过掩模版投影到旋转的晶片衬底上，从而将器件图案成像到旋转的晶片衬底上。
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Patent Agency Ranking
公开(公告)号：US20190131190A1
公开(公告)日：2019-05-02
申请号：US15797953
申请日：2017-10-30
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Long-Yi CHEN , Jia-Hong CHU , Chi-Wen LAI , Chia-Ching LIANG , Kai-Hsiung CHEN , Yu-Ching WANG , Po-Chung CHENG , Hsin-Chin LIN , Meng-Wei CHEN , Kuei-Shun CHEN
IPC: H01L21/66 , H01L21/67 , H01L21/033
CPC classification number: H01L23/544 , G03F7/70633 , G03F9/7076 , G03F9/7084 , H01L21/0337 , H01L21/0338 , H01L21/67259 , H01L21/76816 , H01L21/76877 , H01L22/12 , H01L22/30 , H01L2223/54426 , H01L2223/5446
Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first overlay grating over a substrate. The first overlay grating has a first strip portion and a second strip portion. The method includes forming a first layer over the first overlay grating. The first layer has a first trench elongated in a second elongated axis, the second elongated axis is substantially perpendicular to the first elongated axis, and the first trench extends across the first strip portion and the second strip portion. The method includes forming a second overlay grating over the first layer. The second overlay grating has a third strip portion and a fourth strip portion. The third strip portion and the fourth strip portion are elongated in the first elongated axis and are spaced apart from each other.
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公开(公告)号：US20210263425A1
公开(公告)日：2021-08-26
申请号：US17315087
申请日：2021-05-07
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor： Hsueh-Yi CHUNG , Yung-Cheng CHEN , Fei-Gwo TSAI , Chi-Hung LIAO , Shih-Chi FU , Wei-Ti HSU , Jui-Ping CHUANG , Tzong-Sheng CHANG , Kuei-Shun CHEN , Meng-Wei CHEN
Abstract: A method includes receiving a device design layout and a scribe line design layout surrounding the device design layout. The device design layout and the scribe line design layout are rotated in different directions. An optical proximity correction (OPC) process is performed on the rotated device design layout and the rotated scribe line design layout. A reticle includes the device design layout and the scribe line design layout is formed after performing the OPC process.
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公开(公告)号：US20200058595A1
公开(公告)日：2020-02-20
申请号：US16662970
申请日：2019-10-24
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Long-Yi CHEN , Jia-Hong CHU , Chi-Wen LAI , Chia-Ching LIANG , Kai-Hsiung CHEN , Yu-Ching WANG , Po-Chung CHENG , Hsin-Chin LIN , Meng-Wei CHEN , Kuei-Shun CHEN
IPC: H01L23/544 , G03F9/00 , G03F7/20 , H01L21/033 , H01L21/67 , H01L21/66
Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first overlay grating over a substrate. The method includes forming a layer over the first overlay grating. The method includes forming a second overlay grating over the layer. The second overlay grating has a third strip portion and a fourth strip portion, the third strip portion and the fourth strip portion are elongated in the first elongated axis and are spaced apart from each other, there is a second distance between a third sidewall of the third strip portion and a fourth sidewall of the fourth strip portion, the third sidewall faces away from the fourth strip portion, the fourth sidewall faces the third strip portion, the first distance is substantially equal to the second distance, and the first trench extends across the third strip portion and the fourth strip portion.
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公开(公告)号：US20200150546A1
公开(公告)日：2020-05-14
申请号：US16740256
申请日：2020-01-10
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor： Hsueh-Yi CHUNG , Yung-Cheng CHEN , Fei-Gwo TSAI , Chi-Hung LIAO , Shih-Chi FU , Wei-Ti HSU , Jui-Ping CHUANG , Tzong-Sheng CHANG , Kuei-Shun CHEN , Meng-Wei CHEN
Abstract: A method for exposing a wafer substrate includes forming a reticle having a device pattern. A relative orientation between the device pattern and a mask field of an exposure tool is determined based on mask field utilization. The reticle is loaded on the exposure tool. The wafer substrate is rotated based on an orientation of the device pattern. Radiation is projected through the reticle onto the rotated wafer substrate by the exposure tool, thereby imaging the device pattern onto the rotated wafer substrate.
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公开(公告)号：US20190004436A1
公开(公告)日：2019-01-03
申请号：US16127017
申请日：2018-09-10
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor： Hsueh-Yi CHUNG , Yung-Cheng CHEN , Fei-Gwo TSAI , Chi-Hung LIAO , Shih-Chi FU , Wei-Ti HSU , Jui-Ping CHUANG , Tzong-Sheng CHANG , Kuei-Shun CHEN , Meng-Wei CHEN
CPC classification number: G03F7/70433 , G03F1/50 , G03F1/68 , G03F1/70 , G03F1/78 , G03F7/20 , G03F7/70141 , G03F7/70158 , G03F7/70716 , H01L22/30
Abstract: A method for exposing a wafer substrate includes forming a reticle having a device pattern. A relative orientation between the device pattern and a mask field of an exposure tool is determined based on mask field utilization. The reticle is loaded on the exposure tool. The wafer substrate is rotated based on an orientation of the device pattern. Radiation is projected through the reticle onto the rotated wafer substrate by the exposure tool, thereby imaging the device pattern onto the rotated wafer substrate.
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