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    POLYGON-BASED OPTICAL PROXIMITY CORRECTION
    1.
    发明申请
    POLYGON-BASED OPTICAL PROXIMITY CORRECTION 有权
    基于POLYGON的光学近似校正

    公开(公告)号：US20150161321A1

    公开(公告)日：2015-06-11

    申请号：US14102350

    申请日：2013-12-10

    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

    Inventor： Wen-Li Cheng ,  Ming-Hui Chih ,  Yu-Po Tang ,  Chia-Ping Chiang ,  Cheng-Lung Tsai ,  Sheng-Wen Lin ,  Kuei-Liang Lu ,  Wen-Chun Huang ,  Ru-Gun Liu

    IPC: G06F17/50

    CPC classification number: G06F17/5081 ,  G03F1/36

    Abstract: Methods and systems for design of integrated circuits including performing OPC are discussed. In one embodiment, design data having a geometric feature is provided. A base feature is formed from the geometric feature, which has a substantially linear edge. A pseudo dissection point is determined on the base feature. Add or trim a polygon from the base feature to form a modified feature. An OPC process is performed on the modified feature to generate an output design. The output design is used to fabricate a semiconductor device on a semiconductor substrate.

    Abstract translation: 讨论了包括执行OPC在内的集成电路设计的方法和系统。 在一个实施例中，提供具有几何特征的设计数据。 基本特征由具有基本线性边缘的几何特征形成。 在基本特征上确定伪解剖点。 从基本特征添加或修剪多边形以形成修改的特征。 对修改的特征进行OPC处理以产生输出设计。 输出设计用于在半导体衬底上制造半导体器件。

    Methodology of optical proximity correction optimization
    2.
    发明授权
    Methodology of optical proximity correction optimization 有权
    光学邻近校正优化方法

    公开(公告)号：US09390217B2

    公开(公告)日：2016-07-12

    申请号：US14143677

    申请日：2013-12-30

    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

    Inventor： Hung-Chun Wang ,  Ming-Hui Chih ,  Yu-Po Tang ,  Chia-Ping Chiang ,  Feng-Ju Chang ,  Cheng Kun Tsai ,  Wen-Chun Huang ,  Ru-Gun Liu

    IPC: G06F17/50 ,  G03F1/36 ,  G03F1/70

    CPC classification number: G06F17/5081 ,  G03F1/36 ,  G03F1/70

    Abstract: A method for performing optical proximity correction (OPC) and evaluating OPC solutions is disclosed. An exemplary method includes receiving a design database corresponding to an IC circuit mask. A first OPC modification to a mask feature of the design database is made by performing a first OPC process. The OPC process includes: dividing the mask feature into child shapes and adjusting an attribute of a child shape based on an edge placement error (EPE) factor. A first lithography simulation is performed utilizing a first set of performance indexes after making the first OPC modification, and a second OPC modification to the mask feature is made based on a result of the first lithography simulation. A second lithography simulation of the mask feature is performed utilizing a second set of performance indexes to verify the first and second OPC modifications, and the design database is provided for manufacturing.

    Abstract translation: 公开了一种执行光学邻近校正（OPC）和评估OPC解决方案的方法。 一种示例性方法包括接收对应于IC电路掩码的设计数据库。 通过执行第一个OPC过程来对设计数据库的掩码特征进行第一个OPC修改。 OPC过程包括：基于边缘放置误差（EPE）因子将掩模特征划分为子形状并调整子形状的属性。 在进行第一OPC修改之后，利用第一组性能指标执行第一光刻模拟，并且基于第一光刻模拟的结果对掩模特征进行第二OPC修改。 使用第二组性能指标来执行掩模特征的第二光刻仿真以验证第一和第二OPC修改，并且为设计数据库提供制造。

    Novel Methodology of Optical Proximity Correction Optimization
    4.
    发明申请
    Novel Methodology of Optical Proximity Correction Optimization 有权
    光学接近校正优化的新方法

    公开(公告)号：US20140109026A1

    公开(公告)日：2014-04-17

    申请号：US14143677

    申请日：2013-12-30

    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

    Inventor： Hung-Chun Wang ,  Ming-Hui Chih ,  Yu-Po Tang ,  Chia-Ping Chiang ,  Feng-Ju Chang ,  Cheng Kun Tsai ,  Wen-Chun Huang ,  Ru-Gun Liu

    IPC: G06F17/50

    CPC classification number: G06F17/5081 ,  G03F1/36 ,  G03F1/70

    Abstract: A method for performing optical proximity correction (OPC) and evaluating OPC solutions is disclosed. An exemplary method includes receiving a design database corresponding to an IC circuit mask. A first OPC modification to a mask feature of the design database is made by performing a first OPC process. The OPC process includes: dividing the mask feature into child shapes and adjusting an attribute of a child shape based on an edge placement error (EPE) factor. A first lithography simulation is performed utilizing a first set of performance indexes after making the first OPC modification, and a second OPC modification to the mask feature is made based on a result of the first lithography simulation. A second lithography simulation of the mask feature is performed utilizing a second set of performance indexes to verify the first and second OPC modifications, and the design database is provided for manufacturing.

    Abstract translation: 公开了一种执行光学邻近校正（OPC）和评估OPC解决方案的方法。 一种示例性方法包括接收对应于IC电路掩码的设计数据库。 通过执行第一个OPC过程来对设计数据库的掩码特征进行第一个OPC修改。 OPC过程包括：基于边缘放置误差（EPE）因子将掩模特征划分为子形状并调整子形状的属性。 在进行第一OPC修改之后，利用第一组性能指标执行第一光刻模拟，并且基于第一光刻模拟的结果对掩模特征进行第二OPC修改。 使用第二组性能指标来执行掩模特征的第二光刻仿真以验证第一和第二OPC修改，并且为设计数据库提供制造。

    Polygon-based optical proximity correction
    5.
    发明授权
    Polygon-based optical proximity correction 有权
    基于多边形的光学邻近校正

    公开(公告)号：US09189588B2

    公开(公告)日：2015-11-17

    申请号：US14102350

    申请日：2013-12-10

    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

    Inventor： Wen-Li Cheng ,  Ming-Hui Chih ,  Yu-Po Tang ,  Chia-Ping Chiang ,  Cheng-Lung Tsai ,  Sheng-Wen Lin ,  Kuei-Liang Lu ,  Wen-Chun Huang ,  Ru-Gun Liu

    IPC: G06F17/50

    CPC classification number: G06F17/5081 ,  G03F1/36

    Abstract: Methods and systems for design of integrated circuits including performing OPC are discussed. In one embodiment, design data having a geometric feature is provided. A base feature is formed from the geometric feature, which has a substantially linear edge. A pseudo dissection point is determined on the base feature. Add or trim a polygon from the base feature to form a modified feature. An OPC process is performed on the modified feature to generate an output design. The output design is used to fabricate a semiconductor device on a semiconductor substrate.

    Abstract translation: 讨论了包括执行OPC在内的集成电路设计的方法和系统。 在一个实施例中，提供具有几何特征的设计数据。 基本特征由具有基本线性边缘的几何特征形成。 在基本特征上确定伪解剖点。 从基本功能添加或修剪多边形以形成修改的功能。 对修改的特征进行OPC处理以产生输出设计。 输出设计用于在半导体衬底上制造半导体器件。

    Microscope apparatus and method for phase image acquisition
    8.
    发明授权
    Microscope apparatus and method for phase image acquisition 有权

    公开(公告)号：US10295813B2

    公开(公告)日：2019-05-21

    申请号：US14559492

    申请日：2014-12-03

    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

    Inventor： Fu-Sheng Chu ,  Chih-Shiang Chou ,  Yu-Po Tang ,  Yan-Ying He

    IPC: G02B21/14 ,  G02B21/36 ,  G02B26/06

    Abstract: A microscope apparatus includes an electromagnetic wave source configured to generate an illuminating electromagnetic wave, a first beam splitter configured to split the illuminating electromagnetic wave into a first component along a first path and a second component along a second path, a movable reflector module configured to adjust a portion of the second path, and a second beam splitter configured to recombine the first component and the second component. An observing device is configured to receive the recombined first component and second component and the microscope apparatus is configured acquire a phase image from the observing device based on positioning of the movable reflector module and representative of an electric field distribution near an object located along the first path between the first beam splitter and the second beam splitter.

    Distinguishable IC patterns with encoded information
    9.
    发明授权
    Distinguishable IC patterns with encoded information 有权
    具有编码信息的不可区分的IC模式

    公开(公告)号：US08806392B2

    公开(公告)日：2014-08-12

    申请号：US13692845

    申请日：2012-12-03

    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

    Inventor： Shih-Ming Chang ,  Tzu-Chin Lin ,  Jen-Chieh Lo ,  Yu-Po Tang ,  Tsong-Hua Ou

    IPC: G06F17/50

    CPC classification number: G06F17/5081 ,  G06F17/5068 ,  G06F2217/12 ,  H01L23/544 ,  H01L27/0207 ,  H01L2223/54426 ,  H01L2223/54433 ,  H01L2223/54453 ,  H01L2924/0002 ,  Y02P90/265 ,  H01L2924/00

    Abstract: A method of designing an IC design layout having similar patterns filled with a plurality of indistinguishable dummy features, in a way to distinguish all the patterns, and an IC design layout so designed. To distinguish each pattern in the layout, deviations in size and/or position from some predetermined equilibrium values are encoded into a set of selected dummy features in each pattern at the time of creating dummy features during the design stage. By identifying such encoded dummy features and measuring the deviations from image information provided by, for example, a SEM picture of a wafer or photomask, the corresponding pattern can be located in the IC layout. For quicker and easier identification of the encoded dummy features from a given pattern, a set of predetermined anchor dummy features may be used.

    Abstract translation: 一种设计具有填充有多个不可区分的虚拟特征的相似图案的IC设计布局的方法，以区分所有图案的方式以及如此设计的IC设计布局。 为了区分布局中的每个图案，在设计阶段期间在创建虚拟特征时，将尺寸和/或位置与某些预定平衡值的偏差编码为每个图案中的一组选定的虚拟特征。 通过识别这种编码的虚拟特征并测量由例如晶片或光掩模的SEM照片提供的图像信息的偏差，相应的图案可以位于IC布局中。 为了从给定图案更快速和更容易地识别编码的虚拟特征，可以使用一组预定的锚虚拟特征。

    System and Method for Improving a Lithography Simulation Model
    10.
    发明申请
    System and Method for Improving a Lithography Simulation Model 审中-公开
    改进光刻模拟模型的系统和方法

    公开(公告)号：US20140123084A1

    公开(公告)日：2014-05-01

    申请号：US13666270

    申请日：2012-11-01

    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

    Inventor： Yu-Po Tang ,  Chih-Shiang Chou ,  Yan-Ting He ,  Ya-Ting Chang ,  Fu-Sheng Chu

    IPC: G06F17/50

    CPC classification number: G03F7/70441 ,  G03F1/36 ,  G03F7/705 ,  G03F7/70516

    Abstract: A method of performing initial optical proximity correction (OPC) with a calibrated lithography simulation model. The method includes providing a photomask having an integrated circuit (IC) pattern formed thereon, acquiring an aerial image of the IC pattern formed on the photomask using an optical microscope, and calibrating an optical component of the lithography simulation model based on the aerial image. The method also includes exposing and developing a photoresist layer on a semiconductor wafer using the photomask to form a post-development pattern on the photoresist layer, acquiring a post-development image of the post-development pattern on the photoresist layer, and calibrating the photoresist component of the lithography simulation model based on the post-development image. Further, the method includes performing initial optical proximity correction (OPC) on an IC design layout based on a simulation of the IC design layout by the lithography simulation model including the calibrated optical and photoresist components.

    Abstract translation: 用校准光刻仿真模型执行初始光学邻近校正（OPC）的方法。 该方法包括提供其上形成有集成电路（IC）图案的光掩模，使用光学显微镜获取形成在光掩模上的IC图案的空间图像，并且基于空中图像校准光刻模拟模型的光学部件。 该方法还包括使用光掩模在半导体晶片上曝光和显影光致抗蚀剂层，以在光致抗蚀剂层上形成后显影图案，获得光致抗蚀剂层上后显影图案的显影后图像，并校准光致抗蚀剂 基于后期图像的光刻仿真模型的组成部分。 此外，该方法包括基于通过包括校准的光学和光致抗蚀剂组件的光刻模拟模型对IC设计布局进行的模拟，在IC设计布局上执行初始光学邻近校正（OPC）。

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