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    In-Situ Deposition and Densification Treatment for Metal-Comprising Resist Layer
    3.
    发明公开
    In-Situ Deposition and Densification Treatment for Metal-Comprising Resist Layer 审中-公开

    公开(公告)号：US20240019778A1

    公开(公告)日：2024-01-18

    申请号：US18446750

    申请日：2023-08-09

    申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

    发明人： Yi-Chen Kuo ,  Chih-Cheng Liu ,  Yen-Yu Chen ,  Jr-Hung Li ,  Chi-Ming Yang ,  Tze-Liang Lee

    IPC分类号： G03F7/004 ,  G03F7/16 ,  H01L21/027

    CPC分类号： G03F7/0043 ,  G03F7/168 ,  H01L21/0274

    摘要： Metal-comprising resist layers (for example, metal oxide resist layers), methods for forming the metal-comprising resist layers, and lithography methods that implement the metal-comprising resist layers are disclosed herein that can improve lithography resolution. An exemplary method includes forming a metal oxide resist layer over a workpiece by performing deposition processes to form metal oxide resist sublayers of the metal oxide resist layer over the workpiece and performing a densification process on at least one of the metal oxide resist sublayers. Each deposition process forms a respective one of the metal oxide resist sublayers. The densification process increases a density of the at least one of the metal oxide resist sublayers. Parameters of the deposition processes and/or parameters of the densification process can be tuned to achieve different density profiles, different density characteristics, and/or different absorption characteristics to optimize patterning of the metal oxide resist layer.

    Ellipsometer and method for estimating thickness of film
    5.
    发明授权
    Ellipsometer and method for estimating thickness of film 有权

    公开(公告)号：US11255658B2

    公开(公告)日：2022-02-22

    申请号：US17002677

    申请日：2020-08-25

    申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

    发明人： Feng Yuan Hsu ,  Chi-Ming Yang ,  Ching-Hsiang Hsu ,  Chyi Shyuan Chern

    IPC分类号： G01B11/06 ,  H01L21/66 ,  G01N21/21

    摘要： An ellipsometer includes a light source, a polarizer, an asymmetric wavelength retarder, an analyzer and an optical detection component. The light source is configured to provide a light beam having multiple wavelengths incident to a sample. The polarizer is disposed between the light source and the sample, and configured to polarize the light beam. The asymmetric wavelength retarder is configured to provide a varied retardation effect on the light beam varied by wavelength. The analyzer is configured to analyze a polarization state of the light beam reflected by the sample. The optical detection component is configured to detect the light beam from the analyzer.

    Method of manufacturing semiconductor structure
    6.
    发明授权
    Method of manufacturing semiconductor structure 有权

    公开(公告)号：US10991604B2

    公开(公告)日：2021-04-27

    申请号：US16448888

    申请日：2019-06-21

    申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

    发明人： Jyh-Shiou Hsu ,  Chi-Ming Yang ,  Tzu Jeng Hsu

    IPC分类号： H01L21/67 ,  H01L21/768 ,  C25D5/34 ,  C25D7/12 ,  C23C28/02 ,  C25D3/38 ,  H01L23/532

    摘要： A method of manufacturing a semiconductor structure includes loading the substrate from a first load lock chamber into a first processing chamber; disposing a conductive layer over the substrate in the first processing chamber; loading the substrate from the first processing chamber into the first load lock chamber; loading the substrate from the first load lock chamber into an enclosure filled with an inert gas and disposed between the first load lock chamber and a second load lock chamber; loading the substrate from the enclosure into the second load lock chamber; loading the substrate from the second load lock chamber into a second processing chamber; disposing a conductive member over the conductive layer in the second processing chamber; loading the substrate from the second processing chamber into the second load lock chamber; and loading the substrate from the second load lock chamber into a second load port.

    Metal Conductor Chemical Mechanical Polish
    10.
    发明申请
    Metal Conductor Chemical Mechanical Polish 有权
    金属导体化学机械抛光

    公开(公告)号：US20140159243A1

    公开(公告)日：2014-06-12

    申请号：US14182912

    申请日：2014-02-18

    申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

    发明人： Soon-Kang Huang ,  Han-Hsin Kuo ,  Chi-Ming Yang ,  Shwang-Ming Jeng ,  Chin-Hsiang Lin

    IPC分类号： H01L23/538 ,  H01L21/67

    CPC分类号： H01L23/5386 ,  H01L21/02074 ,  H01L21/28079 ,  H01L21/67011 ,  H01L21/7684 ,  H01L29/495 ,  H01L29/78 ,  H01L2924/0002 ,  H01L2924/00

    摘要： The present disclosure provides a method of fabricating a semiconductor device, a semiconductor device fabricated by such a method, and a chemical mechanical polishing (CMP) tool for performing such a method. In one embodiment, a method of fabricating a semiconductor device includes providing an integrated circuit (IC) wafer including a metal conductor in a trench of a dielectric layer over a substrate, and performing a chemical mechanical polishing (CMP) process to planarize the metal conductor and the dielectric layer. The method further includes cleaning the planarized metal conductor and dielectric layer to remove residue from the CMP process, rinsing the cleaned metal conductor and dielectric layer with an alcohol, and drying the rinsed metal conductor and dielectric layer in an inert gas environment.

    摘要翻译： 本公开提供了一种制造半导体器件的方法，通过这种方法制造的半导体器件和用于执行这种方法的化学机械抛光（CMP）工具。 在一个实施例中，制造半导体器件的方法包括在衬底上的电介质层的沟槽中提供包括金属导体的集成电路（IC）晶片，以及执行化学机械抛光（CMP）工艺以平坦化金属导体 和电介质层。 该方法还包括清洁平坦化的金属导体和电介质层以除去CMP工艺中的残留物，用醇漂洗清洁的金属导体和介电层，并在惰性气体环境中干燥漂洗的金属导体和电介质层。