公开(公告)号：US12243849B2

公开(公告)日：2025-03-04

申请号：US17491378

申请日：2021-09-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Chittranjan Mohan Gupta ,  Yiqi Tang ,  Rajen Manicon Murugan ,  Jie Chen ,  Tianyi Luo

IPC: H01L25/065 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L25/00

Abstract: In examples, a semiconductor package comprises a substrate and multiple columns of semiconductor dies positioned approximately in parallel along a length of the substrate. The package also includes multiple passive components positioned between the multiple columns of semiconductor dies, the multiple passive components angled between 30 and 60 degrees relative to the length of the substrate, a pair of the multiple passive components having a gap therebetween that is configured to permit mold compound flow through capillary action. The package also includes a mold compound covering the substrate, the multiple columns of semiconductor dies, and the multiple passive components.

公开(公告)号：US09666553B2

公开(公告)日：2017-05-30

申请号：US14740190

申请日：2015-06-15

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Rajen Manicon Murugan ,  Minhong Mi ,  Gary Paul Morrison ,  Jie Chen ,  Kenneth Robert Rhyner ,  Stanley Craig Beddingfield ,  Chittranjan Mohan Gupta ,  Django Earl Trombley

IPC: H01Q1/00 ,  H01L23/00 ,  H01L23/66 ,  H01L23/498 ,  H01Q1/22 ,  H01Q23/00 ,  H05K1/02

CPC classification number: H01L23/66 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/48 ,  H01L24/49 ,  H01L2223/6611 ,  H01L2223/6627 ,  H01L2223/6655 ,  H01L2223/6677 ,  H01L2223/6683 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/1423 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/30111 ,  H01Q1/2283 ,  H01Q1/3233 ,  H01Q23/00 ,  H05K1/0222 ,  H05K1/0243 ,  H05K1/0245 ,  H05K1/0251 ,  H05K1/181 ,  H05K2201/09609 ,  H05K2201/10734 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599 ,  H01L2224/85399

Abstract: A millimeter wave integrated circuit (IC) chip. The IC chip comprises an IC die and a wire bond ball grid array package encapsulating the IC die. The wire bond ball grid array package comprises a solder ball array, a millimeter wave transmit channel, and a millimeter wave receive channel, wherein each millimeter wave transmit and receive channel electrically couples the IC die to a signal ball of the solder ball array and is configured to resonate at an operating frequency band of the millimeter wave IC chip.

公开(公告)号：US09941228B2

公开(公告)日：2018-04-10

申请号：US15497024

申请日：2017-04-25

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Rajen Manicon Murugan ,  Minhong Mi ,  Gary Paul Morrison ,  Jie Chen ,  Kenneth Robert Rhyner ,  Stanley Craig Beddingfield ,  Chittranjan Mohan Gupta ,  Django Earl Trombley

IPC: H01Q1/00 ,  H01L23/66 ,  H01L23/498 ,  H01L23/00 ,  H05K1/18 ,  H05K1/02 ,  H01Q1/22 ,  H01Q1/32 ,  H01Q23/00

CPC classification number: H01L23/66 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/48 ,  H01L24/49 ,  H01L2223/6611 ,  H01L2223/6627 ,  H01L2223/6655 ,  H01L2223/6677 ,  H01L2223/6683 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/1423 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/30111 ,  H01Q1/2283 ,  H01Q1/3233 ,  H01Q23/00 ,  H05K1/0222 ,  H05K1/0243 ,  H05K1/0245 ,  H05K1/0251 ,  H05K1/181 ,  H05K2201/09609 ,  H05K2201/10734 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599 ,  H01L2224/85399

Abstract: A millimeter wave integrated circuit (IC) chip. The IC chip comprises an IC die and a wire bond ball grid array package encapsulating the IC die. The wire bond ball grid array package comprises a solder ball array, a millimeter wave transmit channel, and a millimeter wave receive channel, wherein each millimeter wave transmit and receive channel electrically couples the IC die to a signal ball of the solder ball array and is configured to resonate at an operating frequency band of the millimeter wave IC chip.

公开(公告)号：US20240178154A1

公开(公告)日：2024-05-30

申请号：US18070708

申请日：2022-11-29

Applicant: Texas Instruments Incorporated

Inventor： Yiqi Tang ,  Rajen Manicon Murugan ,  Chittranjan Mohan Gupta ,  Jie Chen ,  Jaimal Mallory Williamson

IPC: H01L23/552 ,  H01L21/48 ,  H01L21/56 ,  H01L23/498

CPC classification number: H01L23/552 ,  H01L21/4853 ,  H01L21/56 ,  H01L23/49822 ,  H01L23/49838 ,  H01L24/16 ,  H01L2224/16227

Abstract: An electronic device includes a multilevel package substrate, a semiconductor die, and a molded package structure, where the multilevel package substrate has opposite first and second substrate sides, first and second conductive pads spaced apart from one another along the first substrate side, and a conductive substrate terminal that is exposed along the second substrate side and is electrically coupled to the second conductive pad. The semiconductor die is attached to the first substrate side and has opposite first and second die sides, and a die terminal along the first die side, the die terminal electrically coupled to the first conductive pad. The molded has a package side, a metal shield along the package side, and a conductive package via that extends through the molded package structure and electrically couples the metal shield to the second conductive pad.

公开(公告)号：US20240120297A1

公开(公告)日：2024-04-11

申请号：US17958254

申请日：2022-09-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jie Chen ,  Rajen Maricon Murugan ,  Chittranjan Mohan Gupta ,  Yiqi Tang

IPC: H01L23/66

CPC classification number: H01L23/66 ,  H01L2223/6611 ,  H01L2223/6627 ,  H01L2223/6677

Abstract: An apparatus includes: a first conductor layer patterned into parallel strips having a first end and an opposite second end formed on a device side surface of a multilayer package substrate, the multilayer package substrate including conductor layers spaced from one another by dielectric material and coupled to one another by conductive vertical connection layers extending through the dielectric material; a second conductor layer in the multilayer package substrate spaced from the first conductor layer, the second conductor layer patterned into parallel strips having a first end and a second end, the second conductor layer coupled to the first conductor layer by vertical connectors formed of the conductive vertical connection layers at the first end and the second end, and a semiconductor die mounted to the device side surface of the multilayer package substrate that is spaced from and coupled to the second conductor.

公开(公告)号：US20230021179A1

公开(公告)日：2023-01-19

申请号：US17379549

申请日：2021-07-19

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yiqi Tang ,  Rajen Manicon Murugan ,  Chittranjan Mohan Gupta ,  Jie Chen

IPC: H01L49/02 ,  H01F17/00 ,  H05K3/46 ,  H05K1/11 ,  H02M3/158

Abstract: A semiconductor device includes a die having an input port and an output port. The semiconductor device also includes a multilayer package substrate with pads on a surface of the multilayer package substrate configured to be coupled to circuit components of a printed circuit board. The multilayer package substrate also includes a passive filter comprising an input port and an output port, and a planar inductor. The planar inductor is coupled to a given pad of the pads of the multilayer package substrate with a first via of the multilayer package substrate and to the input port of the die with a second via of the multilayer package substrate. The planar inductor extends parallel to the surface of the multilayer package substrate.

公开(公告)号：US20240178155A1

公开(公告)日：2024-05-30

申请号：US18071972

申请日：2022-11-30

Applicant: Texas Instruments Incorporated

Inventor： Yiqi Tang ,  Chittranjan Mohan Gupta ,  Rajen Manicon Murugan ,  Jie Chen

IPC: H01L23/552 ,  H01L21/48 ,  H01L23/00 ,  H01L23/498

CPC classification number: H01L23/552 ,  H01L21/4839 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/49861 ,  H01L24/16 ,  H01L2224/16235 ,  H01L2924/3025

Abstract: An electronic device includes a multilevel package substrate having a first level, a second level, a third level, a conductive signal trace that extends in the second level, and a conductive box shield that surrounds a portion of the conductive signal trace. The electronic device includes a semiconductor die attached to the multilevel package substrate and having a conductive structure coupled to an end of the conductive signal trace. The electronic device includes a package structure that encloses the semiconductor die and a portion of the multilevel package substrate.

公开(公告)号：US10262957B2

公开(公告)日：2019-04-16

申请号：US15949746

申请日：2018-04-10

Applicant: Texas Instruments Incorporated

Inventor： Rajen Manicon Murugan ,  Minhong Mi ,  Gary Paul Morrison ,  Jie Chen ,  Kenneth Robert Rhyner ,  Stanley Craig Beddingfield ,  Chittranjan Mohan Gupta ,  Django Earl Trombley

IPC: H01Q1/00 ,  H01L23/66 ,  H01L23/498 ,  H01L23/00 ,  H01Q1/22 ,  H01Q23/00 ,  H05K1/02 ,  H01Q1/32 ,  H05K1/18

Abstract: An integrated circuit (IC) package includes an IC die and a wave channel that electrically couples the IC die to a solder ball array. The wave channel is configured to resonate at an operating frequency band of the IC die.