-
公开(公告)号:US20240036867A1
公开(公告)日:2024-02-01
申请号:US18378207
申请日:2023-10-10
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Naveen BHORIA , Kai CHIRCA , Timothy D. ANDERSON , Duc BUI , Abhijeet A. CHACHAD , Son Hung TRAN
IPC: G06F9/30 , G06F9/38 , G06F11/00 , G06F12/0897 , G06F12/0875 , G06F9/32 , G06F11/10 , G06F9/345
CPC classification number: G06F9/3016 , G06F9/3802 , G06F9/30014 , G06F9/30145 , G06F9/30036 , G06F9/3867 , G06F11/00 , G06F12/0897 , G06F12/0875 , G06F9/32 , G06F9/30098 , G06F11/1048 , G06F9/383 , G06F9/30112 , G06F9/345 , G06F9/30043 , G06F9/3834 , G06F9/3877 , G06F9/30101 , G06F9/3822 , G06F11/10 , G06F2212/60 , G06F2212/452 , G06F12/0811
Abstract: Techniques related to executing a plurality of instructions by a processor comprising receiving a first instruction configured to cause the processor to output a first data value to a first address in a first data cache, outputting, by the processor, the first data value to a second address in a second data cache, receiving a second instruction configured to cause a streaming engine associated with the processor to prefetch data from the first data cache, determining that the first data value has not been outputted from the second data cache to the first data cache, stalling execution of the second instruction, receiving an indication, from the second data cache, that the first data value has been output from the second data cache to the first data cache, and resuming execution of the second instruction based on the received indication.
-
公开(公告)号:US20190220276A1
公开(公告)日:2019-07-18
申请号:US16297824
申请日:2019-03-11
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Naveen BHORIA , Kai CHIRCA , Timothy D. ANDERSON , Duc BUI , Abhijeet A. CHACHAD , Son Hung TRAN
IPC: G06F9/30 , G06F9/345 , G06F9/38 , G06F11/00 , G06F12/0897 , G06F12/0875 , G06F9/32 , G06F11/10
CPC classification number: G06F9/3016 , G06F9/30014 , G06F9/30036 , G06F9/30098 , G06F9/30112 , G06F9/30145 , G06F9/32 , G06F9/345 , G06F9/3802 , G06F9/3822 , G06F9/383 , G06F9/3867 , G06F11/00 , G06F11/10 , G06F11/1048 , G06F12/0875 , G06F12/0897 , G06F2212/452 , G06F2212/60
Abstract: Techniques related to executing a plurality of instructions by a processor comprising receiving a first instruction configured to cause the processor to output a first data value to a first address in a first data cache, outputting, by the processor, the first data value to a second address in a second data cache, receiving a second instruction configured to cause a streaming engine associated with the processor to prefetch data from the first data cache, determining that the first data value has not been outputted from the second data cache to the first data cache, stalling execution of the second instruction, receiving an indication, from the second data cache, that the first data value has been output from the second data cache to the first data cache, and resuming execution of the second instruction based on the received indication.
-
公开(公告)号:US20220164252A1
公开(公告)日:2022-05-26
申请号:US17670582
申请日:2022-02-14
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Abhijeet Ashok CHACHAD , David Matthew THOMPSON , Son Hung TRAN
IPC: G06F11/10 , H03M13/15 , G06F9/38 , G06F12/0879 , G06F9/30 , G06F9/46 , G06F9/448 , G06F9/48 , G06F9/52 , G06F12/0811 , G06F13/16
Abstract: An apparatus includes a central processing unit (CPU) core and a cache subsystem coupled to the CPU core. The cache subsystem includes a memory configured to store a line of data and an error correcting code (ECC) syndrome associated with the line of data, where the ECC syndrome is calculated based on the line of data and the ECC syndrome is a first type ECC. The cache subsystem also includes a controller configured to, in response to a request from a master configured to implement a second type ECC, the request being directed to the line of data, transform the first type ECC syndrome for the line of data to a second type ECC syndrome send a response to the master. The response includes the line of data and the second type ECC syndrome associated with the line of data.
-
公开(公告)号:US20210216316A1
公开(公告)日:2021-07-15
申请号:US17216821
申请日:2021-03-30
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Naveen BHORIA , Kai CHIRCA , Timothy D. ANDERSON , Duc BUI , Abhijeet A. CHACHAD , Son Hung TRAN
IPC: G06F9/30 , G06F9/38 , G06F11/00 , G06F12/0897 , G06F12/0875 , G06F9/32 , G06F11/10 , G06F9/345
Abstract: Techniques related to executing a plurality of instructions by a processor comprising receiving a first instruction configured to cause the processor to output a first data value to a first address in a first data cache, outputting, by the processor, the first data value to a second address in a second data cache, receiving a second instruction configured to cause a streaming engine associated with the processor to prefetch data from the first data cache, determining that the first data value has not been outputted from the second data cache to the first data cache, stalling execution of the second instruction, receiving an indication, from the second data cache, that the first data value has been output from the second data cache to the first data cache, and resuming execution of the second instruction based on the received indication.
-
公开(公告)号:US20200371874A1
公开(公告)日:2020-11-26
申请号:US16882372
申请日:2020-05-22
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Abhijeet Ashok CHACHAD , David Matthew THOMPSON , Son Hung TRAN
Abstract: An apparatus includes a central processing unit (CPU) core and a cache subsystem coupled to the CPU core. The cache subsystem includes a memory configured to store a line of data and an error correcting code (ECC) syndrome associated with the line of data, where the ECC syndrome is calculated based on the line of data and the ECC syndrome is a first type ECC. The cache subsystem also includes a controller configured to, in response to a request from a master configured to implement a second type ECC, the request being directed to the line of data, transform the first type ECC syndrome for the line of data to a second type ECC syndrome send a response to the master. The response includes the line of data and the second type ECC syndrome associated with the line of data.
-
-
-
-