公开(公告)号：US20190252429A1

公开(公告)日：2019-08-15

申请号：US16398133

申请日：2019-04-29

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Volume CHIEN ,  Yun-Wei CHENG ,  Zhe-Ju LIU ,  Kuo-Cheng LEE ,  Chi-Cherng JENG ,  Chuan-Pu LIU

IPC: H01L27/146

CPC classification number: H01L27/1464 ,  H01L27/14621 ,  H01L27/14623 ,  H01L27/14627 ,  H01L27/14629 ,  H01L27/1463

Abstract: An image sensor device is provided. The image sensor device includes a semiconductor substrate including a front surface, a back surface opposite to the front surface, and a light-sensing region extending from the front surface into the semiconductor substrate. The image sensor device includes a light-blocking structure in the semiconductor substrate and surrounding the light-sensing region. The light-blocking structure includes a conductive light reflection structure and a light absorption structure, and the light absorption structure is between the conductive light reflection structure and the back surface. The image sensor device includes an insulating layer between the light-blocking structure and the semiconductor substrate.

公开(公告)号：US20150243696A1

公开(公告)日：2015-08-27

申请号：US14192322

申请日：2014-02-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd

Inventor： Volume CHIEN ,  Kun-Huei LIN ,  Chia-Yu WEI ,  Allen TSENG ,  Chi-Cherng JENG ,  Chuan-Pu LIU

IPC: H01L27/146 ,  H04N5/374

CPC classification number: H01L27/14623 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/1463 ,  H01L27/1464 ,  H01L27/14685

Abstract: The disclosure provides an image sensor device and a manufacturing method. The image sensor device includes a semiconductor substrate and a light sensing region in the semiconductor substrate. The image sensor device also includes a light blocking structure in the semiconductor substrate and adjacent to the light sensing region. A sidewall of the light blocking structure is a curved surface.

Abstract translation: 本公开提供了一种图像传感器装置和制造方法。 图像传感器装置包括半导体衬底和半导体衬底中的光感测区域。 图像传感器装置还包括在半导体衬底中并与光感测区相邻的遮光结构。 遮光结构的侧壁是曲面。

公开(公告)号：US20210083048A1

公开(公告)日：2021-03-18

申请号：US17107448

申请日：2020-11-30

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Jia-Ming LIN ,  Shiu-Ko JANGJIAN ,  Chun-Che LIN ,  Ying-Lang WANG ,  Wei-Ken LIN ,  Chuan-Pu LIU

IPC: H01L29/06 ,  H01L21/02 ,  H01L21/3065 ,  H01L21/3105 ,  H01L21/324 ,  H01L21/762 ,  H01L21/8234 ,  H01L27/088

Abstract: A structure of a semiconductor device includes a substrate, an isolation structure, and a liner layer. The isolation structure is embedded in the substrate. The isolation structure has a bottom surface and a sidewall. The liner layer is between the substrate and the isolation. A first portion of the liner layer in contact with the sidewall of the isolation structure has a nitrogen concentration lower than a second portion of the liner layer in contact with the bottom surface of the isolation structure.

公开(公告)号：US20180151667A1

公开(公告)日：2018-05-31

申请号：US15865072

申请日：2018-01-08

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Jia-Ming LIN ,  Shiu-Ko JANGJIAN ,  Chun-Che LIN ,  Ying-Lang WANG ,  Wei-Ken LIN ,  Chuan-Pu LIU

IPC: H01L29/06 ,  H01L27/088 ,  H01L21/02 ,  H01L21/8234 ,  H01L21/762 ,  H01L21/324 ,  H01L21/3105 ,  H01L21/3065 ,  H01L29/78

CPC classification number: H01L29/0653 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/022 ,  H01L21/02219 ,  H01L21/02271 ,  H01L21/02326 ,  H01L21/02337 ,  H01L21/3065 ,  H01L21/31051 ,  H01L21/324 ,  H01L21/76224 ,  H01L21/823431 ,  H01L21/823481 ,  H01L21/845 ,  H01L27/0886 ,  H01L27/1211 ,  H01L29/785

Abstract: A method includes forming a flowable dielectric layer in a trench of a substrate; curing the flowable dielectric layer; and annealing the cured flowable dielectric layer to form an insulation structure and a liner layer. The insulation structure is formed in the trench, the liner layer is formed between the insulation structure and the substrate, and the liner layer includes nitrogen.

公开(公告)号：US20190067436A1

公开(公告)日：2019-02-28

申请号：US15690693

申请日：2017-08-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chia-Yang WU ,  Shiu-Ko JANG-JIAN ,  Ting-Chun WANG ,  Chuan-Pu LIU

IPC: H01L29/45 ,  H01L29/08 ,  H01L29/66 ,  H01L21/768 ,  H01L21/326 ,  H01L21/02 ,  H01L21/285 ,  H01L29/78 ,  H01L29/417 ,  H01L29/165

Abstract: The present disclosure describes a silicide formation process which employs the formation of an amorphous layer in the SiGe S/D region via an application of a substrate bias voltage during a metal deposition process. For example, the method includes a substrate with a gate structure disposed thereon and a source/drain region adjacent to the gate structure. A dielectric is formed over the gate structure and the source-drain region. A contact opening is formed in the dielectric to expose a portion of the gate structure and a portion of the source/drain region. An amorphous layer is formed in the exposed portion of the source/drain region with a thickness and a composition which is based on an adjustable bias voltage applied to the substrate. Further, an anneal is performed to form a silicide on the source/drain region.

公开(公告)号：US20170033179A1

公开(公告)日：2017-02-02

申请号：US14812864

申请日：2015-07-29

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Jia-Ming LIN ,  Shiu-Ko JANGJIAN ,  Chun-Che LIN ,  Ying-Lang WANG ,  Wei-Ken LIN ,  Chuan-Pu LIU

IPC: H01L29/06 ,  H01L21/8234 ,  H01L21/3065 ,  H01L21/324 ,  H01L21/3105 ,  H01L27/088 ,  H01L21/762

CPC classification number: H01L29/0653 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/022 ,  H01L21/02219 ,  H01L21/02271 ,  H01L21/02326 ,  H01L21/02337 ,  H01L21/3065 ,  H01L21/31051 ,  H01L21/324 ,  H01L21/76224 ,  H01L21/823431 ,  H01L21/823481 ,  H01L27/0886 ,  H01L29/785

Abstract: A trench structure of a semiconductor device includes a substrate, an isolation structure, and a liner layer. The substrate has a trench therein. The isolation structure is disposed in the trench. The liner layer is disposed between the substrate and the isolation structure. The liner layer includes nitrogen, and the liner layer has spatially various nitrogen concentration.

Abstract translation: 半导体器件的沟槽结构包括衬底，隔离结构和衬里层。 衬底在其中具有沟槽。 隔离结构设置在沟槽中。 衬垫层设置在衬底和隔离结构之间。 衬里层包括氮气，衬层具有空间上各种氮浓度。

公开(公告)号：US20150243805A1

公开(公告)日：2015-08-27

申请号：US14192258

申请日：2014-02-27

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Volume CHIEN ,  Yun-Wei CHENG ,  Zhe-Ju LIU ,  Kuo-Cheng LEE ,  Chi-Cherng JENG ,  Chuan-Pu LIU

IPC: H01L31/0232 ,  H01L31/101 ,  H01L31/0216

CPC classification number: H01L27/1464 ,  H01L27/14621 ,  H01L27/14623 ,  H01L27/14627 ,  H01L27/14629 ,  H01L27/1463

Abstract: Embodiments of the disclosure provide an image sensor device. The image sensor device includes a semiconductor substrate including a front surface, a back surface opposite to the front surface, a light-sensing region close to the front surface, and a trench adjacent to the light-sensing region. The image sensor device includes a light-blocking structure positioned in the trench to absorb or reflect incident light.

Abstract translation: 本公开的实施例提供了一种图像传感器装置。 图像传感器装置包括：半导体衬底，包括前表面，与前表面相对的后表面，靠近前表面的感光区域和与光感测区域相邻的沟槽。 图像传感器装置包括位于沟槽中以吸收或反射入射光的遮光结构。