公开(公告)号：US20170317054A1

公开(公告)日：2017-11-02

申请号：US15237428

申请日：2016-08-15

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chih-Chiang TSAO ,  Hsiu-Jen LIN ,  Chun-Cheng LIN ,  Chih-Wei LIN ,  Ming-Da CHENG ,  Ching-Hua HSIEH ,  Chung-Shi LIU

IPC: H01L25/065 ,  H01L21/56 ,  H01L21/683 ,  H01L23/00 ,  H01L25/00 ,  H01L21/48 ,  H01L21/50 ,  H01L21/60

CPC classification number: H01L25/0652 ,  H01L21/486 ,  H01L21/50 ,  H01L21/561 ,  H01L21/563 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/6836 ,  H01L23/3128 ,  H01L23/5387 ,  H01L23/5389 ,  H01L24/02 ,  H01L24/19 ,  H01L24/20 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2021/6003 ,  H01L2021/60052 ,  H01L2021/6009 ,  H01L2021/60247 ,  H01L2021/60255 ,  H01L2221/68331 ,  H01L2221/68359 ,  H01L2221/68368 ,  H01L2221/68372 ,  H01L2224/02331 ,  H01L2224/02373 ,  H01L2224/02379 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/24137 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/06517 ,  H01L2225/06548 ,  H01L2225/06568 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2224/83

Abstract: A package structure includes a molding material, at least one through-via, at least one conductor, at least one dummy structure and an underfill. The through-via extends through the molding material. The conductor is present on the through-via. The dummy structure is present on the molding material and includes a dielectric material. The underfill is at least partially present between the conductor and the dummy structure.

公开(公告)号：US20240290734A1

公开(公告)日：2024-08-29

申请号：US18655596

申请日：2024-05-06

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chih-Hsuan TAI ,  Ting-Ting KUO ,  Yu-Chih HUANG ,  Chih-Wei LIN ,  Hsiu-Jen LIN ,  Chih-Hua CHEN ,  Ming-Da CHENG ,  Ching-Hua HSIEH ,  Hao-Yi TSAI ,  Chung-Shi LIU

IPC: H01L23/00 ,  H01L21/683 ,  H01L23/31

CPC classification number: H01L24/02 ,  H01L21/6835 ,  H01L21/6836 ,  H01L23/3114 ,  H01L23/3135 ,  H01L24/19 ,  H01L24/96 ,  H01L24/97 ,  H01L23/3128 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68359 ,  H01L2221/68372 ,  H01L2224/02311 ,  H01L2224/02319 ,  H01L2224/02331 ,  H01L2224/02371 ,  H01L2224/02379 ,  H01L2224/02381 ,  H01L2224/12105

Abstract: A package structure includes a semiconductor device, a molding compound, a first dielectric layer, and a through-via. The molding compound is in contact with a sidewall of the semiconductor device. The first dielectric layer is over the molding compound and the semiconductor device. The through-via is in the molding compound and the first dielectric layer. The through-via is a continuous element and in contact with the first dielectric layer.

公开(公告)号：US20220165689A1

公开(公告)日：2022-05-26

申请号：US17670481

申请日：2022-02-13

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chih-Hsuan TAI ,  Ting-Ting KUO ,  Yu-Chih HUANG ,  Chih-Wei LIN ,  Hsiu-Jen LIN ,  Chih-Hua CHEN ,  Ming-Da CHENG ,  Ching-Hua HSIEH ,  Hao-Yi TSAI ,  Chung-Shi LIU

IPC: H01L23/00 ,  H01L23/31 ,  H01L21/683

Abstract: A package structure includes a semiconductor device, a molding compound, a first dielectric layer, and a through-via. The molding compound is in contact with a sidewall of the semiconductor device. The first dielectric layer is over the molding compound and the semiconductor device. The through-via is in the molding compound and the first dielectric layer. The through-via is a continuous element and in contact with the first dielectric layer.

公开(公告)号：US20200294944A1

公开(公告)日：2020-09-17

申请号：US16888758

申请日：2020-05-31

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chih-Hsuan TAI ,  Ting-Ting KUO ,  Yu-Chih HUANG ,  Chih-Wei LIN ,  Hsiu-Jen LIN ,  Chih-Hua CHEN ,  Ming-Da CHENG ,  Ching-Hua HSIEH ,  Hao-Yi TSAI ,  Chung-Shi LIU

IPC: H01L23/00 ,  H01L23/31 ,  H01L21/683

Abstract: A package structure includes a semiconductor device, a molding compound, a first dielectric layer, and a through-via. The molding compound is in contact with a sidewall of the semiconductor device. The first dielectric layer is over the molding compound and the semiconductor device. The through-via is in the molding compound and the first dielectric layer. The through-via is a continuous element and in contact with the first dielectric layer.

公开(公告)号：US20180286823A1

公开(公告)日：2018-10-04

申请号：US15726260

申请日：2017-10-05

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chih-Hsuan TAI ,  Ting-Ting KUO ,  Yu-Chih HUANG ,  Chih-Wei LIN ,  Hsiu-Jen LIN ,  Chih-Hua CHEN ,  Ming-Da CHENG ,  Ching-Hua HSIEH ,  Hao-Yi TSAI ,  Chung-Shi LIU

IPC: H01L23/00 ,  H01L23/31

Abstract: A method of forming a package structure includes disposing a semiconductor device over a first dielectric layer, wherein a first redistribution line is in the first dielectric layer, forming a molding compound over the first dielectric layer and in contact with a sidewall of the semiconductor device, forming a second dielectric layer over the molding compound and the semiconductor device, forming a first opening in the second dielectric layer, the molding compound, and the first dielectric layer to expose the first redistribution line, and forming a first conductor in the first opening, wherein the first conductor is electrically connected to the first redistribution line.

公开(公告)号：US20180315728A1

公开(公告)日：2018-11-01

申请号：US15499962

申请日：2017-04-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hao-Jan PEI ,  Chih-Chiang TSAO ,  Wei-Yu CHEN ,  Hsiu-Jen LIN ,  Ming-Da CHENG ,  Ching-Hua HSIEH ,  Chung-Shi LIU

IPC: H01L23/00 ,  H01L25/10 ,  H01L23/31 ,  H01L23/29 ,  H01L21/56

CPC classification number: H01L24/19 ,  H01L21/565 ,  H01L21/6835 ,  H01L23/293 ,  H01L23/3128 ,  H01L24/13 ,  H01L24/25 ,  H01L24/73 ,  H01L24/96 ,  H01L25/105 ,  H01L2221/68345 ,  H01L2221/68368 ,  H01L2224/13024 ,  H01L2224/19 ,  H01L2224/25171 ,  H01L2224/2518 ,  H01L2224/73209 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/3511

Abstract: Structures and formation methods of a chip package are provided. The method includes forming a protective layer to surround a semiconductor die, and the protective layer has opposing first and second surfaces. The method also includes forming a dielectric layer over the first surface of the protective layer and the semiconductor die. The method further includes forming a conductive feature over the dielectric layer such that the conductive feature is electrically connected to a conductive element of the semiconductor die. In addition, the method includes printing a warpage-control element over the second surface of the protective layer and the semiconductor die such that the semiconductor die is between the warpage-control element and the dielectric layer.

公开(公告)号：US20200279823A1

公开(公告)日：2020-09-03

申请号：US16876371

申请日：2020-05-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hao-Jan PEI ,  Chih-Chiang TSAO ,  Wei-Yu CHEN ,  Hsiu-Jen LIN ,  Ming-Da CHENG ,  Ching-Hua HSIEH ,  Chung-Shi LIU

IPC: H01L23/00 ,  H01L25/10 ,  H01L23/29 ,  H01L21/56 ,  H01L23/31 ,  H01L21/683 ,  H01L25/11

Abstract: A method for forming a package structure is provided. The method includes forming a protective layer to surround a semiconductor die and forming a conductive structure over the protective layer. The method also includes disposing a polymer-containing material over the protective layer to partially surround the conductive structure. The method further includes curing the polymer-containing material to form a warpage-control element.

公开(公告)号：US20190252340A1

公开(公告)日：2019-08-15

申请号：US16398119

申请日：2019-04-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd

Inventor： Hao-Jan PEI ,  Chih-Chiang TSAO ,  Wei-Yu CHEN ,  Hsiu-Jen LIN ,  Ming-Da CHENG ,  Ching-Hua HSIEH ,  Chung-Shi LIU

IPC: H01L23/00 ,  H01L23/31 ,  H01L21/683 ,  H01L23/29 ,  H01L21/56 ,  H01L25/11 ,  H01L25/10

CPC classification number: H01L24/19 ,  H01L21/565 ,  H01L21/6835 ,  H01L23/293 ,  H01L23/3128 ,  H01L24/13 ,  H01L24/25 ,  H01L24/73 ,  H01L24/96 ,  H01L25/105 ,  H01L25/115 ,  H01L2221/68345 ,  H01L2221/68368 ,  H01L2224/13024 ,  H01L2224/19 ,  H01L2224/25171 ,  H01L2224/2518 ,  H01L2224/73209 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/3511

Abstract: A package structure is provided. The package structure includes a semiconductor die and a protective layer surrounding the semiconductor die. The package structure also includes a conductive structure and a warpage-control element over a same side of the protective layer. A bottom surface of the warpage-control element is higher than a bottom surface of the conductive structure. The bottom surface of the warpage-control element is lower than a top surface of the conductive bump.