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1.
公开(公告)号:US20240038654A1
公开(公告)日:2024-02-01
申请号:US17878197
申请日:2022-08-01
发明人: Fu-Chiang Kuo , Yu-Hsin Fang , Ming-Syong Chen
IPC分类号: H01L23/522 , H01L23/528 , H01L49/02
CPC分类号: H01L23/5223 , H01L23/5226 , H01L23/5283 , H01L28/91 , H01L23/53295
摘要: A semiconductor device and a method of manufacturing the semiconductor device are disclosed. In one aspect, at least one active deep trench capacitor (DTC), the at least one active DTC including a plurality of conductive layers and an insulating layer disposed between adjacent conductive layers of the plurality of conductive layers. The semiconductor device includes a plurality of dummy DTCs disposed on opposing sides of the at least one active DTC, the plurality of dummy DTCs and the at least one active DTC arranged in a row. The semiconductor device includes a plurality of conductive structures connected to the plurality of conductive layers of the active DTC, the plurality of dummy DTCs insulated from the at least one active DTC.
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公开(公告)号:US20240153897A1
公开(公告)日:2024-05-09
申请号:US18187909
申请日:2023-03-22
发明人: Fu-Chiang Kuo , Yu-Hsin Fang , Hsin-Liang Chen
CPC分类号: H01L24/06 , H01G4/232 , H01G4/33 , H01L23/481 , H01L24/02 , H01L24/05 , H01L24/13 , H01L24/14 , H01L28/91 , H01L24/16 , H01L2224/0231 , H01L2224/02371 , H01L2224/02372 , H01L2224/02375 , H01L2224/02381 , H01L2224/05105 , H01L2224/05109 , H01L2224/05166 , H01L2224/05181 , H01L2224/05186 , H01L2224/05548 , H01L2224/05567 , H01L2224/0557 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05664 , H01L2224/05684 , H01L2224/0603 , H01L2224/06182 , H01L2224/06505 , H01L2224/13021 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/1403 , H01L2224/14181 , H01L2224/16227 , H01L2224/16238 , H01L2924/0132 , H01L2924/0133 , H01L2924/0134 , H01L2924/04941 , H01L2924/04953
摘要: A method of forming a semiconductor device according to the present disclosure includes forming a metal-insulator-metal (MIM) structure in a substrate and forming an interconnect structure over the substrate. The MIM structure includes first electrodes of a first polarity and second electrodes of a second polarity. The interconnect structure includes conductive paths electrically connecting to the first and second electrodes. The conductive paths are isolated from each other inside the interconnect structure. The method also includes forming first and second contact pads over the interconnect structure. The first contact pad electrically connects a first portion of the conductive paths corresponding to the first electrodes. The second contact pad electrically connects a second portion of the conductive paths corresponding to the second electrodes.
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