公开(公告)号：US20130241073A1

公开(公告)日：2013-09-19

申请号：US13614217

申请日：2012-09-13

申请人： Takaki Hashimoto ,  Yasunobu Kai ,  Toshiya Kotani

发明人： Takaki Hashimoto ,  Yasunobu Kai ,  Toshiya Kotani

IPC分类号： H01L23/528 ,  H01L21/768

CPC分类号： H01L23/528 ,  H01L21/0337 ,  H01L21/31144 ,  H01L21/768 ,  H01L21/76804 ,  H01L21/76816 ,  H01L21/76895 ,  H01L27/11519 ,  H01L2924/0002 ,  Y10S438/947 ,  H01L2924/00

摘要： According to one embodiment, a semiconductor device includes a plurality of wires arranged in parallel at a predetermined pitch, a plurality at first contacts that are each connected to an odd-numbered wire among the wires and are arranged in parallel in an orthogonal direction with respect to a wiring direction of the wires, and a plurality of second contacts that are each connected to an even-numbered wire among the wires and are arranged in parallel in an orthogonal direction with respect to the wiring direction of the wires in such a way as to be offset from the first contacts in the wiring direction of the wires, in which the first contacts are offset from the second contacts by a pitch of the wires in an orthogonal direction with respect to the wiring direction of the wires.

摘要翻译： 根据一个实施例，半导体器件包括以预定间距平行布置的多条导线，多个第一触点分别连接到导线之间的奇数编号，并且与正交方向平行布置，与 与导线的布线方向相连接的多个第二触点，以及多个第二触点，每个第二触点各自连接到电线中的偶数线，并且相对于线的布线方向在正交方向上平行布置， 在与导线的布线方向正交的方向上的第一触点相对于第二触点偏离线的间距的方式偏离布线方向的第一触点。

公开(公告)号：US20120070985A1

公开(公告)日：2012-03-22

申请号：US13233971

申请日：2011-09-15

申请人： Takaki Hashimoto ,  Kazuya Fukuhara ,  Toshiya Kotani ,  Yasunobu Kai

发明人： Takaki Hashimoto ,  Kazuya Fukuhara ,  Toshiya Kotani ,  Yasunobu Kai

IPC分类号： H01L21/768 ,  G03B27/32

CPC分类号： H01L27/0207 ,  G03F1/50 ,  G03F7/70325 ,  H01L21/0274 ,  H01L21/31144 ,  H01L27/11519 ,  H01L27/11524

摘要： According to one embodiment, an exposure method is disclosed. The method can include applying light to a photomask by an illumination. The method can include converging diffracted beams emitted from the photomask by a lens. In addition, the method can include imaging a plurality of point images on an exposure surface. On the photomask, a light transmitting region is formed at a lattice point represented by nonorthogonal unit cell vectors, and in the illumination, a light emitting region is set so that three or more of the diffracted beams pass through positions equidistant from center of a pupil of the lens.

摘要翻译： 根据一个实施例，公开了曝光方法。 该方法可以包括通过照明将光照射到光掩模。 该方法可以包括通过透镜会聚从光掩模发射的衍射光束。 此外，该方法可以包括在曝光表面上成像多个点图像。 在光掩模上，在由非正交单元矢量表示的格点处形成光透射区域，在照明中，设定发光区域，使得三个以上的衍射光束通过与瞳孔中心等距的位置 的镜头。

公开(公告)号：US08865589B2

公开(公告)日：2014-10-21

申请号：US13614217

申请日：2012-09-13

申请人： Takaki Hashimoto ,  Yasunobu Kai ,  Toshiya Kotani

发明人： Takaki Hashimoto ,  Yasunobu Kai ,  Toshiya Kotani

IPC分类号： H01L21/027 ,  H01L21/768 ,  H01L21/311 ,  H01L23/528 ,  H01L21/033 ,  H01L27/115

CPC分类号： H01L23/528 ,  H01L21/0337 ,  H01L21/31144 ,  H01L21/768 ,  H01L21/76804 ,  H01L21/76816 ,  H01L21/76895 ,  H01L27/11519 ,  H01L2924/0002 ,  Y10S438/947 ,  H01L2924/00

摘要： According to one embodiment, a semiconductor device includes a plurality of wires arranged in parallel at a predetermined pitch, a plurality at first contacts that are each connected to an odd-numbered wire among the wires and are arranged in parallel in an orthogonal direction with respect to a wiring direction of the wires, and a plurality of second contacts that are each connected to an even-numbered wire among the wires and are arranged in parallel in an orthogonal direction with respect to the wiring direction of the wires in such a way as to be offset from the first contacts in the wiring direction of the wires, in which the first contacts are offset from the second contacts by a pitch of the wires in an orthogonal direction with respect to the wiring direction of the wires.

摘要翻译： 根据一个实施例，半导体器件包括以预定间距平行布置的多条导线，多个第一触点分别连接到导线之间的奇数编号，并且与正交方向平行布置，与 与导线的布线方向相连接的多个第二触点，以及多个第二触点，每个第二触点各自连接到电线中的偶数线，并且相对于线的布线方向在正交方向上平行布置， 在与导线的布线方向正交的方向上的第一触点相对于第二触点偏离线的间距的方式偏离布线方向的第一触点。

公开(公告)号：US20100202181A1

公开(公告)日：2010-08-12

申请号：US12561531

申请日：2009-09-17

申请人： Takaki HASHIMOTO ,  Hidefumi Mukai ,  Yasunobu Kai ,  Toshiya Kotani

发明人： Takaki HASHIMOTO ,  Hidefumi Mukai ,  Yasunobu Kai ,  Toshiya Kotani

IPC分类号： G11C5/06

CPC分类号： G11C5/063 ,  G11C5/025

摘要： A semiconductor memory device includes a semiconductor substrate on which memory cells are formed. Interconnects are arranged along a first direction above the semiconductor substrate, and have regular intervals along a second direction perpendicular to the first direction. Interconnect contacts connect the interconnects and the semiconductor substrate, are arranged on three or more rows. The center of each of two of the interconnect contacts which are connected to the interconnects adjacent in the second direction deviate from each other along the first direction.

摘要翻译： 半导体存储器件包括形成有存储单元的半导体衬底。 互连件沿着半导体衬底上方的第一方向布置，并且沿着垂直于第一方向的第二方向具有规则的间隔。 互连触点连接互连和半导体衬底，布置在三行或更多行上。 连接到在第二方向相邻的互连件的两个互连触点中的每一个的中心沿着第一方向彼此偏离。

公开(公告)号：US07934175B2

公开(公告)日：2011-04-26

申请号：US12062859

申请日：2008-04-04

申请人： Toshiya Kotani ,  Yasunobu Kai ,  Soichi Inoue ,  Satoshi Tanaka ,  Shigeki Nojima ,  Kazuyuki Masukawa ,  Koji Hashimoto

发明人： Toshiya Kotani ,  Yasunobu Kai ,  Soichi Inoue ,  Satoshi Tanaka ,  Shigeki Nojima ,  Kazuyuki Masukawa ,  Koji Hashimoto

IPC分类号： G06F17/50

CPC分类号： G03F7/70625 ,  G03F7/70525 ,  H01L22/12 ,  H01L22/20 ,  H01L2924/0002 ,  H01L2924/00

摘要： A parameter adjustment method for a plurality of manufacturing devices to form a pattern of a semiconductor device on a substrate using the manufacturing devices includes: adjusting a parameter adjustable for a manufacturing device serving as a reference manufacturing device; obtaining a first shape of a pattern of a semiconductor device to be formed on a substrate; defining an adjustable parameter of another to-be-adjusted manufacturing; obtaining a second shape of the pattern formed on the substrate; calculating a difference amount between a reference finished shape and a to-be-adjusted finished shape; repeatedly calculating the difference amount by changing the to-be-adjusted parameter until the difference amount becomes equal to or less than a predetermined reference value; and outputting as a parameter of the to-be-adjusted manufacturing device the to-be-adjusted parameter.

摘要翻译： 用于使用该制造装置在基板上形成半导体器件的图案的多个制造装置的参数调整方法包括：调整可用于作为参考制造装置的制造装置的参数; 获得要在基板上形成的半导体器件的图案的第一形状; 定义另一个待调整制造的可调参数; 获得形成在所述基板上的所述图案的第二形状; 计算参考完成形状和待调整完成形状之间的差值; 通过改变待调整参数重复计算差值，直到差值变得等于或小于预定参考值; 并作为待调整制造装置的参数输出待调整参数。

公开(公告)号：US08809072B2

公开(公告)日：2014-08-19

申请号：US13051961

申请日：2011-03-18

申请人： Chikaaki Kodama ,  Toshiya Kotani ,  Shigeki Nojima ,  Shoji Mimotogi

发明人： Chikaaki Kodama ,  Toshiya Kotani ,  Shigeki Nojima ,  Shoji Mimotogi

IPC分类号： H01L21/66 ,  G01R31/26

CPC分类号： G03F1/36

摘要： According to a sub-resolution assist feature arranging method in embodiments, it is selected which of a rule base and a model base is set for which pattern region on pattern data corresponding to a main pattern as a type of the method of arranging the sub-resolution assist feature for improving resolution of the main pattern formed on a substrate. Then, the sub-resolution assist feature by the rule base is arranged in a pattern region set as the rule base and the sub-resolution assist feature by the model base is arranged in a pattern region set as the model base.

摘要翻译： 根据实施例中的子分辨率辅助特征排列方法，选择规则库和模型库中的哪一个被设置为对应于主图案的图案数据上的哪个图案区域作为安排子图形的方法的类型， 分辨率辅助功能，用于提高在基板上形成的主图案的分辨率。 然后，将规则库的子分辨率辅助特征设置在设置为规则库的图案区域中，并且由模型库将子分辨率辅助特征排列在设置为模型库的图案区域中。

公开(公告)号：US08617773B2

公开(公告)日：2013-12-31

申请号：US13239019

申请日：2011-09-21

申请人： Taiga Uno ,  Toshiya Kotani ,  Hiromitsu Mashita ,  Yukiyasu Arisawa

发明人： Taiga Uno ,  Toshiya Kotani ,  Hiromitsu Mashita ,  Yukiyasu Arisawa

IPC分类号： G03F1/44 ,  G03F1/72 ,  G03F1/38

CPC分类号： G03F1/36 ,  G03F1/70 ,  G03F7/70441 ,  G03F7/70941

摘要： In the method of correcting a mask pattern according to the embodiments, a mask pattern correction amount for a reference flare value is calculated as a reference mask correction amount, for every type of patterns within the layout, and a change amount of the mask pattern correction amount corresponding to the change amount of the flare value is calculated as the change amount information. A mask pattern corresponding to the flare value of the pattern is created based on the reference mask correction amount and the change amount information corresponding to the pattern, extracted from the information having the pattern, the reference mask correction amount, and the change amount information correlated with each other, and based on a difference between the flare value of the pattern and the reference flare value.

摘要翻译： 在根据实施例的校正掩模图案的方法中，对于布局中的每种类型的图案，计算用于参考闪光值的掩模图案校正量作为参考掩模校正量，以及掩模图案校正的改变量 计算与闪光值的变化量对应的量作为变化量信息。 基于从具有图案的信息提取参考掩模校正量和变化量信息相关联的参考掩模校正量和对应于图案的改变量信息，创建与图案的闪光值相对应的掩模图案 并且基于图案的耀斑值和参考闪光值之间的差异。

公开(公告)号：US08332784B2

公开(公告)日：2012-12-11

申请号：US13285650

申请日：2011-10-31

申请人： Toshiya Kotani

发明人： Toshiya Kotani

IPC分类号： G06F17/50

CPC分类号： G03F1/36 ,  H01J2237/31769

摘要： A semiconductor device is provided having a physical pattern based on a designed pattern, the designed pattern including a target pattern and a correction pattern designed for a pattern to be formed on a wafer; the target pattern includes a first portion of an edge with a first distance, a second portion of the edge with a second distance, which is different from the first distance, and a third portion of the edge having a first region of the edge with the first distance and a second region of the edge with the second distance; and the correction pattern is added to at least one of the first portion, the second portion, and the third portion such that the first portion, the second portion, and the third portion are caused to differ from one another in dimensions of the designed pattern.

摘要翻译： 提供具有基于设计图案的物理图案的半导体器件，所设计的图案包括针对要在晶片上形成的图案设计的目标图案和校正图案; 目标图案包括具有第一距离的边缘的第一部分，具有第二距离的边缘的第二部分，其不同于第一距离，并且边缘的第三部分具有边缘的第一区域，其具有 第一距离和具有第二距离的边缘的第二区域; 并且将修正图案添加到第一部分，第二部分和第三部分中的至少一个，使得第一部分，第二部分和第三部分在设计图案的尺寸上彼此不同 。

公开(公告)号：US20120241834A1

公开(公告)日：2012-09-27

申请号：US13234052

申请日：2011-09-15

申请人： Fumiharu Nakajima ,  Toshiya Kotani ,  Hiromitsu Mashita ,  Takafumi Taguchi ,  Ryota Aburada ,  Chikaaki Kodama

发明人： Fumiharu Nakajima ,  Toshiya Kotani ,  Hiromitsu Mashita ,  Takafumi Taguchi ,  Ryota Aburada ,  Chikaaki Kodama

IPC分类号： H01L27/088 ,  H01L21/768

CPC分类号： H01L23/5226 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/31144 ,  H01L21/32139 ,  H01L21/768 ,  H01L21/76816 ,  H01L27/0688 ,  H01L27/11524 ,  H01L27/11551 ,  H01L27/1157 ,  H01L27/11578

摘要： According to one embodiment, a semiconductor device includes interconnects extending from a element formation area to the drawing area, and connected with semiconductor elements in the element formation area and connected with contacts in the drawing area. The interconnects are formed based on a pattern of a (n+1)th second sidewall film matching a pattern of a nth (where n is an integer of 1 or more) first sidewall film on a lateral surface of a sacrificial layer. A first dimension matching an interconnect width of the interconnects and an interconnects interval in the element formation area is (k1/2n)×(λ/NA) or less when an exposure wavelength of an exposure device is λ, a numerical aperture of a lens of the exposure device is NA and a process parameter is k1. A second dimension matching an interconnect interval in the drawing area is greater than the first dimension.

摘要翻译： 根据一个实施例，半导体器件包括从元件形成区域延伸到绘图区域并且与元件形成区域中的半导体元件连接并且与绘图区域中的触点连接的互连。 基于在牺牲层的侧表面上匹配第n个（其中n是1或更大的整数）的第一侧壁膜的图案的第（n + 1）第二侧壁膜的图案形成互连。 当曝光装置的曝光波长为λ时，在元件形成区域中匹配互连的互连宽度的第一尺寸和元件形成区域中的互连间隔为（k1 / 2n）×（λ/ NA）或更小，透镜的数值孔径 的曝光装置为NA，处理参数为k1。 在绘图区域中匹配互连间隔的第二维大于第一维度。

公开(公告)号：US08196071B2

公开(公告)日：2012-06-05

申请号：US12688644

申请日：2010-01-15

申请人： Hiromitsu Mashita ,  Katsumi Iyanagi ,  Takafumi Taguchi ,  Toshiya Kotani ,  Hidefumi Mukai ,  Taiga Uno ,  Takashi Nakazawa

发明人： Hiromitsu Mashita ,  Katsumi Iyanagi ,  Takafumi Taguchi ,  Toshiya Kotani ,  Hidefumi Mukai ,  Taiga Uno ,  Takashi Nakazawa

IPC分类号： G06F17/50

CPC分类号： G03F1/80 ,  G03F1/36 ,  G03F1/54

摘要： A pattern data creating method comprising: referring to a first correspondence relation between an amount of dimension variation between a first pattern formed on a substrate and a second pattern formed by processing the substrate using the first pattern and either one of a pattern total surface area and a pattern boundary length of the first pattern; and creating pattern data for forming the first pattern.

摘要翻译： 一种图形数据生成方法，包括：参照形成在基板上的第一图案和通过使用第一图案处理基板而形成的第二图案之间的尺寸变化量之间的第一对应关系，以及图案总表面积和 第一图案的图案边界长度; 以及创建用于形成第一图案的图案数据。