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    Semiconductor memory device and method for producing the same
    1.
    发明授权
    Semiconductor memory device and method for producing the same 失效
    半导体存储器件及其制造方法

    公开(公告)号：US06187622B1

    公开(公告)日：2001-02-13

    申请号：US09003515

    申请日：1998-01-06

    申请人： Takeharu Kuroiwa ,  Tsuyoshi Horikawa ,  Noboru Mikami ,  Tetsuro Makita

    发明人： Takeharu Kuroiwa ,  Tsuyoshi Horikawa ,  Noboru Mikami ,  Tetsuro Makita

    IPC分类号： H01L218242

    CPC分类号： H01L28/40 ,  H01L27/10852 ,  H01L28/60

    摘要： A semiconductor memory device achieves a high capacitance value even when the elements are made extremely small as the degree of integration is increased. A method of producing such a semiconductor memory maintains a high capacitance value while achieving increased integration. A semiconductor memory device includes adjacent capacitor lower electrodes which are separated by a width of 0.2 &mgr;m while the ratio of the capacitor lower electrode height to the separation width is 1, the capacitor upper electrode covers the capacitor insulation film, and steps generated in the separated portion of the capacitor lower electrodes are filled by the upper electrode material. A method of manufacturing produces a semiconductor memory device wherein the capacitor upper electrode is formed in plasma which includes etchable gas by chemical or physical action.

    摘要翻译： 即使当元件的集成度增加时，半导体存储器件也实现了高的电容值。 制造这种半导体存储器的方法保持高的电容值，同时实现增加的集成。 半导体存储器件包括相邻的电容器下电极，其间隔0.2μm的宽度，而电容器下电极高度与分离宽度的比率为1，电容器上电极覆盖电容器绝缘膜，并且分离的步骤 电容器下电极的一部分由上电极材料填充。 一种制造方法产生半导体存储器件，其中电容器上电极通过化学或物理作用形成包括可蚀刻气体的等离子体。

    Semiconductor capacitor
    2.
    发明授权
    Semiconductor capacitor 失效
    半导体电容

    公开(公告)号：US6049103A

    公开(公告)日：2000-04-11

    申请号：US620606

    申请日：1996-03-22

    申请人： Tsuyoshi Horikawa ,  Yoshikazu Tsunemine ,  Takeharu Kuroiwa ,  Tetsuro Makita ,  Noboru Mikami

    发明人： Tsuyoshi Horikawa ,  Yoshikazu Tsunemine ,  Takeharu Kuroiwa ,  Tetsuro Makita ,  Noboru Mikami

    IPC分类号： H01G4/33 ,  H01L21/02 ,  H01L21/822 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/04 ,  H01L27/105 ,  H01L27/108 ,  H01L29/76 ,  H01L29/94 ,  H01L31/119

    CPC分类号： H01L27/1085 ,  H01L28/55

    摘要： A thin film capacitor structure of a random access memory includes plurality of capacitors formed on an interlayer insulating film. The capacitor structure includes a plurality of lower electrodes formed on the interlayer insulating film, a first dielectric film formed over the plurality of lower electrodes and portions of the interlayer insulating film between lower electrodes, a second dielectric film formed on the first dielectric film, and an upper electrode formed on the second dielectric layer. A silicon oxide film is formed at the step portions of the first dielectric film which result at the periphery of the lower electrodes to prevent leakage current between adjacent capacitors.

    摘要翻译： 随机存取存储器的薄膜电容器结构包括形成在层间绝缘膜上的多个电容器。 电容器结构包括形成在层间绝缘膜上的多个下电极，形成在多个下电极上的第一电介质膜和下电极之间的层间绝缘膜的部分，形成在第一电介质膜上的第二电介质膜，以及 形成在第二介电层上的上电极。 在第一电介质膜的台阶部分形成氧化硅膜，导致下部电极的周围，以防止相邻电容器之间的漏电流。

    Method of manufacturing semiconductor device which includes a capacitor having a lower electrode formed of iridium or ruthenium
    5.
    发明授权
    Method of manufacturing semiconductor device which includes a capacitor having a lower electrode formed of iridium or ruthenium 失效
    制造半导体器件的方法，其包括具有由铱或钌形成的下电极的电容器

    公开(公告)号：US06420191B2

    公开(公告)日：2002-07-16

    申请号：US09768552

    申请日：2001-01-25

    申请人： Takeharu Kuroiwa ,  Tsuyoshi Horikawa ,  Tetsuro Makita ,  Noboru Mikami ,  Teruo Shibano

    发明人： Takeharu Kuroiwa ,  Tsuyoshi Horikawa ,  Tetsuro Makita ,  Noboru Mikami ,  Teruo Shibano

    IPC分类号： H01G706

    CPC分类号： H01L28/60 ,  H01L27/10852 ,  H01L28/55

    摘要： A semiconductor device such as DRAM including a capacitor, wherein a lower electrode of the capacitor is a metal electrode, the metal electrode being mainly composed of ruthenium or iridium, and being connected directly to a capacitor dielectric film through no oxide layer of materials of the metal electrode formed on the surface of the metal electrode. The lower electrode made of iridium or ruthenium can easily be processed as compared with the conventional case where platinum is employed to form the electrode and also can not be oxidized when the capacitor dielectric film is formed, thus reduction in the capacitance can be prevented.

    摘要翻译： 诸如包括电容器的DRAM的半导体器件，其中电容器的下电极是金属电极，金属电极主要由钌或铱组成，并且通过没有氧化物层的材料直接连接到电容器电介质膜 金属电极形成在金属电极的表面上。 与使用铂形成电极的常规情况相比，由铱或钌制成的下电极可以容易地被处理，并且当形成电容器电介质膜时也不能被氧化，因此可以防止电容的减小。

    Semiconductor device having a capacitor electrode formed of iridum or ruthenium and a quantity of oxygen
    6.
    发明授权
    Semiconductor device having a capacitor electrode formed of iridum or ruthenium and a quantity of oxygen 失效
    具有由虹膜或钌形成的电容器电极和一定量的氧的半导体器件

    公开(公告)号：US6015989A

    公开(公告)日：2000-01-18

    申请号：US770510

    申请日：1996-12-20

    申请人： Tsuyosi Horikawa ,  Tetsuro Makita ,  Takeharu Kuroiwa ,  Noboru Mikami ,  Teruo Shibano

    发明人： Tsuyosi Horikawa ,  Tetsuro Makita ,  Takeharu Kuroiwa ,  Noboru Mikami ,  Teruo Shibano

    IPC分类号： H01L21/28 ,  H01L21/02 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/04 ,  H01L27/108 ,  H01L29/76 ,  H01L29/94 ,  H01L31/119

    CPC分类号： H01L27/10852 ,  H01L28/60

    摘要： A semiconductor device includes a semiconductor substrate having a major surface; a first interlayer insulating film formed on the semiconductor substrate and having an opening defined therein so as to open at the major surface of the semiconductor substrate; a connecting member made of Si as a principal component and embedded in the opening; a lower capacitor electrode connected electrically with the major surface of the semiconductor substrate through the connecting member; a capacitor dielectric film formed on the lower capacitor electrode; an upper capacitor electrode formed on the capacitor dielectric film; and a second interlayer insulating film formed on the capacitor upper electrode. The lower capacitor electrode referred to above is made of a principal component selected from the group consisting of ruthenium and iridium and contains oxygen in a quantity of 0.001 to 0.1% by atom and/or at least one impurity element in a quantity of 0.1 to 5% by atom. The impurity element is selected from the group consisting of titanium, chrome, tungsten, cobalt, palladium and molybdenum.

    摘要翻译： 半导体器件包括具有主表面的半导体衬底; 形成在所述半导体衬底上并具有限定在其中的开口以在所述半导体衬底的主表面上开口的第一层间绝缘膜; 以Si为主要成分并嵌入开口的连接件; 通过连接构件与半导体衬底的主表面电连接的下电容器电极; 形成在下电容器电极上的电容器电介质膜; 形成在电容器电介质膜上的上电容器电极; 以及形成在电容器上电极上的第二层间绝缘膜。 上述下部电容器电极由选自钌和铱的主要成分制成，并且含有0.001至0.1原子％的氧和/或0.1至5的至少一种杂质元素 按原子计。 杂质元素选自钛，铬，钨，钴，钯和钼。