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公开(公告)号：US06847063B2
公开(公告)日：2005-01-25
申请号：US10413306
申请日：2003-04-15
申请人： Teruhito Ohnishi , Koichiro Yuki , Shigeki Sawada , Keiichiro Shimizu , Koichi Hasegawa , Tohru Saitoh , Paul A. Clifton
发明人： Teruhito Ohnishi , Koichiro Yuki , Shigeki Sawada , Keiichiro Shimizu , Koichi Hasegawa , Tohru Saitoh , Paul A. Clifton
IPC分类号： H01L21/331 , H01L29/10 , H01L29/737 , H01L31/0328 , H01L29/00
CPC分类号： H01L29/66242 , H01L29/1004 , H01L29/7378
摘要： In a semiconductor device acting as an HBT, an emitter/base laminate portion is provided on a Si epitaxially grown layer in the SiGeC-HBT. The emitter/base laminate portion includes a SiGeC spacer layer, a SiGeC core base layer containing the boron, a Si cap layer, and an emitter layer formed by introducing phosphorous into the Si cap layer. The C content of the SiGeC spacer layer is equal to or lower than that of the SiGeC core base layer.
摘要翻译： 在作为HBT的半导体器件中，在SiGeC-HBT中的Si外延生长层上设置发射极/基底层叠部分。 发射极/基底层叠部分包括SiGeC间隔层，含有硼的SiGeC芯基底层，Si覆盖层和通过将磷引入Si覆盖层而形成的发射极层。 SiGeC间隔层的C含量等于或低于SiGeC芯基层的C含量。
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公开(公告)号：US06847062B2
公开(公告)日：2005-01-25
申请号：US10413305
申请日：2003-04-15
申请人： Teruhito Ohnishi , Koichiro Yuki , Shigeki Sawada , Keiichiro Shimizu , Koichi Hasegawa , Tohru Saitoh
发明人： Teruhito Ohnishi , Koichiro Yuki , Shigeki Sawada , Keiichiro Shimizu , Koichi Hasegawa , Tohru Saitoh
IPC分类号： H01L21/331 , H01L29/737 , H01L31/0328 , H01L29/00
CPC分类号： H01L29/66242 , H01L29/7378
摘要： In a semiconductor device functioning as a SiGeC-HBT, an emitter/base stacked portion 20 is formed on a Si epitaxially grown layer 2. The emitter/base stacked portion 20 includes: a SiGeC spacer layer 21; a SiGeC core base layer 22 containing boron at a high concentration, a SiGe cap layer 23; a Si cap layer 24, and an emitter layer 25 formed by introducing phosphorus into the Si cap layer 24 and the SiGe cap layer 23.
摘要翻译： 在用作SiGeC-HBT的半导体器件中，在Si外延生长层2上形成发射极/基极层叠部分20.发射极/基极层叠部分20包括：SiGeC间隔层21; 含有高浓度硼的SiGeC芯基层22，SiGe覆盖层23; Si覆盖层24和通过将磷引入Si覆盖层24和SiGe覆盖层23而形成的发射极层25。
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公开(公告)号：US07091099B2
公开(公告)日：2006-08-15
申请号：US10807307
申请日：2004-03-24
申请人： Teruhito Ohnishi , Koichiro Yuki , Tsuneichiro Sano , Tohru Saitoh , Ken Idota , Takahiro Kawashima , Shigeki Sawada
发明人： Teruhito Ohnishi , Koichiro Yuki , Tsuneichiro Sano , Tohru Saitoh , Ken Idota , Takahiro Kawashima , Shigeki Sawada
IPC分类号： H01L21/331
CPC分类号： H01L29/66242 , H01L29/7378
摘要： A bipolar transistor includes a Si single crystalline layer serving as a collector, a single crystalline Si/SiGeC layer and a polycrystalline Si/SiGeC layer which are formed on the Si single crystalline layer, an oxide film having an emitter opening portion, an emitter electrode, and an emitter layer. An intrinsic base layer is formed on the single crystalline Si/SiGeC layer, part of the single crystalline Si/SiGeC layer, the polycrystalline Si/SiGeC layer and the Co silicide layer together form an external base layer. The thickness of the emitter electrode is set so that boron ions implanted into the emitter electrode and diffused therein do not reach an emitter-base junction portion.
摘要翻译： 双极晶体管包括形成在Si单晶层上的Si单结晶层，单晶Si / SiGeC层和多晶Si / SiGeC层，具有发射极开口部分的氧化膜，发射极 ，和发射极层。 在单晶Si / SiGeC层上形成本征基层，单晶Si / SiGeC层的一部分，多晶Si / SiGeC层和Co硅化物层一起形成外部基极层。 发射电极的厚度被设定为使得注入发射电极并在其中扩散的硼离子不会到达发射极 - 基极接合部分。
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公开(公告)号：US20060226446A1
公开(公告)日：2006-10-12
申请号：US11450474
申请日：2006-06-12
申请人： Teruhito Ohnishi , Koichiro Yuki , Tsuneichiro Sano , Tohru Saitoh , Ken Idota , Takahiro Kawashima , Shigeki Sawada
发明人： Teruhito Ohnishi , Koichiro Yuki , Tsuneichiro Sano , Tohru Saitoh , Ken Idota , Takahiro Kawashima , Shigeki Sawada
IPC分类号： H01L31/00
CPC分类号： H01L29/66242 , H01L29/7378
摘要： A bipolar transistor includes a Si single crystalline layer serving as a collector, a single crystalline Si/SiGeC layer and a polycrystalline Si/SiGeC layer which are formed on the Si single crystalline layer, an oxide film having an emitter opening portion, an emitter electrode, and an emitter layer. An intrinsic base layer is formed on the single crystalline Si/SiGeC layer, part of the single crystalline Si/SiGeC layer, the polycrystalline Si/SiGeC layer and the Co silicide layer together form an external base layer. The thickness of the emitter electrode is set so that boron ions implanted into the emitter electrode and diffused therein do not reach an emitter-base junction portion.
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公开(公告)号：US07465969B2
公开(公告)日：2008-12-16
申请号：US11450474
申请日：2006-06-12
申请人： Teruhito Ohnishi , Koichiro Yuki , Tsuneichiro Sano , Tohru Saitoh , Ken Idota , Takahiro Kawashima , Shigeki Sawada
发明人： Teruhito Ohnishi , Koichiro Yuki , Tsuneichiro Sano , Tohru Saitoh , Ken Idota , Takahiro Kawashima , Shigeki Sawada
IPC分类号： H01L21/336 , H01L21/8234
CPC分类号： H01L29/66242 , H01L29/7378
摘要： A bipolar transistor includes a Si single crystalline layer serving as a collector, a single crystalline Si/SiGeC layer and a polycrystalline Si/SiGeC layer which are formed on the Si single crystalline layer, an oxide film having an emitter opening portion, an emitter electrode, and an emitter layer. An intrinsic base layer is formed on the single crystalline Si/SiGeC layer, part of the single crystalline Si/SiGeC layer, the polycrystalline Si/SiGeC layer and the Co silicide layer together form an external base layer. The thickness of the emitter electrode is set so that boron ions implanted into the emitter electrode and diffused therein do not reach an emitter-base junction portion.
摘要翻译： 双极晶体管包括形成在Si单晶层上的Si单结晶层，单晶Si / SiGeC层和多晶Si / SiGeC层，具有发射极开口部分的氧化膜，发射极 ，和发射极层。 在单晶Si / SiGeC层上形成本征基层，单晶Si / SiGeC层的一部分，多晶Si / SiGeC层和Co硅化物层一起形成外部基极层。 发射电极的厚度被设定为使得注入发射电极并在其中扩散的硼离子不会到达发射极 - 基极接合部分。
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公开(公告)号：US06399993B1
公开(公告)日：2002-06-04
申请号：US09786551
申请日：2001-03-07
申请人： Teruhito Ohnishi , Akira Asai , Takeshi Takagi , Tohru Saitoh , Yo Ichikawa , Yoshihiro Hara , Koichiro Yuki , Katsuya Nozawa , Koji Katayama , Yoshihiko Kanzawa
发明人： Teruhito Ohnishi , Akira Asai , Takeshi Takagi , Tohru Saitoh , Yo Ichikawa , Yoshihiro Hara , Koichiro Yuki , Katsuya Nozawa , Koji Katayama , Yoshihiko Kanzawa
IPC分类号： H01L2972
CPC分类号： H01L21/76237 , H01L21/8249
摘要： In a bipolar transistor block, a base layer (20a) of SiGe single crystals and an emitter layer (26) of almost 100% of Si single crystals are stacked in this order over a collector diffused layer (9). Over both edges of the base layer (20a), a base undercoat insulating film (5a) and base extended electrodes (22) made of polysilicon are provided. The base layer (20a) has a peripheral portion with a thickness equal to that of the base undercoat insulating film (5a) and a center portion thicker than the peripheral portion. The base undercoat insulating film (5a) and gate insulating films (5b and 5c) for a CMOS block are made of the same oxide film. A stress resulting from a difference in thermal expansion coefficient between the SiGe layer as the base layer and the base undercoat insulating film 5a can be reduced, and a highly reliable BiCMOS device is realized.
摘要翻译： 在双极晶体管块中，SiGe单晶的基极层（20a）和几乎100％的Si单晶的发射极层（26）依次层叠在集电极扩散层（9）上。 在基底层（20a）的两个边缘上设置有由多晶硅制成的基底底涂层绝缘膜（5a）和基底延伸电极（22）。 基底层（20a）具有与基底底涂层绝缘膜（5a）的厚度相等的周边部分和比周边部分厚的中心部分。 用于CMOS块的基底涂层绝缘膜（5a）和栅极绝缘膜（5b和5c）由相同的氧化物膜制成。 由于作为基底层的SiGe层与基底底涂层绝缘膜5a之间的热膨胀系数的差异导致的应力可以降低，并且实现了高可靠性的BiCMOS器件。
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公开(公告)号：US20050092230A1
公开(公告)日：2005-05-05
申请号：US11009020
申请日：2004-12-13
申请人： Yoshihiko Kanzawa , Teruhito Ohnishi , Ken Idota , Tohru Saitoh , Akira Asai
发明人： Yoshihiko Kanzawa , Teruhito Ohnishi , Ken Idota , Tohru Saitoh , Akira Asai
IPC分类号： C30B1/00 , C30B23/02 , C30B25/02 , C30B29/52 , H01L21/205 , H01L21/31 , H01L21/322 , H01L21/324
CPC分类号： H01L21/324 , C30B23/02 , C30B25/02 , C30B29/52 , H01L21/02381 , H01L21/02529 , H01L21/02532 , H01L21/0262 , H01L21/02661 , H01L21/02664 , H01L21/322 , Y10S438/933
摘要： A method for fabricating a semiconductor crystal that has a first step for forming a semiconductor crystal layer (202) that contains carbon atoms and at least one kind of Group IV element other than carbon on a substrate (201), a second step for adding an impurity that is capable of reacting with oxygen to the semiconductor crystal layer (202), and a third step for removing the carbon atoms contained in the semiconductor crystal layer (202) by reacting the carbon with the impurity. This method makes it possible to fabricate a semiconductor crystal substrate in which the concentration of interstitial carbon atoms is satisfactorily reduced, thus resulting in excellent electrical properties when the substrate is applied to a semiconductor device.
摘要翻译： 一种制造半导体晶体的方法，其具有在基板（201）上形成含有碳原子的半导体晶体层（202）和除了碳以外的至少一种第IV族元素的第一工序，第二工序用于添加 能够与氧反应的半导体晶体层（202）的杂质，以及通过使碳与杂质反应来除去半导体结晶层（202）中所含的碳原子的第三工序。 该方法可以制造其中间隙碳原子的浓度令人满意地降低的半导体晶体衬底，从而当将衬底应用于半导体器件时获得优异的电性能。
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公开(公告)号：US07719031B2
公开(公告)日：2010-05-18
申请号：US10564085
申请日：2004-07-06
IPC分类号： H01L29/74
CPC分类号： H01L29/66242 , H01L29/7378
摘要： A bipolar transistor 120 comprises a substrate 1, a intrinsic base region 11 and an extrinsic base region 12. The intrinsic base region 11 comprises a silicon buffer layer 109 comprised of silicon which is formed on the substrate 1, and a composition-ratio graded base layer 111 which is formed on the silicon buffer layer and comprises silicon and at least germanium and where a composition ratio of the germanium to the silicon varies in a thickness direction of the composition-ratio graded base layer 111. The extrinsic base region 12 comprises an extrinsic base formation layer 113 comprised of silicon which is formed on the substrate and adjacent to the silicon buffer layer. And the thickness of the extrinsic base formation layer 113 is not less than 40 nm.
摘要翻译： 双极晶体管120包括衬底1，本征基极区域11和非本征基极区域12.本征基极区域11包括由衬底1上形成的硅构成的硅缓冲层109和组成比分级基底 层111，其形成在硅缓冲层上并且包含硅并且至少为锗，并且其中锗与硅的组成比在组成比梯度基底层111的厚度方向上变化。外部基极区12包括 外部基底形成层113由硅构成，其形成在衬底上并与硅缓冲层相邻。 外部基底形成层113的厚度不小于40nm。
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公开(公告)号：US20060225642A1
公开(公告)日：2006-10-12
申请号：US10402239
申请日：2003-03-31
申请人： Yoshihiko Kanzawa , Tohru Saitoh , Akira Asai , Teruhito Ohnishi
发明人： Yoshihiko Kanzawa , Tohru Saitoh , Akira Asai , Teruhito Ohnishi
CPC分类号： C30B25/04 , C30B25/18 , C30B29/52 , H01L21/02381 , H01L21/02447 , H01L21/0245 , H01L21/02529 , H01L21/02532 , H01L21/0262 , H01L21/02658 , H01L21/02661 , H01L29/1054
摘要： A method of forming semiconductor crystal of the present invention comprises the steps of heating a Si substrate to clean a surface of the Si substrate, epitaxially growing Si crystal on the Si substrate inside a crystal growth chamber at a growth temperature lower than a substrate temperature of the Si substrate in the cleaning step and higher than a growth temperature at which SiGe crystal is epitaxially grown later, and epitaxially growing the SiGe crystal on the Si crystal.
摘要翻译： 本发明的半导体晶体的形成方法包括以下步骤：加热Si衬底以清洁Si衬底的表面，在晶体生长室内的Si衬底上外延生长Si晶体，生长温度低于衬底温度 Si衬底在高于SiGe晶体后来生长的生长温度以及在Si晶体上外延生长SiGe晶体。
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公开(公告)号：US20070085167A1
公开(公告)日：2007-04-19
申请号：US10564085
申请日：2004-07-06
IPC分类号： H01L27/082
CPC分类号： H01L29/66242 , H01L29/7378
摘要： A bipolar transistor 120 comprises a substrate 1, a intrinsic base region 11 and an extrinsic base region 12. The intrinsic base region 11 comprises a silicon buffer layer 109 comprised of silicon which is formed on the substrate 1, and a composition-ratio graded base layer 111 which is formed on the silicon buffer layer and comprises silicon and at least germanium and where a composition ratio of the germanium to the silicon varies in a thickness direction of the composition-ratio graded base layer 111. The extrinsic base region 12 comprises an extrinsic base formation layer 113 comprised of silicon which is formed on the substrate and adjacent to the silicon buffer layer. And the thickness of the extrinsic base formation layer 113 is not less than 40 nm.
摘要翻译： 双极晶体管120包括衬底1，本征基极区域11和外部基极区域12。 本征基极区域11包括由衬底1上形成的硅构成的硅缓冲层109和形成在硅缓冲层上并包含硅和至少锗的组成比梯度的基底层111，其中组成 锗与硅的比例在组成比梯度的基底层111的厚度方向上变化。 外部基极区域12包括由硅构成的非本征基底形成层113，其形成在衬底上并与硅缓冲层相邻。 外部基底形成层113的厚度不小于40nm。
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