公开(公告)号：US08518762B2

公开(公告)日：2013-08-27

申请号：US13171834

申请日：2011-06-29

申请人： Tetsuhiro Tanaka ,  Yuta Endo

发明人： Tetsuhiro Tanaka ,  Yuta Endo

IPC分类号： H01L21/00 ,  H01L21/84

CPC分类号： H01L29/458 ,  H01L21/76804 ,  H01L21/76834 ,  H01L21/76882 ,  H01L21/76883

摘要： Provided is a method for manufacturing a semiconductor device having favorable electric characteristics with a high yield. A groove and/or a contact hole reaching a semiconductor region or a conductive region is formed in an insulating film covering the semiconductor region or the conductive region; a first conductive film is formed in the groove and/or the contact hole; the first conductive film is exposed to plasma generated from a mixed gas of an oxidizing gas and a halogen-based gas and to an atmosphere containing water to be fluidized partially or entirely; and a second conductive film is formed over the first conductive film.

摘要翻译： 提供一种以高产率制造具有良好的电特性的半导体器件的方法。 在覆盖半导体区域或导电区域的绝缘膜中形成到达半导体区域或导电区域的沟槽和/或接触孔; 在沟槽和/或接触孔中形成第一导电膜; 第一导电膜暴露于由氧化性气体和卤素系气体的混合气体产生的等离子体，并且含有水的气氛部分或全部被流化; 并且在第一导电膜上形成第二导电膜。

公开(公告)号：US20120001335A1

公开(公告)日：2012-01-05

申请号：US13171834

申请日：2011-06-29

申请人： Tetsuhiro Tanaka ,  Yuta Endo

发明人： Tetsuhiro Tanaka ,  Yuta Endo

IPC分类号： H01L23/48 ,  H01L21/28

CPC分类号： H01L29/458 ,  H01L21/76804 ,  H01L21/76834 ,  H01L21/76882 ,  H01L21/76883

摘要： Provided is a method for manufacturing a semiconductor device having favorable electric characteristics with a high yield. A groove and/or a contact hole reaching a semiconductor region or a conductive region is formed in an insulating film covering the semiconductor region or the conductive region; a first conductive film is formed in the groove and/or the contact hole; the first conductive film is exposed to plasma generated from a mixed gas of an oxidizing gas and a halogen-based gas and to an atmosphere containing water to be fluidized partially or entirely; and a second conductive film is formed over the first conductive film.

摘要翻译： 提供一种以高产率制造具有良好的电特性的半导体器件的方法。 在覆盖半导体区域或导电区域的绝缘膜中形成到达半导体区域或导电区域的沟槽和/或接触孔; 在沟槽和/或接触孔中形成第一导电膜; 第一导电膜暴露于由氧化性气体和卤素系气体的混合气体产生的等离子体，并且含有水的气氛部分或全部被流化; 并且在第一导电膜上形成第二导电膜。

公开(公告)号：US09159781B2

公开(公告)日：2015-10-13

申请号：US13433563

申请日：2012-03-29

申请人： Kanta Abe ,  Hidekazu Miyairi ,  Tetsuhiro Tanaka ,  Takashi Ienaga ,  Yoshitaka Yamamoto

发明人： Kanta Abe ,  Hidekazu Miyairi ,  Tetsuhiro Tanaka ,  Takashi Ienaga ,  Yoshitaka Yamamoto

IPC分类号： H01L21/20 ,  H01L21/36 ,  H01L29/04 ,  H01L29/66 ,  H01L29/786

摘要： Provided is a method for manufacturing a semiconductor device, in which a degradation of characteristics of a thin film transistor can be suppressed by performing plasma oxidation treatment on a gate insulating film containing nitrogen. An embodiment of the present invention is a method for manufacturing a semiconductor device comprising a thin film transistor including a gate electrode, a gate insulating film containing nitrogen, and a channel region in microcrystalline semiconductor films. The method includes the steps of performing plasma treatment on the gate insulating film in an oxidizing gas atmosphere containing hydrogen and an oxidizing gas containing an oxygen atom, and forming the microcrystalline semiconductor film over the gate insulating film. Formula (1), a/b≧2, and Formula (2), b>0, are satisfied, where the amount of hydrogen and the amount of the oxidizing gas in the oxidizing gas atmosphere are a and b, respectively.

公开(公告)号：US08592908B2

公开(公告)日：2013-11-26

申请号：US13177585

申请日：2011-07-07

申请人： Shunpei Yamazaki ,  Mitsuhiro Ichijo ,  Makoto Furuno ,  Takashi Ohtsuki ,  Kenichi Okazaki ,  Tetsuhiro Tanaka ,  Seiji Yasumoto

发明人： Shunpei Yamazaki ,  Mitsuhiro Ichijo ,  Makoto Furuno ,  Takashi Ohtsuki ,  Kenichi Okazaki ,  Tetsuhiro Tanaka ,  Seiji Yasumoto

IPC分类号： H01L29/06

CPC分类号： H01L21/76254 ,  H01L21/84

摘要： To provide a semiconductor substrate including a crystalline semiconductor layer which is suitable for practical use, even if a material different from that of the semiconductor layer is used for a supporting substrate, and a semiconductor device using the semiconductor substrate. The semiconductor substrate includes a bonding layer which forms a bonding plane, a barrier layer formed of an insulating material containing nitrogen, a relief layer which is formed of an insulating material that includes nitrogen at less than 20 at. % and hydrogen at 1 at. % to 20 at. %, and an insulating layer containing a halogen, between a supporting substrate and a single-crystal semiconductor layer. The semiconductor device includes the above-described structure at least partially, and a gate insulating layer formed by a microwave plasma CVD method using SiH4 and N2O as source gases is in contact with the single-crystal semiconductor layer.

摘要翻译： 为了提供包括适用于实际使用的结晶半导体层的半导体衬底，以及使用与半导体层的材料不同的材料用于支撑衬底，以及使用该半导体衬底的半导体器件。 半导体基板包括形成接合面的接合层，由含氮的绝缘材料形成的阻挡层，由包含小于20at的氮的绝缘材料形成的凸版层。 ％和氢气在1 at。 ％至20 at。 ％，以及含有卤素的绝缘层，在支撑基板和单晶半导体层之间。 半导体器件至少部分地包括上述结构，并且通过使用SiH 4和N 2 O作为源气体的微波等离子体CVD方法形成的栅极绝缘层与单晶半导体层接触。

公开(公告)号：US20120001332A1

公开(公告)日：2012-01-05

申请号：US13172416

申请日：2011-06-29

申请人： Tetsuhiro Tanaka

发明人： Tetsuhiro Tanaka

IPC分类号： H01L23/48 ,  H01L21/20

CPC分类号： H01L23/53238 ,  H01L29/04 ,  H01L29/458 ,  H01L29/66765 ,  H01L29/78672 ,  H01L29/78696 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor film having an impurity region to which at least an n-type or p-type impurity is added and a wiring are provided. The wiring includes a diffusion prevention film containing a conductive metal oxide, and a low resistance conductive film over the diffusion prevention film. In a contact portion between the wiring and the semiconductor film, the diffusion prevention film and the impurity region are in contact with each other. The diffusion prevention film is formed in such a manner that a conductive film is exposed to plasma generated from a mixed gas of an oxidizing gas and a halogen-based gas to form an oxide of a metal material contained in the conductive film, the conductive film in which the oxide of the metal material is formed is exposed to an atmosphere containing water to be fluidized, and the fluidized conductive film is solidified.

摘要翻译： 具有添加了至少n型或p型杂质的杂质区域和配线的半导体膜。 布线包括含有导电金属氧化物的扩散防止膜和在扩散防止膜上的低电阻导电膜。 在布线和半导体膜之间的接触部分中，扩散防止膜和杂质区彼此接触。 扩散防止膜形成为使得导电膜暴露于由氧化气体和卤素系气体的混合气体产生的等离子体，以形成导电膜中所含的金属材料的氧化物，导电膜 其中形成金属材料的氧化物暴露于含有待流化的水的气氛中，流化的导电膜固化。

公开(公告)号：US07989273B2

公开(公告)日：2011-08-02

申请号：US12155052

申请日：2008-05-29

申请人： Shunpei Yamazaki ,  Mitsuhiro Ichijo ,  Makoto Furuno ,  Takashi Ohtsuki ,  Kenichi Okazaki ,  Tetsuhiro Tanaka ,  Seiji Yasumoto

发明人： Shunpei Yamazaki ,  Mitsuhiro Ichijo ,  Makoto Furuno ,  Takashi Ohtsuki ,  Kenichi Okazaki ,  Tetsuhiro Tanaka ,  Seiji Yasumoto

IPC分类号： H01L21/336

CPC分类号： H01L21/76254 ,  H01L21/84

摘要： To provide a semiconductor substrate including a crystalline semiconductor layer which is suitable for practical use, even if a material different from that of the semiconductor layer is used for a supporting substrate, and a semiconductor device using the semiconductor substrate. The semiconductor substrate includes a bonding layer which forms a bonding plane, a barrier layer formed of an insulating material containing nitrogen, a relief layer which is formed of an insulating material that includes nitrogen at less than 20 at. % and hydrogen at 1 at. % to 20 at. %, and an insulating layer containing a halogen, between a supporting substrate and a single-crystal semiconductor layer. The semiconductor device includes the above-described structure at least partially, and a gate insulating layer formed by a microwave plasma CVD method using SiH4 and N2O as source gases is in contact with the single-crystal semiconductor layer.

摘要翻译： 为了提供包括适用于实际使用的结晶半导体层的半导体衬底，以及使用与半导体层的材料不同的材料用于支撑衬底，以及使用该半导体衬底的半导体器件。 半导体基板包括形成接合面的接合层，由含氮的绝缘材料形成的阻挡层，由包含小于20at的氮的绝缘材料形成的凸版层。 ％和氢气在1 at。 ％至20 at。 ％，以及含有卤素的绝缘层，在支撑基板和单晶半导体层之间。 半导体器件至少部分地包括上述结构，并且通过使用SiH 4和N 2 O作为源气体的微波等离子体CVD方法形成的栅极绝缘层与单晶半导体层接触。

公开(公告)号：US09159841B2

公开(公告)日：2015-10-13

申请号：US13466480

申请日：2012-05-08

申请人： Tetsuhiro Tanaka ,  Shinya Sasagawa

发明人： Tetsuhiro Tanaka ,  Shinya Sasagawa

IPC分类号： H01L21/336 ,  H01L29/786 ,  H01L21/469 ,  H01L21/306 ,  H01L29/788 ,  H01L29/66 ,  H01L29/04 ,  H01L21/02

CPC分类号： H01L29/78696 ,  H01L21/02164 ,  H01L21/02211 ,  H01L21/02216 ,  H01L21/02274 ,  H01L29/04 ,  H01L29/66765 ,  H01L29/78648 ,  H01L29/78672 ,  H01L29/788

摘要： A thin film transistor having low off-state current and excellent electrical characteristics can be manufactured. In an inverted staggered thin film transistor including a semiconductor film in which at least a microcrystalline semiconductor region and an amorphous semiconductor region are stacked, a conductive film and an etching protective film are stacked over the semiconductor film; a mask is formed over the etching protective film; first etching treatment in which the etching protective film, the conductive film, and the amorphous semiconductor region are partly etched is performed; then, the mask is removed. Next, second etching treatment in which the exposed amorphous semiconductor region and the microcrystalline semiconductor region are partly dry-etched is performed using the etched etching protective film as a mask so that the microcrystalline semiconductor region is partly exposed to form a back channel region.

摘要翻译： 可以制造具有低截止电流和优异电特性的薄膜晶体管。 在包括半导体膜的倒置交错薄膜晶体管中，其中层叠有至少一个微晶半导体区域和非晶半导体区域，在半导体膜上层叠导电膜和蚀刻保护膜; 在蚀刻保护膜上形成掩模; 执行其中蚀刻保护膜，导电膜和非晶半导体区域被部分蚀刻的第一蚀刻处理; 然后，去除面具。 接下来，使用蚀刻蚀刻保护膜作为掩模进行其中暴露的非晶半导体区域和微晶半导体区域被部分干法蚀刻的第二蚀刻处理，使得微晶半导体区域部分地暴露以形成背沟道区域。

公开(公告)号：US08916425B2

公开(公告)日：2014-12-23

申请号：US13184589

申请日：2011-07-18

申请人： Ryota Tajima ,  Tetsuhiro Tanaka ,  Takashi Ohtsuki ,  Ryo Tokumaru ,  Yuji Egi ,  Erika Kato ,  Miyako Morikubo

发明人： Ryota Tajima ,  Tetsuhiro Tanaka ,  Takashi Ohtsuki ,  Ryo Tokumaru ,  Yuji Egi ,  Erika Kato ,  Miyako Morikubo

IPC分类号： H01L21/00 ,  C30B29/08 ,  H01L29/786 ,  H01L29/04 ,  C30B29/06 ,  C30B25/18 ,  C30B25/10

CPC分类号： H01L29/78696 ,  C30B25/105 ,  C30B25/183 ,  C30B29/06 ,  C30B29/08 ,  H01L29/04 ,  H01L29/78618 ,  H01L29/78648

摘要： A seed crystal including mixed phase grains having high crystallinity with a low grain density is formed under a first condition, and a microcrystalline semiconductor film is formed over the seed crystal under a second condition which allows the mixed phase grains in the seed crystal to grow to fill a space between the mixed phase grains. In the first condition, the flow rate of hydrogen is 50 times or greater and 1000 times or less that of a deposition gas containing silicon or germanium, and the pressure in a process chamber is greater than 1333 Pa and 13332 Pa or less. In the second condition, the flow rate of hydrogen is 100 times or greater and 2000 times or less that of a deposition gas containing silicon or germanium, and the pressure in the process chamber is 1333 Pa or greater and 13332 Pa or less.

摘要翻译： 在第一条件下形成包括具有低晶粒密度的高结晶度的混合相晶粒的晶种，并且在第二条件下在晶种上形成微晶半导体膜，所述第二条件允许晶种中的混晶相生长至 填充混合晶粒之间的空间。 在第一条件下，氢气的流量为含有硅或锗的沉积气体的50倍以上且1000倍以下，处理室中的压力大于1333Pa，13332Pa以下。 在第二条件下，氢气的流量为含有硅或锗的沉积气体的100倍以上且2000倍以下，处理室内的压力为1333Pa以上且13332Pa以下。

公开(公告)号：US08828859B2

公开(公告)日：2014-09-09

申请号：US13368379

申请日：2012-02-08

申请人： Tetsuhiro Tanaka ,  Ryo Tokumaru ,  Takashi Ohtsuki ,  Ryota Tajima ,  Erika Kato

发明人： Tetsuhiro Tanaka ,  Ryo Tokumaru ,  Takashi Ohtsuki ,  Ryota Tajima ,  Erika Kato

IPC分类号： H01L21/3205 ,  H01L29/66 ,  H01L29/04 ,  H01L21/02 ,  H01L29/786

CPC分类号： H01L29/66765 ,  H01L21/02422 ,  H01L21/02532 ,  H01L21/0262 ,  H01L29/04 ,  H01L29/78648 ,  H01L29/78696

摘要： A microcrystalline semiconductor film is formed over a substrate using a plasma CVD apparatus which includes a reaction chamber in such a manner that a deposition gas and hydrogen are supplied to the reaction chamber in which the substrate is set between a first electrode and a second electrode; and plasma is generated in the reaction chamber by supplying high-frequency power to the first electrode. Note that the plasma density in a region overlapping with an end portion of the substrate in a region where the plasma is generated is set to be higher than that in a region which is positioned more on the inside than the region overlapping with the end portion of the substrate, so that the microcrystalline semiconductor film is formed over a region which is positioned more on the inside than the end portion of the substrate.

摘要翻译： 使用等离子体CVD装置在基板上形成微晶半导体膜，所述等离子体CVD装置包括反应室，使得将沉积气体和氢气供应到反应室中，其中基板设置在第一电极和第二电极之间; 并且通过向第一电极提供高频电力而在反应室中产生等离子体。 注意，在等离子体产生的区域中与衬底的端部重叠的区域中的等离子体密度设定为高于在位于更内侧的区域中的等离子体密度 使得微结晶半导体膜形成在位于比衬底的端部更靠内侧的区域上。

公开(公告)号：US08324699B2

公开(公告)日：2012-12-04

申请号：US12969789

申请日：2010-12-16

申请人： Mitsuhiro Ichijo ,  Kenichi Okazaki ,  Tetsuhiro Tanaka ,  Takashi Ohtsuki ,  Seiji Yasumoto ,  Shunpei Yamazaki

发明人： Mitsuhiro Ichijo ,  Kenichi Okazaki ,  Tetsuhiro Tanaka ,  Takashi Ohtsuki ,  Seiji Yasumoto ,  Shunpei Yamazaki

IPC分类号： H01L27/14

CPC分类号： H01L27/1266 ,  C23C16/02 ,  C23C16/401 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/02332 ,  H01L21/0234 ,  H01L21/02354 ,  H01L21/02356 ,  H01L21/02532 ,  H01L21/02686 ,  H01L21/31155 ,  H01L21/3143 ,  H01L21/31608 ,  H01L21/67207 ,  H01L27/1214 ,  H01L27/1255 ,  H01L27/13

摘要： A method for manufacturing an insulating film, which is used as an insulating film used for a semiconductor integrated circuit, whose reliability can be ensured even though it has small thickness, is provided. In particular, a method for manufacturing a high-quality insulating film over a substrate having an insulating surface, which can be enlarged, at low substrate temperature, is provided. A monosilane gas (SiH4), nitrous oxide (N2O), and a rare gas are introduced into a chamber to generate high-density plasma at a pressure higher than or equal to 10 Pa and lower than or equal to 30 Pa so that an insulating film is formed over a substrate having an insulating surface. After that, the supply of a monosilane gas is stopped, and nitrous oxide (N2O) and a rare gas are introduced without exposure to the air to perform plasma treatment on a surface of the insulating film.

摘要翻译： 提供了用作半导体集成电路的绝缘膜的绝缘膜的制造方法，其即使厚度小也能够确保其可靠性。 特别地，提供了一种在低基板温度下在具有绝缘表面的基板上制造高品质绝缘膜的方法，该绝缘表面可以被扩大。 将甲硅烷气体（SiH 4），一氧化二氮（N 2 O）和稀有气体引入室中以在高于或等于10Pa且低于或等于30Pa的压力下产生高密度等离子体，使得绝缘 膜形成在具有绝缘表面的基板上。 之后，停止供给单硅烷气体，一边不暴露于空气中一氧化二氮（N2O）和稀有气体被引入到绝缘膜的表面进行等离子体处理。