Methods of forming plurality of capacitor devices
    2.
    发明申请
    Methods of forming plurality of capacitor devices 失效
    形成多个电容器装置的方法

    公开(公告)号:US20060063345A1

    公开(公告)日:2006-03-23

    申请号:US11272247

    申请日:2005-11-10

    IPC分类号: H01L21/20 H01L21/8242

    摘要: The invention includes semiconductor constructions, and also includes methods of forming pluralities of capacitor devices. An exemplary method of the invention includes forming conductive storage node material within openings in an insulative material to form conductive containers. A retaining structure lattice is formed in physical contact with at least some of the containers, and subsequently the insulative material is removed to expose outer surfaces of the containers. The retaining structure can alleviate toppling or other loss of structural integrity of the container structures. The electrically conductive containers correspond to first capacitor electrodes. After the outer sidewalls of the containers are exposed, dielectric material is formed within the containers and along the exposed outer sidewalls. Subsequently, a second capacitor electrode is formed over the dielectric material. The first and second capacitor electrodes, together with the dielectric material, form a plurality of capacitor devices.

    摘要翻译: 本发明包括半导体结构,并且还包括形成多个电容器器件的方法。 本发明的示例性方法包括在绝缘材料的开口内形成导电储存节点材料以形成导电容器。 形成与至少一些容器物理接触的保持结构格子,随后去除绝缘材料以露出容器的外表面。 保持结构可以减轻容器结构的结构完整性的倒塌或其它损失。 导电容器对应于第一电容器电极。 在容器的外侧壁暴露之后,电介质材料形成在容器内并沿外露的外侧壁。 随后,在电介质材料上形成第二电容器电极。 第一和第二电容器电极与电介质材料一起形成多个电容器器件。

    Methods of forming semiconductor constructions
    5.
    发明申请
    Methods of forming semiconductor constructions 有权
    形成半导体结构的方法

    公开(公告)号:US20070232013A1

    公开(公告)日:2007-10-04

    申请号:US11742983

    申请日:2007-05-01

    IPC分类号: H01L21/20

    摘要: The invention includes semiconductor constructions, and also includes methods of forming pluralities of capacitor devices. An exemplary method of the invention includes forming conductive storage node material within openings in an insulative material to form conductive containers. A retaining structure lattice is formed in physical contact with at least some of the containers, and subsequently the insulative material is removed to expose outer surfaces of the containers. The retaining structure can alleviate toppling or other loss of structural integrity of the container structures. The electrically conductive containers correspond to first capacitor electrodes. After the outer sidewalls of the containers are exposed, dielectric material is formed within the containers and along the exposed outer sidewalls. Subsequently, a second capacitor electrode is formed over the dielectric material. The first and second capacitor electrodes, together with the dielectric material, form a plurality of capacitor devices.

    摘要翻译: 本发明包括半导体结构,并且还包括形成多个电容器器件的方法。 本发明的示例性方法包括在绝缘材料的开口内形成导电储存节点材料以形成导电容器。 形成与至少一些容器物理接触的保持结构格子,随后去除绝缘材料以露出容器的外表面。 保持结构可以减轻容器结构的结构完整性的倒塌或其它损失。 导电容器对应于第一电容器电极。 在容器的外侧壁暴露之后,电介质材料形成在容器内并沿外露的外侧壁。 随后,在电介质材料上形成第二电容器电极。 第一和第二电容器电极与电介质材料一起形成多个电容器器件。

    Semiconductor constructions
    6.
    发明申请
    Semiconductor constructions 失效
    半导体结构

    公开(公告)号:US20070075349A1

    公开(公告)日:2007-04-05

    申请号:US11591254

    申请日:2006-10-31

    IPC分类号: H01L29/94

    摘要: The invention includes a method of depositing a noble metal. A substrate is provided. The substrate has a first region and a second region. The first and second regions are exposed to a mixture comprising a precursor of a noble metal and an oxidant. During the exposure, a layer containing the noble metal is selectively deposited onto the first region relative to the second region. In particular applications, the first region can comprise borophosphosilicate glass, and the second region can comprise either aluminum oxide or doped non-oxidized silicon. The invention also includes capacitor constructions and methods of forming capacitor constructions.

    摘要翻译: 本发明包括沉积贵金属的方法。 提供基板。 衬底具有第一区域和第二区域。 第一和第二区域暴露于包含贵金属和氧化剂的前体的混合物中。 在曝光期间,包含贵金属的层相对于第二区域选择性地沉积在第一区域上。 在具体应用中,第一区域可以包括硼磷硅酸盐玻璃,并且第二区域可以包括氧化铝或掺杂的非氧化硅。 本发明还包括电容器结构和形成电容器结构的方法。

    Semiconductor constructions
    7.
    发明申请
    Semiconductor constructions 有权
    半导体结构

    公开(公告)号:US20070052115A1

    公开(公告)日:2007-03-08

    申请号:US11595436

    申请日:2006-11-09

    IPC分类号: H01L29/94

    摘要: The invention includes semiconductor constructions, and also includes methods of forming pluralities of capacitor devices. An exemplary method of the invention includes forming conductive storage node material within openings in an insulative material to form conductive containers. A retaining structure lattice is formed in physical contact with at least some of the containers, and subsequently the insulative material is removed to expose outer surfaces of the containers. The retaining structure can alleviate toppling or other loss of structural integrity of the container structures. The electrically conductive containers correspond to first capacitor electrodes. After the outer sidewalls of the containers are exposed, dielectric material is formed within the containers and along the exposed outer sidewalls. Subsequently, a second capacitor electrode is formed over the dielectric material. The first and second capacitor electrodes, together with the dielectric material, form a plurality of capacitor devices.

    摘要翻译: 本发明包括半导体结构,并且还包括形成多个电容器器件的方法。 本发明的示例性方法包括在绝缘材料的开口内形成导电储存节点材料以形成导电容器。 形成与至少一些容器物理接触的保持结构格子,随后去除绝缘材料以露出容器的外表面。 保持结构可以减轻容器结构的结构完整性的倒塌或其它损失。 导电容器对应于第一电容器电极。 在容器的外侧壁暴露之后,电介质材料形成在容器内并沿外露的外侧壁。 随后,在电介质材料上形成第二电容器电极。 第一和第二电容器电极与电介质材料一起形成多个电容器器件。

    Capacitor constructions
    8.
    发明申请
    Capacitor constructions 失效
    电容器结构

    公开(公告)号:US20060252201A1

    公开(公告)日:2006-11-09

    申请号:US11485926

    申请日:2006-07-12

    IPC分类号: H01L21/8242

    摘要: The invention includes methods of forming rugged electrically conductive surfaces. In one method, a layer is formed across a substrate and subsequently at least partially dissociated to form gaps extending to the substrate. An electrically conductive surface is formed to extend across the at least partially dissociated layer and within the gaps. The electrically conductive surface has a rugged topography imparted by the at least partially dissociated layer and the gaps. The topographically rugged surface can be incorporated into capacitor constructions. The capacitor constructions can be incorporated into DRAM cells, and such DRAM cells can be incorporated into electrical systems.

    摘要翻译: 本发明包括形成坚固的导电表面的方法。 在一种方法中,跨越衬底形成层,并且随后至少部分地解离以形成延伸到衬底的间隙。 形成导电表面以跨越至少部分解离的层并且在间隙内延伸。 导电表面具有由至少部分解离的层和间隙赋予的粗糙的形貌。 地形坚固的表面可以结合到电容器结构中。 电容器结构可以并入DRAM单元中,并且这样的DRAM单元可以被并入到电气系统中。

    Methods of forming a plurality of capacitor devices

    公开(公告)号:US20060063344A1

    公开(公告)日:2006-03-23

    申请号:US11272232

    申请日:2005-11-10

    IPC分类号: H01L21/20

    摘要: The invention includes semiconductor constructions, and also includes methods of forming pluralities of capacitor devices. An exemplary method of the invention includes forming conductive storage node material within openings in an insulative material to form conductive containers. A retaining structure lattice is formed in physical contact with at least some of the containers, and subsequently the insulative material is removed to expose outer surfaces of the containers. The retaining structure can alleviate toppling or other loss of structural integrity of the container structures. The electrically conductive containers correspond to first capacitor electrodes. After the outer sidewalls of the containers are exposed, dielectric material is formed within the containers and along the exposed outer sidewalls. Subsequently, a second capacitor electrode is formed over the dielectric material. The first and second capacitor electrodes, together with the dielectric material, form a plurality of capacitor devices.

    Memory circuitry
    10.
    发明申请

    公开(公告)号:US20060033140A1

    公开(公告)日:2006-02-16

    申请号:US10918613

    申请日:2004-08-13

    IPC分类号: H01L21/8242 H01L29/94

    摘要: The invention includes memory circuitry. In one implementation, memory circuitry includes a memory array comprising a plurality of memory cell capacitors. Individual of the capacitors include a storage node electrode, a capacitor dielectric region, and a cell electrode. The cell electrode is commonly shared among at least some of the plurality of memory cell capacitors within the memory array. The cell electrode within the memory array includes a conductor metal layer including at least one of elemental tungsten, a tungsten alloy, tungsten silicide and tungsten nitride. Polysilicon is received over the conductor metal layer. The conductor metal layer and the polysilicon are received over the storage node electrodes of said at least some of the plurality of memory cell capacitors. Other aspects and implementations are contemplated.