利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

73 条记录 (耗时 0.022 秒)

    Memory and method for fabricating it
    1.
    发明申请
    Memory and method for fabricating it 审中-公开
    记忆及其制作方法

    公开(公告)号：US20060275981A1

    公开(公告)日：2006-12-07

    申请号：US11442602

    申请日：2006-05-30

    申请人： Alejandro Avellan ,  Matthias Goldbach ,  Thomas Hecht ,  Stefan Jakschik ,  Andreas Orth ,  Uwe Schroder ,  Michael Stadtmueller ,  Olaf Storbeck

    发明人： Alejandro Avellan ,  Matthias Goldbach ,  Thomas Hecht ,  Stefan Jakschik ,  Andreas Orth ,  Uwe Schroder ,  Michael Stadtmueller ,  Olaf Storbeck

    IPC分类号： H01L21/8242 ,  H01L29/94

    CPC分类号： H01L29/66181 ,  H01L27/10829 ,  H01L27/10867

    摘要： Memory and method for fabricating it A memory formed as an integrated circuit in a semiconductor substrate and having storage capacitors and switching transistors. The storage capacitors are formed in the semiconductor substrate in a trench and have an outer electrode layer, which is formed around the trench, a dielectric intermediate layer, which is embodied on the trench wall, and an inner electrode layer, with which the trench is essentially filled, and the switching transistors are formed in the semiconductor substrate in a surface region and have a first source/drain doping region, a second source/drain doping region and an intervening channel, which is separated from a gate electrode by an insulator layer.

    摘要翻译： 存储器及其制造方法在半导体衬底中形成为集成电路并具有存储电容器和开关晶体管的存储器。 存储电容器形成在沟槽中的半导体衬底中，并且具有围绕沟槽形成的外部电极层，体现在沟槽壁上的电介质中间层和内部电极层，沟槽是 基本上填充，并且开关晶体管形成在表面区域中的半导体衬底中，并且具有第一源极/漏极掺杂区域，第二源极/漏极掺杂区域和中间沟道，其通过绝缘体层与栅电极分离 。

    Transistor and method of providing interlocking strained silicon on a silicon substrate
    5.
    发明申请
    Transistor and method of providing interlocking strained silicon on a silicon substrate 审中-公开
    在硅衬底上提供互锁应变硅的晶体管和方法

    公开(公告)号：US20070281432A1

    公开(公告)日：2007-12-06

    申请号：US11443501

    申请日：2006-05-30

    申请人： Matthias Goldbach ,  Thomas Hecht

    发明人： Matthias Goldbach ,  Thomas Hecht

    IPC分类号： H01L21/336

    CPC分类号： H01L21/823807 ,  H01L21/76229 ,  H01L21/823878 ,  H01L29/7846

    摘要： A method for providing interlocking strained silicon on a silicon substrate, comprises providing a mask on a surface of the substrate. The mask comprises a first plurality of openings corresponding to a first plurality of holes to be etched and comprises a second plurality of openings corresponding to a second plurality of holes to be etched. The surface of the substrate is etched through the mask to form the first and second pluralities of holes. A first strain type material is deposited into the first plurality of holes to form a plurality of first strain type portions. A plurality of second strain type portions are formed at the second plurality of holes.

    摘要翻译： 一种在硅衬底上提供互锁应变硅的方法，包括在衬底的表面上提供掩模。 掩模包括对应于待蚀刻的第一多个孔的第一多个开口，并且包括对应于待蚀刻的第二多个孔的第二多个开口。 通过掩模蚀刻衬底的表面以形成第一和第二多个孔。 第一应变型材料沉积到第一多个孔中以形成多个第一应变型部分。 在第二多个孔处形成多个第二应变型部分。

    Charge-trapping memory device and method of production
    7.
    发明授权
    Charge-trapping memory device and method of production 失效
    电荷俘获记忆装置及生产方法

    公开(公告)号：US07132337B2

    公开(公告)日：2006-11-07

    申请号：US11017194

    申请日：2004-12-20

    申请人： Stefan Jakschik ,  Matthias Goldbach ,  Thomas Mikolajick ,  Thomas Hecht

    发明人： Stefan Jakschik ,  Matthias Goldbach ,  Thomas Mikolajick ,  Thomas Hecht

    IPC分类号： H01L21/336

    CPC分类号： H01L29/512 ,  H01L21/28282 ,  H01L29/42348 ,  H01L29/78 ,  H01L29/7923

    摘要： Charge-trapping regions are arranged beneath lower edges of the gate electrode separate from one another. Source/drain regions are formed in self-aligned manner with respect to the charge-trapping regions by means of a doping process at low energy in order to form shallow junctions laterally extending only a small distance beneath the charge-trapping regions. The self-alignment ensures a large number of program-erase cycles with high effectiveness and good data retention, because the locations of the injections of charge carriers of opposite signs are narrowly and exactly defined.

    摘要翻译： 电荷捕获区域布置在栅电极的下边缘下方彼此分离。 源极/漏极区域以相对于电荷俘获区域的自对准方式通过在低能量下的掺杂工艺形成，以形成仅在电荷俘获区域下方仅小的距离的浅结。 自对准确保了大量的编程擦除周期，具有高效率和良好的数据保留，因为注入相反符号的电荷载体的位置被狭义地和精确地定义。

    Method for the production of a self-adjusted structure on a semiconductor wafer
    8.
    发明授权
    Method for the production of a self-adjusted structure on a semiconductor wafer 失效
    在半导体晶片上制造自调整结构的方法

    公开(公告)号：US07041568B2

    公开(公告)日：2006-05-09

    申请号：US10485307

    申请日：2002-07-18

    申请人： Matthias Goldbach ,  Thomas Hecht ,  Jörn Lützen ,  Bernhard Sell

    发明人： Matthias Goldbach ,  Thomas Hecht ,  Jörn Lützen ,  Bernhard Sell

    IPC分类号： H01L21/20

    CPC分类号： H01L27/10867 ,  H01L21/0274

    摘要： A structure on a layer surface of the semiconductor wafer has at least one first area region (8, 9), which is reflective for electromagnetic radiation, and at least one second, essentially nonreflecting area region (10, 11, 12). A light-transmissive insulation layer (13) and a light-sensitive layer are produced on said layer surface. The electromagnetic radiation is directed onto the light-sensitive layer with an angle Θ of incidence and the structure of the layer surface is imaged with a lateral offset into the light-sensitive layer.

    摘要翻译： 半导体晶片的层表面上的结构具有至少一个反射用于电磁辐射的第一区域区域（8,9）和至少一个第二基本上不反射区域区域（10,11,12）。 在所述层表面上产生透光绝缘层（13）和感光层。 将电磁辐射以角度引导到感光层上。入射角和层表面的结构以横向偏移成像到感光层中。

    Method for fabricating microchips using metal oxide masks
    10.
    发明授权
    Method for fabricating microchips using metal oxide masks 有权
    使用金属氧化物掩模制造微芯片的方法

    公开(公告)号：US07268037B2

    公开(公告)日：2007-09-11

    申请号：US11040091

    申请日：2005-01-24

    申请人： Stefan Jakschik ,  Thomas Hecht ,  Uwe Schröder ,  Matthias Goldbach

    发明人： Stefan Jakschik ,  Thomas Hecht ,  Uwe Schröder ,  Matthias Goldbach

    IPC分类号： H01L21/8242

    CPC分类号： H01L27/1087 ,  H01L21/31111 ,  H01L21/3141 ,  H01L21/31616 ,  H01L29/66181

    摘要： A process for modifying sections of a semiconductor includes covering the sections to remain free of doping with a metal oxide, e.g., aluminum oxide. Then, the semiconductor is doped, for example, from the gas phase, in those sections that are not covered by the aluminum oxide. Finally, the aluminum oxide is selectively removed again, for example using hot phosphoric acid. Sections of the semiconductor surface which are formed from silicon, silicon oxide or silicon nitride remain in place on the wafer.

    摘要翻译： 用于修改半导体部分的方法包括覆盖这些部分以保持不掺杂金属氧化物，例如氧化铝。 然后，在未被氧化铝覆盖的那些部分中，例如从气相掺杂半导体。 最后，再次选择性地除去氧化铝，例如使用热磷酸。 由硅，氧化硅或氮化硅形成的半导体表面的部分保留在晶片上。