摘要:
Described are imprint lithography templates, methods of forming and using the templates, and a template holder device. An imprint lithography template may include a body with a plurality of recesses on a surface of the body. The body may be of a material that is substantially transparent to activating light. At least a portion of the plurality of recesses may define features having a feature size less than about 250 nm. A template may be formed by obtaining a material that is substantially transparent to activating light and forming a plurality or recesses on a surface of the template. In some embodiments, a template may further include at least one alignment mark. In some embodiments, a template may further include a gap sensing area. An imprint lithography template may be used to form an imprinted layer in a light curable liquid disposed on a substrate. During use, the template may be disposed within a template holder. The template holder may include a body with an opening configured to receive the template, a support plate, and at least one piezo actuator coupled to the body. The piezo actuator may be configured to alter a physical dimension of the template during use.
摘要:
The present invention includes a template comprising a plurality of protrusions and a plurality of recessions with a distance between a zenith of any of the plurality of protrusions and a nadir of any one of the plurality of recessions being less than 250 nm.
摘要:
One embodiment of the present invention is an imprint template for imprint lithography that comprises alignment marks embedded in bulk material of the imprint template.
摘要:
An imprint lithography template may be used to form an imprinted layer in a light curable liquid disposed on a substrate. During use, the template may be disposed within a template holder. The template holder may include a body with an opening configured to receive the template, a support plate, and an actuator system coupled to the body. The actuator system may be configured to alter a physical dimension of the template during use.
摘要:
The present invention includes a method of aligning a substrate and a template spaced-apart from the substrate with an activating light curable liquid disposed therebetween, the substrate having substrate alignment marks and the template having template alignment marks, the method including, reducing a distance between the substrate and the template to cause a spreading of the activating light curable liquid; and varying an overlay placement of the template with respect to the substrate such that the template alignment marks are substantially aligned with the substrate alignment marks before the spreading causes the activating light curable liquid to cover an area between the substrate alignment marks and the template alignment marks.
摘要:
The present invention includes an imprint lithography system for impinging a flux of light upon a liquid to polymerize the liquid, the system including, a source of light producing the flux of light; and a template having overlay marks being disposed between the liquid and the source of light and being opaque to the flux of light, with a pitch of the overlay marks establishing a polarization of the flux of light such that the flux of light impinges upon and polymerizes the liquid in superimposition with the overlay marks.
摘要:
A method for forming an interconnect structure with nanocolumnar intermetal dielectric is described involving the construction of an interconnect structure using a solid dielectric, and introducing a regular array of vertically aligned nanoscale pores through stencil formation and etching to form a hole array and subsequently pinching off the tops of the hole array with a cap dielectric. Variations of the method and means to construct a multilevel nanocolumnar interconnect structure are also described.
摘要:
This invention provides a method for reducing tip-to-tip spacing between lines using a combination of photolithographic and copolymer self-assembling lithographic techniques. A mask layer is first formed over a substrate with a line structure. A trench opening of a width d is created in the mask layer. A layer of a self-assembling block copolymer is then applied over the mask layer. The block copolymer layer is annealed to form a single unit polymer block of a width or a diameter w which is smaller than d inside the trench opening. The single unit polymer block is selectively removed to form a single opening of a width or a diameter w inside the trench opening. An etch transfer process is performed using the single opening as a mask to form an opening in the line structure in the substrate.
摘要:
A new lithographic process comprises reducing the linewidth of an image while maintaining the lithographic process window, and using this process to fabricate pitch split structures comprising nm order (e.g., about 22 nm) node semiconductor devices. The process comprises applying a lithographic resist layer on a surface of a substrate and patterning and developing the lithographic resist layer to form a nm order node image having an initial line width. Overcoating the nm order node image with an acidic polymer produces an acidic polymer coated image. Heating the acidic polymer coated image gives a heat treated coating on the image, the heating being conducted at a temperature and for a time sufficient to reduce the initial linewidth to a subsequent narrowed linewidth. Developing the heated treated coating removes it from the image resulting in a free-standing trimmed lithographic feature on the substrate. Optionally repeating the foregoing steps further reduces the linewidth of the narrowed line. The invention also comprises a product produced by this process.
摘要:
Method of manufacturing a semiconductor device structure, including the steps of providing a structure having an insulator layer with at least one interconnect, forming a sub lithographic template mask over the insulator layer, and selectively etching the insulator layer through the sub lithographic template mask to form sub lithographic features spanning to a sidewall of the at least one interconnect.