Information Processing System, and Its Power-Saving Control Method and Device
    1.
    发明申请
    Information Processing System, and Its Power-Saving Control Method and Device 有权
    信息处理系统及其省电控制方法和装置

    公开(公告)号:US20130111492A1

    公开(公告)日:2013-05-02

    申请号:US13548536

    申请日:2012-07-13

    IPC分类号: G06F9/50

    摘要: Pieces of working information on workloads, positions of the workloads, pieces of environmental information on cooling facilities, and positions of the cooling facilities are stored as arrangement information. The pieces of working information on the workloads are estimated, and allocation of tentative workloads is deduced for fear the pieces of working information may exceed the performances of a group of information processing devices. Tentative power consumptions and arrangement information resulting from the allocation of the tentative workloads, and tentative power consumptions and arrangement information necessary for the allocation of the tentative workloads are calculated. Tentative cooling powers required to control the cooling facilities are calculated. Allocation of the tentative workloads minimizing the sum total of the tentative power consumptions of the information processing devices and the tentative cooling powers of the cooling facilities is searched. Based on the searched allocation, the workloads are allocated to the information processing devices.

    摘要翻译: 关于工作负载的工作信息,工作负载的位置,冷却设施的环境信息以及冷却设施的位置的部分被存储为布置信息。 对工作量的工作信息进行估计,推测工作量的分配是因为担心工作信息可能会超过一组信息处理设备的性能。 计算由暂定工作量的分配产生的暂时功耗和排列信息,以及暂时性工作负荷分配所需的暂时功耗和排列信息。 计算控制冷却设施所需的暂时冷却功率。 搜索最小化信息处理设备的暂时功耗和冷却设施的暂时冷却功率的总和的暂时工作负荷的分配。 基于搜索到的分配,工作量被分配给信息处理设备。

    Information processing system, and its power-saving control method and device
    2.
    发明授权
    Information processing system, and its power-saving control method and device 有权
    信息处理系统及其省电控制方法和装置

    公开(公告)号:US09507392B2

    公开(公告)日:2016-11-29

    申请号:US13548536

    申请日:2012-07-13

    摘要: Pieces of working information on workloads, positions of the workloads, pieces of environmental information on cooling facilities, and positions of the cooling facilities are stored as arrangement information. The pieces of working information on the workloads are estimated, and allocation of tentative workloads is deduced for fear the pieces of working information may exceed the performances of a group of information processing devices. Tentative power consumptions and arrangement information resulting from the allocation of the tentative workloads, and tentative power consumptions and arrangement information necessary for the allocation of the tentative workloads are calculated. Tentative cooling powers required to control the cooling facilities are calculated. Allocation of the tentative workloads minimizing the sum total of the tentative power consumptions of the information processing devices and the tentative cooling powers of the cooling facilities is searched. Based on the searched allocation, the workloads are allocated to the information processing devices.

    摘要翻译: 关于工作负载的工作信息,工作负载的位置,冷却设施的环境信息以及冷却设施的位置的部分被存储为布置信息。 对工作量的工作信息进行估计,推测工作量的分配是因为担心工作信息可能会超过一组信息处理设备的性能。 计算由暂定工作负荷的分配产生的暂时功耗和安排信息,以及暂时性工作负荷分配所需的暂时功耗和安排信息。 计算控制冷却设施所需的暂时冷却功率。 搜索最小化信息处理设备的暂时功耗和冷却设施的暂时冷却功率的总和的暂时工作负荷的分配。 基于搜索到的分配,工作量被分配给信息处理设备。

    SEMICONDUCTOR DEVICE
    7.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开
    半导体器件

    公开(公告)号:US20100078635A1

    公开(公告)日:2010-04-01

    申请号:US12465819

    申请日:2009-05-14

    IPC分类号: H01L23/58 H01L21/50

    摘要: As the transfer between a processor LSI and a memory has been increasing year by year, there is a demand for increasing the traffic amount and reducing the power required for communication. With this being the condition, a method of stacking LSIs thereby reducing the communication distance is being contemplated. However, the inventors have found that the reduction of cost in the stacking process and the increase in the degree of freedom of selecting the memory LSI to be stacked are required for a simple stacking of processor LSIs and memory LSIs as so far practiced. An external communication LSI including a circuit for performing the communication with the outside of the stacked LSI at a high rate of more than 1 GHz; a processor LSI including a general purpose CPU etc.; and a memory LSI including a DRAM etc. are stacked in this order and those LSIs are connected with one another with a through silicon via to enable a high speed and high volume communication at a shortest path. Further, an interposer for facilitating the connection with the processor LSI is connected to the input terminal of the memory LSI to be stacked thereby increasing the degree of freedom in selecting memories.

    摘要翻译: 随着处理器LSI和存储器之间的转移逐年增加,需要增加通信量并降低通信所需的功率。 由于这是条件,因此考虑了堆叠LSI从而减少通信距离的方法。 然而,本发明人已经发现,对于处理器LSI和存储器LSI的简单堆叠,需要堆叠处理中的成本的降低和要堆叠的存储器LSI的选择的自由度的增加。 一种外部通信LSI,包括用于以高于1GHz的高速率与堆叠的LSI的外部进行通信的电路; 包括通用CPU等的处理器LSI; 并且依次堆叠包括DRAM等的存储器LSI,并且这些LSI通过硅通孔彼此连接,以使得能够以最短路径进行高速和高容量的通信。 此外,用于促进与处理器LSI的连接的插入器连接到要堆叠的存储器LSI的输入端,从而增加选择存储器的自由度。

    SEMICONDUCTOR INTEGRATED CIRCUIT
    8.
    发明申请
    SEMICONDUCTOR INTEGRATED CIRCUIT 审中-公开
    半导体集成电路

    公开(公告)号:US20100005323A1

    公开(公告)日:2010-01-07

    申请号:US12300434

    申请日:2006-06-07

    IPC分类号: G06F1/26 G06F1/04

    摘要: A semiconductor integrated circuit with processors incorporated therein, which makes it possible to achieve a good balance between realizing low-power consumption control, and securing a processing performance that the practicability of real time processing is required.The semiconductor integrated circuit with processors incorporated therein is provided with a management unit, combining first control for changing a value of the voltage and a frequency of the clock signal based on control information contained in the program, and second control for changing the voltage value and clock signal frequency according to a progress status of a process by the processor, thereby to accelerate progress of the process by the processor. In a period during which the frequency and voltage of each processor are raised, the power consumption is increased, however it becomes possible to achieve high-speed processing. While in a period during which neither frequency nor voltage of each processor are raised, high-speed processing cannot be performed, however, the power consumption is small. Thus, it is possible to achieve a good balance between to materialize low-power consumption control in a semiconductor integrated circuit with processors incorporated therein, and to ensure a processing performance that the practicability of real time processing is required.

    摘要翻译: 其中结合有处理器的半导体集成电路,这使得可以在实现低功耗控制和确保需要实时处理的实用性的处理性能之间实现良好的平衡。 其中结合有处理器的半导体集成电路设置有管理单元,其基于包含在程序中的控制信息,组合用于改变电压值和时钟信号频率的第一控制,以及用于改变电压值的第二控制和 时钟信号频率根据处理器的处理进度状态,从而加速处理器进程的进行。 在每个处理器的频率和电压升高的时间段期间,功率消耗增加,但是可以实现高速处理。 虽然在每个处理器的频率和电压都不升高的时段中,但是不能执行高速处理,但是功耗很小。 因此,可以实现在其中包含有处理器的半导体集成电路中实现低功耗控制的良好平衡,并且确保需要实时处理的实用性的处理性能。