公开(公告)号：US20200075291A1

公开(公告)日：2020-03-05

申请号：US16548063

申请日：2019-08-22

Applicant: Tokyo Electron Limited

Inventor： Hiroshi Miki

IPC: H01J37/32 ,  H03H7/40

Abstract: An impedance matching method includes: calculating an output impedance of a theoretical circuit model set in advance from actual values of two variable components and a measured value of an input impedance; calculating values of the two variable components at the time of impedance matching through an arithmetic operation under a matching condition in the theoretical circuit model based on the calculated value of the output impedance assuming that the output impedance due to matching transition has the same value; and controlling the actual values of the variable components of the impedance matching device to correspond to the calculated two variable component values.

公开(公告)号：US10468237B2

公开(公告)日：2019-11-05

申请号：US16029847

申请日：2018-07-09

Applicant: Tokyo Electron Limited

Inventor： Atsushi Gomi ,  Tetsuya Miyashita ,  Shinji Furukawa ,  Koji Maeda ,  Masamichi Hara ,  Naoyuki Suzuki ,  Hiroshi Miki ,  Toshiharu Hirata

IPC: H01J37/32 ,  C23C14/56 ,  H01L21/67 ,  H01L21/677 ,  H01L43/12

Abstract: An apparatus includes a row of substrate transfer devices 3 which can deliver a wafer W within a transfer chamber; and rows of process modules PM, arranged at right and left sides of the row of the substrate transfer devices along the row, configured to perform processes to the wafer W. The rows of the process modules PM are arranged such that each of the processes can be performed by at least two process modules PM. Thus, when a single process module PM cannot be used, the wafer W can be rapidly transferred to another process module PM which can perform the same process as performed in the corresponding process module. Therefore, even when the single process module PM cannot be used, the processes can be continued to the wafers W without stopping an operation of the apparatus, so that the number of wasted wafers W can be reduced.

公开(公告)号：US20180315585A1

公开(公告)日：2018-11-01

申请号：US16029847

申请日：2018-07-09

Applicant: Tokyo Electron Limited

Inventor： Atsushi Gomi ,  Tetsuya Miyashita ,  Shinji Furukawa ,  Koji Maeda ,  Masamichi Hara ,  Naoyuki Suzuki ,  Hiroshi Miki ,  Toshiharu Hirata

IPC: H01J37/32 ,  H01L21/67

CPC classification number: H01J37/32733 ,  C23C14/566 ,  C23C14/568 ,  H01J37/32899 ,  H01L21/67161 ,  H01L21/67173 ,  H01L21/67184 ,  H01L21/6719 ,  H01L21/67196 ,  H01L21/67745 ,  H01L43/12

Abstract: An apparatus includes a row of substrate transfer devices 3 which can deliver a wafer W within a transfer chamber; and rows of process modules PM, arranged at right and left sides of the row of the substrate transfer devices along the row, configured to perform processes to the wafer W. The rows of the process modules PM are arranged such that each of the processes can be performed by at least two process modules PM. Thus, when a single process module PM cannot be used, the wafer W can be rapidly transferred to another process module PM which can perform the same process as performed in the corresponding process module. Therefore, even when the single process module PM cannot be used, the processes can be continued to the wafers W without stopping an operation of the apparatus, so that the number of wasted wafers W can be reduced.

公开(公告)号：US09567667B2

公开(公告)日：2017-02-14

申请号：US14490410

申请日：2014-09-18

Applicant: TOKYO ELECTRON LIMITED

Inventor： Shinji Furukawa ,  Naoki Watanabe ,  Hiroshi Miki ,  Tooru Kitada ,  Yasuhiko Kojima

IPC: C23C14/34 ,  H01J37/34 ,  C23C14/08

CPC classification number: C23C14/3464 ,  C23C14/08 ,  C23C14/3485 ,  H01J37/3417 ,  H01J37/3444 ,  H01J37/3464 ,  H01J37/347

Abstract: System and method of insulating film deposition. A sputter deposition chamber comprises a pair of targets made of the same insulating material. Each target is applied with a high frequency power signal concurrently. A phase adjusting unit is used to adjust the phase difference between the high frequency power signals supplied to the pair of targets to a predetermined value, thereby improving the in-plane thickness distribution of a resultant film. The predetermined value is target material specific.

Abstract translation: 绝缘膜沉积的系统和方法。 溅射沉积室包括由相同绝缘材料制成的一对靶。 每个目标同时施加高频功率信号。 相位调整单元用于将提供给该对目标的高频功率信号之间的相位差调整为规定值，从而提高所得到的膜的面内厚度分布。 预定值是目标材料特定的。

公开(公告)号：US10741362B2

公开(公告)日：2020-08-11

申请号：US16548063

申请日：2019-08-22

Applicant: Tokyo Electron Limited

Inventor： Hiroshi Miki

IPC: H01J37/32 ,  H03H7/40

Abstract: An impedance matching method includes: calculating an output impedance of a theoretical circuit model set in advance from actual values of two variable components and a measured value of an input impedance; calculating values of the two variable components at the time of impedance matching through an arithmetic operation under a matching condition in the theoretical circuit model based on the calculated value of the output impedance assuming that the output impedance due to matching transition has the same value; and controlling the actual values of the variable components of the impedance matching device to correspond to the calculated two variable component values.

公开(公告)号：US10049860B2

公开(公告)日：2018-08-14

申请号：US14412258

申请日：2013-04-30

Applicant: Tokyo Electron Limited

Inventor： Atsushi Gomi ,  Tetsuya Miyashita ,  Shinji Furukawa ,  Koji Maeda ,  Masamichi Hara ,  Naoyuki Suzuki ,  Hiroshi Miki ,  Toshiharu Hirata

IPC: B65G1/06 ,  H01J37/32 ,  H01L21/67

Abstract: An apparatus includes a row of substrate transfer devices 3 which can deliver a wafer W within a transfer chamber; and rows of process modules PM, arranged at right and left sides of the row of the substrate transfer devices along the row, configured to perform processes to the wafer W. The rows of the process modules PM are arranged such that each of the processes can be performed by at least two process modules PM. Thus, when a single process module PM cannot be used, the wafer W can be rapidly transferred to another process module PM which can perform the same process as performed in the corresponding process module. Therefore, even when the single process module PM cannot be used, the processes can be continued to the wafers W without stopping an operation of the apparatus, so that the number of wasted wafers W can be reduced.

公开(公告)号：US20150235815A1

公开(公告)日：2015-08-20

申请号：US14412258

申请日：2013-04-30

Applicant: Tokyo Electron Limited

Inventor： Atsushi Gomi ,  Tetsuya Miyashita ,  Shinji Furukawa ,  Koji Maeda ,  Masamichi Hara ,  Naoyuki Suzuki ,  Hiroshi Miki ,  Toshiharu Hirata

IPC: H01J37/32

CPC classification number: H01J37/32733 ,  C23C14/568 ,  H01L21/67161 ,  H01L21/67173 ,  H01L21/67184 ,  H01L21/6719 ,  H01L21/67196 ,  H01L21/67745 ,  H01L43/12

Abstract: An apparatus includes a row of substrate transfer devices 3 which can deliver a wafer W within a transfer chamber; and rows of process modules PM, arranged at right and left sides of the row of the substrate transfer devices along the row, configured to perform processes to the wafer W. The rows of the process modules PM are arranged such that each of the processes can be performed by at least two process modules PM. Thus, when a single process module PM cannot be used, the wafer W can be rapidly transferred to another process module PM which can perform the same process as performed in the corresponding process module. Therefore, even when the single process module PM cannot be used, the processes can be continued to the wafers W without stopping an operation of the apparatus, so that the number of wasted wafers W can be reduced.

Abstract translation: 一种装置包括一排衬底传送装置3，其可在传送室内传送晶片W; 以及沿着行布置在基板传送装置的行的左右两侧的处理模块PM的行，被配置为对晶片W执行处理。处理模块PM的行被布置成使得每个处理可以 由至少两个处理模块PM执行。 因此，当不能使用单个处理模块PM时，可以将晶片W快速转移到可以执行与在相应的处理模块中执行的相同处理的另一个处理模块PM。 因此，即使不能使用单个处理模块PM，也可以在不停止设备的操作的情况下继续进行晶片W的处理，从而可以减少浪费的晶片W的数量。