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1.发明授权Programmable semiconductor integrated circuitry including a programming semiconductor element 失效包括编程半导体元件的可编程半导体集成电路
公开(公告)号：US4455495A
公开(公告)日：1984-06-19
申请号：US192869
申请日：1980-10-01
申请人： Toshiaki Masuhara , Osamu Minato , Katsuhiro Shimohigashi , Hiroo Masuda , Hideo Sunami , Yoshio Sakai , Yoshiaki Kamigaki , Eiji Takeda , Yoshimune Hagiwara
发明人： Toshiaki Masuhara , Osamu Minato , Katsuhiro Shimohigashi , Hiroo Masuda , Hideo Sunami , Yoshio Sakai , Yoshiaki Kamigaki , Eiji Takeda , Yoshimune Hagiwara
IPC分类号： G11C8/10 , G11C17/16 , G11C17/18 , G11C29/00 , H01L21/263 , H01L21/268 , H01L21/768 , H01L23/525 , H01L27/10 , H01L27/04 , H01L29/04
CPC分类号： G11C29/785 , G11C17/16 , G11C17/18 , G11C8/10 , H01L21/2636 , H01L21/268 , H01L21/76894 , H01L23/5254 , H01L27/10 , H01L2924/0002
摘要： A programmable semiconductor integrated circuitry including a circuit programming element is disclosed. The circuit programming element can be activated in a short-circuit mode by the irradiation of a laser or electron beam or by ion implantation so that it is converted from its original nonconductive state into a conductive or conductable state, thereby providing electrical connection between circuits and/or circuit elements of the integrated circuitry for a desired circuit programming such as circuit creation, circuit conversion or circuit substitution.
摘要翻译： 公开了一种包括电路编程元件的可编程半导体集成电路。 电路编程元件可以通过激光或电子束的照射或通过离子注入在短路模式中被激活，使得其从其原始的非导通状态转换为导电或导电状态，由此提供电路之间的电连接 /或集成电路的电路元件，用于所需的电路编程，例如电路创建，电路转换或电路替换。
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公开(公告)号：US4656492A
公开(公告)日：1987-04-07
申请号：US786715
申请日：1985-10-15
CPC分类号： H01L29/7838 , H01L29/0847 , H01L29/1083 , H01L29/78 , H01L29/7836
摘要： An insulated gate field effect transistor is formed in one surface of a semiconductor substrate. The surface portion of a channel has an impurity distribution of the conduction type opposite to that of the substrate, which the deeper portion of the channel has an impurity distribution of the same conduction type as that of the substrate. Moreover, at least one of a source and a drain is formed of such an impurity layer of the conduction type opposite to that of the substrate as has its impurity distribution gently sloped by double diffusion processes.
摘要翻译： 绝缘栅场效应晶体管形成在半导体衬底的一个表面中。 通道的表面部分具有与衬底相反的导电类型的杂质分布，其中沟道的较深部分具有与衬底相同导电类型的杂质分布。 此外，源极和漏极中的至少一个由具有与衬底相反的导电类型的杂质层形成，其杂质分布通过双扩散过程缓缓倾斜。
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公开(公告)号：US5119332A
公开(公告)日：1992-06-02
申请号：US515345
申请日：1990-04-30
IPC分类号： G11C11/409 , G11C11/4091 , G11C11/4096 , G11C11/4097 , H01L23/522 , H01L27/108
CPC分类号： H01L27/108 , G11C11/409 , G11C11/4091 , G11C11/4096 , G11C11/4097 , H01L23/522 , H01L27/10805 , H01L2924/0002 , H01L2924/3011
摘要： A dynamic RAM integrated circuit of the one-element memory cell type is provided with a plurality of data lines, a sense amplifier, a plurality of word lines disposed in a manner to intersect with the data lines, and memory cells disposed at the points of intersection between the data lines and the word lines. The RAM includes a P-type semiconductor substrate and an N-type well region formed in the substrate. The memory cells are disposed within the well, and the sense amplifier, which is connected to the date lines, is constructed to a pair of N-channel MOSFETs formed in the semiconductor substrate and a pair of P-channel MOSFETs formed in the well region.
摘要翻译： 单元存储单元型的动态RAM集成电路设置有多条数据线，读出放大器，以与数据线相交的方式设置的多条字线，以及设置在数据线上的存储单元 数据线与字线之间的交点。 RAM包括P型半导体衬底和形成在衬底中的N型阱区。 存储单元设置在阱内，并且连接到日期线的读出放大器被构造成形成在半导体衬底中的一对N沟道MOSFET和形成在阱区中的一对P沟道MOSFET 。
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公开(公告)号：US4539658A
公开(公告)日：1985-09-03
申请号：US638982
申请日：1984-08-08
IPC分类号： G11C11/419 , G11C11/409 , G11C11/4091 , G11C11/4096 , G11C11/4097 , H01L21/822 , H01L21/8238 , H01L21/8242 , H01L23/522 , H01L27/04 , H01L27/092 , H01L27/10 , H01L27/108 , G11C11/40 , H01L29/78
CPC分类号： G11C11/409 , G11C11/4091 , G11C11/4096 , G11C11/4097 , H01L23/522 , H01L27/108 , H01L27/10805 , H01L2924/0002 , H01L2924/3011 , Y10S148/164
摘要： A dynamic RAM integrated circuit of the one-element memory cell type is provided with a plurality of data lines, a sense amplifier, a plurality of word lines disposed in a manner to intersect with the data lines, and memory cells disposed at the points of intersection between the data lines and the word lines. The RAM includes a P-type semiconductor substrate and an N-type well region formed in the substrate. The memory cells are disposed within the well, and the sense amplifier, which is connected to the data lines, is constructed of a pair of N-channel MOSFETs formed in the semiconductor substrate and a pair of P-channel MOSFETs formed in the well region.
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公开(公告)号：US5448520A
公开(公告)日：1995-09-05
申请号：US306612
申请日：1994-09-15
IPC分类号： G11C11/409 , G11C11/4091 , G11C11/4096 , G11C11/4097 , H01L23/522 , H01L27/108 , G11C13/00
CPC分类号： G11C11/409 , G11C11/4091 , G11C11/4096 , G11C11/4097 , H01L23/522 , H01L27/108 , H01L27/10805 , H01L2924/0002 , H01L2924/3011
摘要： A dynamic RAM integrated circuit of the one-element memory cell type is provided with a plurality of data lines, a sense amplifier, a plurality of word lines disposed in a manner to intersect with the data lines, and memory cells disposed at the points of intersection between the data lines and the word lines. The RAM includes a P-type semiconductor substrate and an N-type well region formed irk the substrate. The memory cells are disposed within the well, and the sense amplifier, which is connected to the date lines, is constructed of a pair of N-channel MOSFETs formed in the semiconductor substrate and a pair of P-channel MOSFETs formed in the well region.
摘要翻译： 单元存储单元型的动态RAM集成电路设置有多条数据线，读出放大器，以与数据线相交的方式设置的多条字线，以及设置在数据线上的存储单元 数据线与字线之间的交点。 RAM包括P型半导体衬底和与衬底形成的N型阱区。 存储单元设置在阱内，并且连接到日期线的读出放大器由形成在半导体衬底中的一对N沟道MOSFET和形成在阱区中的一对P沟道MOSFET构成 。
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公开(公告)号：US5689457A
公开(公告)日：1997-11-18
申请号：US611636
申请日：1996-03-06
IPC分类号： G11C7/10 , G11C11/409 , G11C11/4091 , G11C11/4096 , G11C11/4097 , H01L23/522 , H01L27/108 , G11C13/00
CPC分类号： G11C7/1048 , G11C11/409 , G11C11/4091 , G11C11/4096 , G11C11/4097 , H01L23/522 , H01L27/108 , H01L27/10805 , H01L2924/0002 , H01L2924/3011
摘要： A dynamic RAM integrated circuit of the one-element memory cell type is provided with a plurality of data lines, a sense amplifier, a plurality of word lines disposed in a manner to intersect with the data lines, and memory cells disposed at the points of intersection between the data lines and the word lines. The RAM includes a P-type semiconductor substrate and an N-type well region formed in the substrate. The memory cells are disposed within the well, and the sense amplifier, which is connected to the date lines, is constructed of a pair of N-channel MOSFETs formed in the semiconductor substrate and a pair of P-channel MOSFETs formed in the well region.
摘要翻译： 单元存储单元型的动态RAM集成电路设置有多条数据线，读出放大器，以与数据线相交的方式设置的多条字线，以及设置在数据线上的存储单元 数据线与字线之间的交点。 RAM包括P型半导体衬底和形成在衬底中的N型阱区。 存储单元设置在阱内，并且连接到日期线的读出放大器由形成在半导体衬底中的一对N沟道MOSFET和形成在阱区中的一对P沟道MOSFET构成 。
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公开(公告)号：US5170374A
公开(公告)日：1992-12-08
申请号：US864934
申请日：1992-04-07
IPC分类号： G11C11/409 , G11C11/4091 , G11C11/4096 , G11C11/4097 , H01L23/522 , H01L27/108
CPC分类号： H01L27/10805 , G11C11/409 , G11C11/4091 , G11C11/4096 , G11C11/4097 , H01L23/522 , H01L27/108 , H01L2924/0002 , H01L2924/3011
摘要： A dynamic RAM integrated circuit of the one-element memory cell type is provided with a plurality of data lines, a sense amplifier, a plurality of word lines disposed in a manner to intersect with the data lines, and memory cells disposed at the points of intersection between the data lines and the word lines. The RAM includes a P-type semiconductor substrate and an N-type well region formed in the substrate. The memory cells are disposed within the well, and the sense amplifier, which is connected to the date lines, is constructed of a pair of N-channel MOSFETs formed in the semiconductor substrate and a pair of P-channel MOSFETs formed in the well region.
摘要翻译： 单元存储单元型的动态RAM集成电路设置有多条数据线，读出放大器，以与数据线相交的方式设置的多条字线，以及设置在数据线上的存储单元 数据线与字线之间的交点。 RAM包括P型半导体衬底和形成在衬底中的N型阱区。 存储单元设置在阱内，并且连接到日期线的读出放大器由形成在半导体衬底中的一对N沟道MOSFET和形成在阱区中的一对P沟道MOSFET构成 。
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公开(公告)号：US4592022A
公开(公告)日：1986-05-27
申请号：US756707
申请日：1985-07-19
IPC分类号： G11C11/419 , G11C11/409 , G11C11/4091 , G11C11/4096 , G11C11/4097 , H01L21/822 , H01L21/8238 , H01L21/8242 , H01L23/522 , H01L27/04 , H01L27/092 , H01L27/10 , H01L27/108 , G11C11/40 , G11C13/00
CPC分类号： G11C11/409 , G11C11/4091 , G11C11/4096 , G11C11/4097 , H01L23/522 , H01L27/108 , H01L27/10805 , H01L2924/0002 , H01L2924/3011 , Y10S148/164
摘要： A dynamic RAM integrated circuit of the one-element memory cell type is provided with a plurality of data lines, a sense amplifier, a plurality of word lines disposed in a manner to intersect with the data lines, and memory cells disposed at the points of intersection between the data lines and the word lines. The RAM includes a P-type semiconductor substrate and an N-type well region formed in the substrate. The memory cells are disposed within the well, and the sense amplifier, which is connected to the data lines, is constructed of a pair of N-channel MOSFETs formed in the semiconductor substrate and a pair of P-channel MOSFETs formed in the well region.
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公开(公告)号：US5732037A
公开(公告)日：1998-03-24
申请号：US448138
申请日：1995-05-23
IPC分类号： G11C7/10 , G11C11/409 , G11C11/4091 , G11C11/4096 , G11C11/4097 , H01L23/522 , H01L27/108 , G11C13/00
CPC分类号： G11C7/1048 , G11C11/409 , G11C11/4091 , G11C11/4096 , G11C11/4097 , H01L23/522 , H01L27/108 , H01L27/10805 , H01L2924/0002 , H01L2924/3011
摘要： A dynamic RAM integrated circuit of the one-element memory cell type is provided with a plurality of data lines, a sense amplifier, a plurality of word lines disposed in a manner to intersect with the data lines, and memory cells disposed at the points of intersection between the data lines and the word lines. The RAM includes a P-type semiconductor substrate and an N-type well region formed in the substrate. The memory cells are disposed within the well, and the sense amplifier, which is connected to the date lines, is constructed of a pair of N-channel MOSFETs formed in the semiconductor substrate and a pair of P-channel MOSFETs formed in the well region.
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公开(公告)号：US5365478A
公开(公告)日：1994-11-15
申请号：US193896
申请日：1994-02-09
IPC分类号： G11C11/409 , G11C11/4091 , G11C11/4096 , G11C11/4097 , H01L23/522 , H01L27/108 , G11C13/00
CPC分类号： H01L23/522 , G11C11/409 , G11C11/4091 , G11C11/4096 , G11C11/4097 , H01L27/108 , H01L27/10805 , H01L2924/0002 , H01L2924/3011
摘要： A dynamic RAM integrated circuit of the one-element memory cell type is provided with a plurality of data lines, a sense amplifier, a plurality of word lines disposed in a manner to intersect with the data lines, and memory cells disposed at the points of intersection between the data lines and the word lines. The RAM includes a P-type semiconductor substrate and an N-type well region formed in the substrate. The memory cells are disposed within the well, and the sense amplifier, which is connected to the date lines, is constructed of a pair of N-channel MOSFETs formed in the semiconductor substrate and a pair of P-channel MOSFETs formed in the well region.
摘要翻译： 单元存储单元型的动态RAM集成电路设置有多条数据线，读出放大器，以与数据线相交的方式设置的多条字线，以及设置在数据线上的存储单元 数据线与字线之间的交点。 RAM包括P型半导体衬底和形成在衬底中的N型阱区。 存储单元设置在阱内，并且连接到日期线的读出放大器由形成在半导体衬底中的一对N沟道MOSFET和形成在阱区中的一对P沟道MOSFET构成 。
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