利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

123 条记录 (耗时 0.03 秒)

    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
    3.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME 审中-公开
    半导体器件及其制造方法

    公开(公告)号：US20130020584A1

    公开(公告)日：2013-01-24

    申请号：US13639199

    申请日：2010-04-22

    申请人： Toshiyuki Oishi ,  Hiroshi Otsuka ,  Koji Yamanaka ,  Akira Inoue

    发明人： Toshiyuki Oishi ,  Hiroshi Otsuka ,  Koji Yamanaka ,  Akira Inoue

    IPC分类号： H01L29/78

    CPC分类号： H01L29/7787 ,  H01L29/0657 ,  H01L29/1029 ,  H01L29/2003 ,  H01L29/42316

    摘要： In the present invention, provided is a semiconductor device, including: a GaN channel layer which is provided on a substrate and through which electrons run; a barrier layer which is provided on the GaN channel layer and which contains at least one of In, Al, and Ga and contains N; a gate electrode which is provided on the barrier layer; and a source electrode and a drain electrode which are provided on the substrate across the gate electrode, in which, in a portion of the barrier layer between the gate electrode and the drain electrode, a magnitude of polarization of the barrier layer is smaller on the gate electrode side than on the drain electrode side. Thus, PAE can be improved by reducing Rd and Cgd simultaneously.

    摘要翻译： 在本发明中，提供了一种半导体器件，包括：GaN沟道层，其设置在基板上，电子通过该沟道层运行; 阻挡层，其设置在所述GaN沟道层上并且包含In，Al和Ga中的至少一个并且包含N; 设置在所述阻挡层上的栅电极; 以及源极电极和漏电极，其设置在跨越栅电极的基板上，其中在栅电极和漏电极之间的阻挡层的一部分中，阻挡层的极化大小在 栅电极侧比漏极侧。 因此，通过同时减少Rd和Cgd可以改善PAE。

    SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
    4.
    发明申请
    SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 审中-公开
    半导体器件及制造半导体器件的方法

    公开(公告)号：US20130175544A1

    公开(公告)日：2013-07-11

    申请号：US13824357

    申请日：2010-11-10

    申请人： Toshiyuki Oishi ,  Hiroshi Otsuka ,  Koji Yamanaka ,  Kazuhisa Yamauchi ,  Masatake Hangai ,  Masatoshi Nakayama

    发明人： Toshiyuki Oishi ,  Hiroshi Otsuka ,  Koji Yamanaka ,  Kazuhisa Yamauchi ,  Masatake Hangai ,  Masatoshi Nakayama

    IPC分类号： H01L29/20 ,  H01L21/02

    CPC分类号： H01L29/2003 ,  H01L21/0254 ,  H01L29/0607 ,  H01L29/0657 ,  H01L29/205 ,  H01L29/7786

    摘要： It is an object to attain both high gain and a broad band (that is, to attain both reduction in a gate-drain capacitance and reduction in a source-drain capacitance). Provided is a semiconductor device, including: a GaN channel layer (3) through which electrons travel; a barrier layer (4) which is provided on the GaN channel layer in order to form two-dimensional electron gas in the GaN channel layer and which contains at least any one of In, Al, and Ga and contains N; a gate electrode (8), a source electrode (6), and a drain electrode (7); and a plate (20) formed of a material having polarization, which is provided between the gate electrode (8) and the drain electrode (7), the plate being held in contact with a part of the barrier layer (4).

    摘要翻译： 本发明的目的是获得高增益和宽带（即，获得栅极 - 漏极电容的减小和源极 - 漏极电容的减小）。 提供了一种半导体器件，包括：电子行进通过的GaN沟道层（3）; 阻挡层（4），其设置在所述GaN沟道层上，以在所述GaN沟道层中形成二维电子气，并且其包含In，Al和Ga中的至少任一个并且包含N; 栅电极（8），源电极（6）和漏电极（7）; 以及设置在所述栅极（8）和所述漏电极（7）之间的具有偏振材料的板（20），所述板与所述阻挡层（4）的一部分保持接触。