公开(公告)号：US20240282843A1

公开(公告)日：2024-08-22

申请号：US18653933

申请日：2024-05-02

申请人： UNITED MICROELECTRONICS CORP.

发明人： Chung-Fu Chang ,  Kuan-Hung Chen ,  Guang-Yu Lo ,  Chun-Chia Chen ,  Chun-Tsen Lu

IPC分类号： H01L29/66 ,  H01L21/02 ,  H01L21/28 ,  H01L29/51 ,  H01L29/78

CPC分类号： H01L29/66795 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/022 ,  H01L21/28202 ,  H01L29/511 ,  H01L29/7834 ,  H01L29/785

摘要： A method for fabricating semiconductor device includes the steps of: forming a fin-shaped structure on a substrate; forming a gate dielectric layer on the fin-shaped structure; forming a gate electrode on the fin-shaped structure; performing a nitridation process to implant ions into the gate dielectric layer adjacent to two sides of the gate electrode; and forming an epitaxial layer adjacent to two sides of the gate electrode.

公开(公告)号：US11145733B1

公开(公告)日：2021-10-12

申请号：US17033919

申请日：2020-09-27

申请人： UNITED MICROELECTRONICS CORP.

发明人： Chin-Hung Chen ,  Chih-Kai Hsu ,  Ssu-I Fu ,  Chia-Jung Hsu ,  Chun-Ya Chiu ,  Yu-Hsiang Lin ,  Po-Wen Su ,  Chung-Fu Chang ,  Guang-Yu Lo ,  Chun-Tsen Lu

IPC分类号： H01L29/423 ,  H01L29/40 ,  H01L21/308 ,  H01L29/51 ,  H01L29/66 ,  H01L21/311 ,  H01L21/28 ,  H01L29/78

摘要： The present invention discloses a method for forming a semiconductor device with a reduced silicon horn structure. After a pad nitride layer is removed from a substrate, a hard mask layer is conformally deposited over the substrate. The hard mask layer is then etched and trimmed to completely remove a portion of the hard mask layer from an active area and a portion of the hard mask layer from an oblique sidewall of a protruding portion of a trench isolation region around the active area. The active area is then etched to form a recessed region. A gate dielectric layer is formed in the recessed region and a gate electrode layer is formed on the gate dielectric layer.

公开(公告)号：US20190157455A1

公开(公告)日：2019-05-23

申请号：US15820443

申请日：2017-11-22

申请人： UNITED MICROELECTRONICS CORP.

发明人： Kuang-Hsiu Chen ,  Hsu Ting ,  Chung-Fu Chang ,  Shi-You Liu ,  Chun-Wei Yu ,  Yu-Ren Wang

IPC分类号： H01L29/78 ,  H01L29/66 ,  H01L21/02 ,  H01L21/265 ,  H01L21/266 ,  H01L21/324 ,  H01L29/08 ,  H01L29/165

CPC分类号： H01L21/3105 ,  H01L21/02532 ,  H01L21/26533 ,  H01L21/26586 ,  H01L21/266 ,  H01L21/324 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/66636 ,  H01L29/7848

摘要： A method for fabricating a semiconductor device. A gate is formed on a substrate. A spacer is formed on each sidewall of the gate. A hard mask layer is formed on the spacer. A recessed region is formed in the substrate and adjacent to the hard mask layer. An epitaxial layer is formed in the recessed region. The substrate is subjected to an ion implantation process to bombard particle defects on the hard mask layer with inert gas ions. An annealing process is performed to repair damages to the epitaxial layer caused by the ion implantation process. The hard mask layer is then removed.

公开(公告)号：US20160020323A1

公开(公告)日：2016-01-21

申请号：US14463676

申请日：2014-08-20

申请人： United Microelectronics Corp.

发明人： Yen-Liang Wu ,  Chung-Fu Chang ,  Yu-Hsiang Hung ,  Wen-Jiun Shen ,  Ssu-I Fu ,  Man-Ling Lu ,  Chia-Jong Liu ,  Yi-Wei Chen

IPC分类号： H01L29/78 ,  H01L29/66

CPC分类号： H01L29/7848 ,  H01L29/0673 ,  H01L29/1054 ,  H01L29/161 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/775 ,  H01L29/785 ,  H01L29/7854

摘要： A semiconductor device includes a fin structure, an insulating structure, a protruding structure, an epitaxial structure, and a gate structure. The fin structure and the insulating structure are disposed on the substrate. The protruding structure is in direct contact with the substrate and partially protrudes from the insulating structure, and the protruding structure is the fin structure. The epitaxial structure is disposed on a top surface of the fin structure and completely covers the top surface of the fin structure. In addition, the epitaxial structure has a curved top surface. The gate structure covers the fin structure and the epitaxial structure.

摘要翻译： 半导体器件包括鳍结构，绝缘结构，突出结构，外延结构和栅极结构。 翅片结构和绝缘结构设置在基板上。 突出结构与基板直接接触，并从绝缘结构部分突出，突出结构为翅片结构。 外延结构设置在翅片结构的顶表面上并完全覆盖翅片结构的顶表面。 此外，外延结构具有弯曲的顶表面。 栅极结构覆盖鳍结构和外延结构。

公开(公告)号：US20160020110A1

公开(公告)日：2016-01-21

申请号：US14462114

申请日：2014-08-18

申请人： United Microelectronics Corp.

发明人： Man-Ling Lu ,  Yu-Hsiang Hung ,  Chung-Fu Chang ,  Yen-Liang Wu ,  Wen-Jiun Shen ,  Chia-Jong Liu ,  Ssu-I Fu ,  Yi-Wei Chen

IPC分类号： H01L21/308 ,  H01L29/78

CPC分类号： H01L29/7848 ,  H01L21/3086 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66636 ,  H01L29/78

摘要： A method of forming a semiconductor device is provided. At least one stacked structure is provided on a substrate. A first spacer material layer, a second spacer material layer, and a third spacer material layer are sequentially formed on the substrate and cover the stacked structure. The first, second, and third spacer material layers are etched to form a tri-layer spacer structure on the sidewall of the stacked structure. The tri-layer spacer structure includes, from one side of the stacked structure, a first spacer, a second spacer, and a third spacer, and a dielectric constant of the second spacer is less than each of a dielectric constant of the first spacer and a dielectric constant of the third spacer.

摘要翻译： 提供一种形成半导体器件的方法。 在基板上设置至少一个层叠结构。 第一间隔物层，第二间隔物层和第三间隔物层依次形成在基板上并覆盖层叠结构。 第一，第二和第三间隔物材料层被蚀刻以在堆叠结构的侧壁上形成三层间隔结构。 三层间隔结构包括从层叠结构的一侧形成第一间隔物，第二间隔物和第三间隔物，第二间隔物的介电常数小于第一间隔物的介电常数和 第三间隔物的介电常数。

公开(公告)号：US20160005838A1

公开(公告)日：2016-01-07

申请号：US14855793

申请日：2015-09-16

申请人： United Microelectronics Corp.

发明人： Yu-Hsiang Hung ,  Ssu-I Fu ,  Chung-Fu Chang ,  Yen-Liang Wu ,  Cho-Han Fan ,  Chien-Ting Lin

IPC分类号： H01L29/66

CPC分类号： H01L29/66795 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823821 ,  H01L29/165 ,  H01L29/66636 ,  H01L29/7834 ,  H01L29/7848 ,  H01L29/785

摘要： A process for fabricating a fin-type field effect transistor (FinFET) structure is described. A semiconductor substrate is patterned to form a fin. A spacer is formed on the sidewall of the fin. A portion of the fin is removed, such that the spacer and the surface of the remaining fin together define a cavity. A piece of a semiconductor compound is formed from the cavity, wherein the upper portion of the piece of the semiconductor compound laterally extends over the spacer.

摘要翻译： 描述了制造鳍式场效应晶体管（FinFET）结构的工艺。 图案化半导体衬底以形成翅片。 隔板形成在翅片的侧壁上。 翅片的一部分被去除，使得间隔件和剩余的翅片的表面一起限定了空腔。 半导体化合物的一部分由空腔形成，其中半导体化合物片的上部横向延伸在间隔物上。

公开(公告)号：US20150380506A1

公开(公告)日：2015-12-31

申请号：US14844504

申请日：2015-09-03

申请人： UNITED MICROELECTRONICS CORP.

发明人： Jun-Jie Wang ,  Po-Chao Tsao ,  Chia-Jui Liang ,  Shih-Fang Tzou ,  Chien-Ting Lin ,  Cheng-Guo Chen ,  Ssu-I Fu ,  Yu-Hsiang Hung ,  Chung-Fu Chang

IPC分类号： H01L29/423 ,  H01L29/51 ,  H01L29/78

CPC分类号： H01L29/42364 ,  H01L29/4966 ,  H01L29/51 ,  H01L29/513 ,  H01L29/66545 ,  H01L29/66628 ,  H01L29/7851

摘要： A replacement gate process is disclosed. A substrate and a dummy gate structure formed on the substrate is provided, wherein the dummy gate structure comprises a dummy layer on the substrate, a hard mask layer on the dummy layer, spacers at two sides of the dummy layer and the hard mask layer, and a contact etch stop layer (CESL) covering the substrate, the spacers and the hard mask layer. The spacers and the CESL are made of the same material. Then, a top portion of the CESL is removed to expose the hard mask layer. Next, the hard mask layer is removed. Afterward, the dummy layer is removed to form a trench.

摘要翻译： 公开了替代浇口工艺。 提供了一种在基板上形成的基板和虚拟栅极结构，其中，虚设栅极结构包括基板上的虚设层，虚设层上的硬掩模层，虚设层两侧的间隔物和硬掩模层， 以及覆盖衬底，间隔物和硬掩模层的接触蚀刻停止层（CESL）。 垫片和CESL由相同的材料制成。 然后，去除CESL的顶部以露出硬掩模层。 接下来，去除硬掩模层。 之后，去除虚拟层以形成沟槽。

公开(公告)号：US09018066B2

公开(公告)日：2015-04-28

申请号：US14042224

申请日：2013-09-30

申请人： United Microelectronics Corp.

发明人： Yen-Liang Wu ,  Chung-Fu Chang ,  Yu-Hsiang Hung ,  Ssu-I Fu ,  Chien-Ting Lin ,  Shih-Fang Tzou

IPC分类号： H01L21/336 ,  H01L21/28 ,  H01L29/66 ,  H01L21/311

CPC分类号： H01L21/31111 ,  H01L21/3086 ,  H01L21/31116 ,  H01L29/165 ,  H01L29/517 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7834 ,  H01L29/7848

摘要： A method of fabricating a semiconductor device structure is provided. The method includes the following step. A gate dielectric layer is formed on a substrate. A gate electrode is on the gate dielectric layer. The gate dielectric layer exposed by the gate electrode is treated. A first etching process is performed to remove at least a portion of the gate dielectric layer exposed by the gate electrode. A spacer is formed on the sidewall of the gate electrode. A second etching process is performed to form recesses in the substrate beside the gate electrode. Besides, during the first etching process and the second etching process, an etching rate of the treated gate dielectric layer is greater than an etching rate of the untreated gate dielectric layer.

摘要翻译： 提供一种制造半导体器件结构的方法。 该方法包括以下步骤。 在基板上形成栅极电介质层。 栅极电极位于栅极电介质层上。 处理由栅电极露出的栅介电层。 执行第一蚀刻工艺以去除由栅电极暴露的栅介质层的至少一部分。 在栅电极的侧壁上形成间隔物。 执行第二蚀刻工艺以在栅电极旁边的基板中形成凹部。 此外，在第一蚀刻工艺和第二蚀刻工艺期间，经处理的栅极电介质层的蚀刻速率大于未处理的栅极介电层的蚀刻速率。

公开(公告)号：US08993384B2

公开(公告)日：2015-03-31

申请号：US13913511

申请日：2013-06-09

申请人： United Microelectronics Corp.

发明人： Yu-Hsiang Hung ,  Ssu-I Fu ,  Chung-Fu Chang ,  Cheng-Guo Chen ,  Chien-Ting Lin

IPC分类号： H01L21/00 ,  H01L29/78 ,  H01L29/66 ,  H01L21/8234

CPC分类号： H01L29/7851 ,  H01L21/8234 ,  H01L21/845 ,  H01L27/1211 ,  H01L29/0653 ,  H01L29/161 ,  H01L29/66795 ,  H01L29/6681 ,  H01L29/7848 ,  H01L29/7855

摘要： A semiconductor device includes a fin structure, an isolation structure, a gate structure and an epitaxial structure. The fin structure protrudes from the surface of the substrate and includes a top surface and two sidewalls. The isolation structure surrounds the fin structure. The gate structure overlays the top surface and the two sidewalls of a portion of the fin structure, and covers a portion of the isolation structure. The isolation structure under the gate structure has a first top surface and the isolation structure at two sides of the gate structure has a second top surface, wherein the first top surface is higher than the second top surface. The epitaxial layer is disposed at one side of the gate structure and is in direct contact with the fin structure.

摘要翻译： 半导体器件包括鳍结构，隔离结构，栅极结构和外延结构。 翅片结构从衬底的表面突出并且包括顶表面和两个侧壁。 隔离结构围绕翅片结构。 栅极结构覆盖鳍结构的一部分的顶表面和两个侧壁，并且覆盖隔离结构的一部分。 栅极结构下的隔离结构具有第一顶表面，并且栅极结构两侧的隔离结构具有第二顶表面，其中第一顶表面高于第二顶表面。 外延层设置在栅极结构的一侧并与鳍结构直接接触。

公开(公告)号：US08981487B2

公开(公告)日：2015-03-17

申请号：US13954991

申请日：2013-07-31

申请人： United Microelectronics Corp.

发明人： Yu-Hsiang Hung ,  Ssu-I Fu ,  Chien-Ting Lin ,  Po-Chao Tsao ,  Chung-Fu Chang ,  Cheng-Guo Chen

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L27/092 ,  H01L21/8238

CPC分类号： H01L27/1211 ,  H01L21/845

摘要： A method for fabricating fin-shaped field-effect transistor (FinFET) is disclosed. The method includes the steps of: providing a substrate; forming a fin-shaped structure in the substrate; forming a shallow trench isolation (STI) on the substrate and around the bottom portion of the fin-shaped structure; forming a first gate structure on the STI and the fin-shaped structure; and removing a portion of the STI for exposing the sidewalls of the STI underneath the first gate structure.

摘要翻译： 公开了一种用于制造鳍状场效应晶体管（FinFET）的方法。 该方法包括以下步骤：提供衬底; 在基板中形成翅片状结构; 在衬底上并在鳍状结构的底部周围形成浅沟槽隔离（STI）; 在STI和鳍状结构上形成第一栅极结构; 以及去除STI的一部分以暴露在第一栅极结构下方的STI的侧壁。