公开(公告)号：US20060189120A1

公开(公告)日：2006-08-24

申请号：US11065360

申请日：2005-02-24

Applicant: Viswanadam Gautham ,  Lan Tan

Inventor： Viswanadam Gautham ,  Lan Tan

IPC: H01L21/4763

CPC classification number: H01L23/49861 ,  H01L21/486 ,  H01L23/49827 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method of making a reinforced semiconductor package includes forming a semiconductor interconnect tablet (24). Formation of the tablet includes providing a plurality of conductive metal tabs (10), positioning a first end (12) of the tabs (10) in a first section of a mold chase (14), positioning a second section of the mold chase (16) over a second end (18) of the tabs (10), such that the tabs (10) are anchored between the first and second sections (14, 16) of the mold chase, loading the first and second sections (14, 16) of the mold chase into a molding system (20) and performing a molding operation such that a plastic mold compound (22) is formed around the metal tabs (10) and an interconnect tablet (24) is formed. Then the first and second sections (14, 16) of the mold chase are removed from the molding system (20) and the interconnect tablet (24) is removed from the first and second sections (14, 16) of the mold chase.

Abstract translation: 制造增强半导体封装的方法包括形成半导体互连片（24）。 片剂的形成包括提供多个导电金属片（10），将突片（10）的第一端（12）定位在模具追逐（14）的第一部分中，定位模具追逐的第二部分（ （10）的第二端（18）上，使得突片（10）锚定在模具追逐的第一和第二部分（14,16）之间，将第一和第二部分（14， 16）模制成模制系统（20），并执行模制操作，使得在金属薄片（10）周围形成塑料模具化合物（22），形成互连薄片（24）。 然后将模具追逐的第一和第二部分（14,16）从模制系统（20）中移除，并且互连片（24）从模具追逐的第一和第二部分（14,16）移除。

公开(公告)号：US08911636B2

公开(公告)日：2014-12-16

申请号：US14040698

申请日：2013-09-29

Applicant: Viswanadam Gautham

Inventor： Viswanadam Gautham

IPC: C23F1/00 ,  B44C1/22 ,  B81C1/00 ,  H01L21/00

CPC classification number: B81C1/00341 ,  B81B2201/051 ,  B81B2203/0315 ,  B81B2203/0338 ,  B81C1/00476 ,  B81C2201/0107 ,  B81C2203/036 ,  H01L21/00

Abstract: A method of fabricating a micro-device having micro-features on glass is presented. The method includes the steps of preparing a first glass substrate, fabricating a metallic pattern on the first glass substrate, preparing a second glass substrate and providing one or more apertures on the second glass substrate, heating the first glass substrate and the second glass substrate with a controlled temperature raise, bonding the first glass substrate and the second glass substrate by applying pressure to form a bonded substrate, wherein the metallic pattern is embedded within the bonded substrate, cooling the bonded substrate with a controlled temperature drop and thereafter maintaining the bonded substrate at a temperature suitable for etching, etching the metallic pattern within the bonded substrate, wherein an etchant has access to the metallic pattern via the apertures, forming a void within the bonded substrate, wherein the void comprises micro-features.

Abstract translation: 提出了一种在玻璃上制造具有微特征的微器件的方法。 该方法包括以下步骤：制备第一玻璃基板，在第一玻璃基板上制造金属图案，制备第二玻璃基板并在第二玻璃基板上提供一个或多个孔，加热第一玻璃基板和第二玻璃基板， 控制温度升高，通过施加压力来接合第一玻璃基板和第二玻璃基板以形成接合基板，其中金属图案嵌入在接合基板内，以受控的温度下降冷却接合基板，然后保持接合基板 在适于蚀刻的温度下蚀刻所述键合衬底内的所述金属图案，其中所述蚀刻剂经由所述孔进入所述金属图案，在所述键合衬底内形成空隙，其中所述空隙包括微特征。

公开(公告)号：US20070122940A1

公开(公告)日：2007-05-31

申请号：US11290300

申请日：2005-11-30

Applicant: Viswanadam Gautham

Inventor： Viswanadam Gautham

IPC: H01L21/00

CPC classification number: H01L21/486 ,  H01L21/561 ,  H01L23/49805 ,  H01L23/5389 ,  H01L24/97 ,  H01L25/105 ,  H01L2224/16245 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2224/81 ,  H01L2924/00

Abstract: A method for packaging a semiconductor device includes forming through holes (12) in a base substrate (10) and depositing a conductive material (14) on a first side (16) of the base substrate (10) to form a conductive layer (18) such that the conductive material (14) fills the through holes (12). The conductive layer (18) is patterned and etched to form interconnect traces and pads (22). Conductive supports (24) are formed on the pads (22) such that the conductive supports (24) extend through respective ones of the through holes (12).

Abstract translation: 一种用于封装半导体器件的方法包括在基底基板（10）中形成通孔（12）并在基底基板（10）的第一侧（16）上沉积导电材料（14）以形成导电层 ），使得导电材料（14）填充通孔（12）。 对导电层（18）进行构图和蚀刻以形成互连迹线和焊盘（22）。 导电支撑件（24）形成在焊盘（22）上，使得导电支撑件（24）延伸通过相应的通孔（12）。

公开(公告)号：US20070281393A1

公开(公告)日：2007-12-06

申请号：US11421006

申请日：2006-05-30

Applicant: Viswanadam Gautham ,  Lan Chu Tan ,  Heng Keong Yip

Inventor： Viswanadam Gautham ,  Lan Chu Tan ,  Heng Keong Yip

IPC: H01L21/60

CPC classification number: H01L21/561 ,  H01L21/4857 ,  H01L21/6835 ,  H01L23/3128 ,  H01L24/45 ,  H01L24/48 ,  H01L24/81 ,  H01L24/85 ,  H01L24/97 ,  H01L2221/68377 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/81191 ,  H01L2224/81801 ,  H01L2224/85 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A method of forming a semiconductor package (32) includes etching a conductive sheet (10) to form a first interconnection system (12). An integrated circuit (IC) die (22) is placed on and electrically connected to the first interconnection system (12). Next, a molding operation is performed to encapsulate the IC die (22), the electrical connections (24, 26) and at least a portion of the first interconnection system (12). A portion (20) of the conductive sheet (10) is then removed to expose a surface (30) of the first interconnection system (12). A second interconnection system (34) then is formed over the exposed surface (30) of the first interconnection system (12).

Abstract translation: 形成半导体封装（32）的方法包括蚀刻导电片（10）以形成第一互连系统（12）。 集成电路（IC）管芯（22）放置在电连接到第一互连系统（12）上。 接下来，执行模制操作以封装IC管芯（22），电连接（24,26）和第一互连系统（12）的至少一部分。 然后去除导电片（10）的一部分（20）以暴露第一互连系统（12）的表面（30）。 然后在第一互连系统（12）的暴露表面（30）上形成第二互连系统（34）。

公开(公告)号：US20140054261A1

公开(公告)日：2014-02-27

申请号：US14040698

申请日：2013-09-29

Applicant: Viswanadam Gautham

Inventor： Viswanadam Gautham

IPC: B81C1/00

CPC classification number: B81C1/00341 ,  B81B2201/051 ,  B81B2203/0315 ,  B81B2203/0338 ,  B81C1/00476 ,  B81C2201/0107 ,  B81C2203/036 ,  H01L21/00

Abstract: A method of fabricating a micro-device having micro-features on glass is presented. The method includes the steps of preparing a first glass substrate, fabricating a metallic pattern on the first glass substrate, preparing a second glass substrate and providing one or more apertures on the second glass substrate, heating the first glass substrate and the second glass substrate with a controlled temperature raise, bonding the first glass substrate and the second glass substrate by applying pressure to form a bonded substrate, wherein the metallic pattern is embedded within the bonded substrate, cooling the bonded substrate with a controlled temperature drop and thereafter maintaining the bonded substrate at a temperature suitable for etching, etching the metallic pattern within the bonded substrate, wherein an etchant has access to the metallic pattern via the apertures, forming a void within the bonded substrate, wherein the void comprises micro-features.

Abstract translation: 提出了一种在玻璃上制造具有微特征的微器件的方法。 该方法包括以下步骤：制备第一玻璃基板，在第一玻璃基板上制造金属图案，制备第二玻璃基板并在第二玻璃基板上提供一个或多个孔，加热第一玻璃基板和第二玻璃基板， 控制温度升高，通过施加压力来接合第一玻璃基板和第二玻璃基板以形成接合基板，其中金属图案嵌入在接合基板内，以受控的温度下降冷却接合基板，然后保持接合基板 在适于蚀刻的温度下蚀刻所述键合衬底内的所述金属图案，其中所述蚀刻剂经由所述孔进入所述金属图案，在所述键合衬底内形成空隙，其中所述空隙包括微特征。

公开(公告)号：US07344917B2

公开(公告)日：2008-03-18

申请号：US11290300

申请日：2005-11-30

Applicant: Viswanadam Gautham

Inventor： Viswanadam Gautham

IPC: H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC classification number: H01L21/486 ,  H01L21/561 ,  H01L23/49805 ,  H01L23/5389 ,  H01L24/97 ,  H01L25/105 ,  H01L2224/16245 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2224/81 ,  H01L2924/00

Abstract: A method for packaging a semiconductor device includes forming through holes (12) in a base substrate (10) and depositing a conductive material (14) on a first side (16) of the base substrate (10) to form a conductive layer (18) such that the conductive material (14) fills the through holes (12). The conductive layer (18) is patterned and etched to form interconnect traces and pads (22). Conductive supports (24) are formed on the pads (22) such that the conductive supports (24) extend through respective ones of the through holes (12).

Abstract translation: 一种用于封装半导体器件的方法包括在基底基板（10）中形成通孔（12）并在基底基板（10）的第一侧（16）上沉积导电材料（14）以形成导电层 ），使得导电材料（14）填充通孔（12）。 对导电层（18）进行构图和蚀刻以形成互连迹线和焊盘（22）。 导电支撑件（24）形成在焊盘（22）上，使得导电支撑件（24）延伸通过相应的通孔（12）。

公开(公告)号：US07160798B2

公开(公告)日：2007-01-09

申请号：US11065360

申请日：2005-02-24

Applicant: Viswanadam Gautham ,  Lan Chu Tan

Inventor： Viswanadam Gautham ,  Lan Chu Tan

IPC: H01L21/4763

CPC classification number: H01L23/49861 ,  H01L21/486 ,  H01L23/49827 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method of making a reinforced semiconductor package includes forming a semiconductor interconnect tablet (24). Formation of the tablet includes providing a plurality of conductive metal tabs (10), positioning a first end (12) of the tabs (10) in a first section of a mold chase (14), positioning a second section of the mold chase (16) over a second end (18) of the tabs (10), such that the tabs (10) are anchored between the first and second sections (14, 16) of the mold chase, loading the first and second sections (14, 16) of the mold chase into a molding system (20) and performing a molding operation such that a plastic mold compound (22) is formed around the metal tabs (10) and an interconnect tablet (24) is formed. Then the first and second sections (14, 16) of the mold chase are removed from the molding system (20) and the interconnect tablet (24) is removed from the first and second sections (14, 16) of the mold chase.

Abstract translation: 制造增强半导体封装的方法包括形成半导体互连片（24）。 片剂的形成包括提供多个导电金属片（10），将突片（10）的第一端（12）定位在模具追逐（14）的第一部分中，定位模具追逐的第二部分（ （10）的第二端（18）上，使得突片（10）锚定在模具追逐的第一和第二部分（14,16）之间，将第一和第二部分（14， 16）模制成模制系统（20），并执行模制操作，使得在金属薄片（10）周围形成塑料模具化合物（22），形成互连薄片（24）。 然后将模具追逐的第一和第二部分（14,16）从模制系统（20）中移除，并且互连片（24）从模具追逐的第一和第二部分（14,16）移除。