Reactor and Method for Anaerobic Wastewater Treatment
    1.
    发明申请
    Reactor and Method for Anaerobic Wastewater Treatment 失效
    厌氧污水处理的反应器和方法

    公开(公告)号:US20070251880A1

    公开(公告)日:2007-11-01

    申请号:US10577745

    申请日:2004-10-29

    IPC分类号: C02F3/28 C02F1/20 C02F3/12

    摘要: A reactor (10) for anaerobic waste water treatment is designed as a loop-type column reactor comprising a central flow channel (20). In the annular space (40) between the central flow channel (20) and the reactor wall, there are positioned carrier elements (50) for immobilizing microorganisms, with flow passages being provided between adjacent carrier elements (50). The lower portion of the reactor (30), below the carrier elements, is designed as a space intended to receive waste water having microorganisms floating therein during operation of the reactor (10). During operation, there are provided both floating microorganisms and microorganisms that are immobilized on the carrier elements. The waste water to be treated flows centrally downward and up again along the carrier elements (40), with the flow being generated in part by the gas development of the microorganisms. The reactor is used to carry out a process for anaerobic waste water treatment, the reactor being suited for waste water treatment in the food processing industry and the feeding stuff industry as well as in the paper industry and the textile industry.

    摘要翻译: 用于厌氧废水处理的反应器(10)被设计为包括中心流动通道(20)的环型塔式反应器。 在中央流动通道(20)和反应器壁之间的环形空间(40)中,定位用于固定微生物的载体元件(50),其中流动通道设置在相邻的载体元件(50)之间。 在载体元件下方的反应器(30)的下部被设计为在反应器(10)的操作期间接收具有浮在其中的微生物的废水的空间。 在操作期间,提供固定在载体元件上的漂浮微生物和微生物。 待处理的废水沿着载体元件(40)中央向上并向上流动,其中流动部分地由微生物的气体发展产生。 该反应器用于进行厌氧废水处理,反应器适用于食品加工业,饲料业以及造纸工业和纺织工业的废水处理。

    Reactor and method for anaerobic wastewater treatment
    2.
    发明授权
    Reactor and method for anaerobic wastewater treatment 失效
    反应器和厌氧废水处理方法

    公开(公告)号:US07485228B2

    公开(公告)日:2009-02-03

    申请号:US10577745

    申请日:2004-10-29

    IPC分类号: C02F3/28

    摘要: A reactor (10) for anaerobic waste water treatment is designed as a loop-type column reactor comprising a central flow channel (20). In the annular space (40) between the central flow channel (20) and the reactor wall, there are positioned carrier elements (50) for immobilizing microorganisms, with flow passages being provided between adjacent carrier elements (50). The lower portion of the reactor (30), below the carrier elements, is designed as a space intended to receive waste water having microorganisms floating therein during operation of the reactor (10). During operation, there are provided both floating microorganisms and microorganisms that are immobilized on the carrier elements. The waste water to be treated flows centrally downward and up again along the carrier elements (40), with the flow being generated in part by the gas development of the microorganisms. The reactor is used to carry out a process for anaerobic waste water treatment, the reactor being suited for waste water treatment in the food processing industry and the feeding stuff industry as well as in the paper industry and the textile industry.

    摘要翻译: 用于厌氧废水处理的反应器(10)被设计为包括中心流动通道(20)的环型塔式反应器。 在中央流动通道(20)和反应器壁之间的环形空间(40)中,定位用于固定微生物的载体元件(50),其中流动通道设置在相邻的载体元件(50)之间。 在载体元件下方的反应器(30)的下部被设计为在反应器(10)的操作期间接收具有浮在其中的微生物的废水的空间。 在操作期间,提供固定在载体元件上的漂浮微生物和微生物。 待处理的废水沿着载体元件(40)中央向上并向上流动,其中流动部分地由微生物的气体发展产生。 该反应器用于进行厌氧废水处理,反应器适用于食品加工业,饲料业以及造纸工业和纺织工业的废水处理。

    Method and device for treating biogenic residues
    3.
    发明授权
    Method and device for treating biogenic residues 有权
    用于处理生物残留物的方法和装置

    公开(公告)号:US06365047B1

    公开(公告)日:2002-04-02

    申请号:US09445236

    申请日:2000-01-24

    IPC分类号: C02F300

    摘要: The invention relates to a method for treating biogenic residues, especially cafeteria leftovers, meat refuse, clarification sludge, organic industrial wastes and the like, wherein the residues are subjected to temperature pressure hydrolysis. In order to obtain a higher flow rate for residues using a small apparatus, the invention provides that temperature pressure hydrolysis is carried out in a cylindrical section in a first direction and in an external radial section in a second direction, the second direction being opposite to the first direction.

    摘要翻译: 本发明涉及一种用于处理生物残留物的方法,特别是食堂剩菜,肉类垃圾,澄清污泥,有机工业废物等,其中残留物进行温度压力水解。 为了使用小型装置获得较高的残留物流量,本发明提供了在第一方向的圆柱形部分和在第二方向上的外部径向部分中进行温度压力水解,第二方向与 第一个方向。

    Apparatus and method for increasing the selectivity of FET-based gas sensors
    4.
    发明授权
    Apparatus and method for increasing the selectivity of FET-based gas sensors 有权
    提高基于FET的气体传感器选择性的装置和方法

    公开(公告)号:US07992426B2

    公开(公告)日:2011-08-09

    申请号:US11587171

    申请日:2005-04-21

    IPC分类号: G01N33/00 G01N27/414

    CPC分类号: G01N33/0014 G01N27/4143

    摘要: A FET gas sensor having a relatively low operating temperature, for example, room temperature, is free from cross sensitivities from interfering gases by a preceding in-line filter. The sensor's service life is substantially stabilizable by using fabric-like activated charcoal filters which can be regenerated by a moderate temperature increase, and by limiting the diffusion of the analyte gas, which is made possible by the relatively small amount of gas detectable on the sensitive layer of the sensor. This substantially increases the service life of the filters. The gas sensor eliminates cross sensitivities to thereby increase the detection reliability thereof. Also, the gas sensor has relative long term stability and is economical to build. The gas sensor can read relatively weak signals generated by gas-sensitive layers, for example, without other stronger gas signals interfering with the weak signals.

    摘要翻译: 具有较低工作温度(例如室温)的FET气体传感器不受前面的在线过滤器的干扰气体的交叉敏感性。 传感器的使用寿命通过使用织物样的活性炭过滤器可以基本上稳定,该过滤器可以通过适度的温度升高再生,并且通过限制分析物气体的扩散,这是通过敏感的可检测的相对少量的气体 传感器层。 这大大增加了过滤器的使用寿命。 气体传感器消除了交叉敏感度,从而提高了其检测可靠性。 此外,气体传感器具有相对的长期稳定性并且构建经济。 气体传感器可以读取由气体敏感层产生的相对较弱的信号,例如,没有其他较强气体信号干扰弱信号。

    Gas sensitive field-effect-transistor
    5.
    发明授权
    Gas sensitive field-effect-transistor 有权
    气体敏感场效应晶体管

    公开(公告)号:US07772617B2

    公开(公告)日:2010-08-10

    申请号:US11393371

    申请日:2006-03-30

    IPC分类号: G01N27/414

    CPC分类号: G01N27/4143

    摘要: A gas sensitive field effect transistor comprises a semiconductor substrate that includes a capacitance well, and source and drain regions of a field effect transistor. A gate of the field effect transistor is separated from the semiconductor substrate by an insulator, and a gas sensitive layer separated from the gate by an air gap. The field effect transistor provides an output signal indicative of the presence of a target gas within the air gap to an amplifier, which provides an amplified output signal that is electrically coupled to the capacitance well.

    摘要翻译: 气体敏感场效应晶体管包括包括电容阱的半导体衬底以及场效应晶体管的源极和漏极区。 场效应晶体管的栅极通过绝缘体与半导体衬底分离,气敏层由气隙与栅极分离。 场效应晶体管提供指示空气间隙内存在目标气体到放大器的输出信号,放大器提供与电容阱电耦合的放大输出信号。

    Integrated semiconductor circuit and method for testing the same
    6.
    发明授权
    Integrated semiconductor circuit and method for testing the same 有权
    集成半导体电路及其测试方法

    公开(公告)号:US07224627B2

    公开(公告)日:2007-05-29

    申请号:US11100617

    申请日:2005-04-07

    IPC分类号: G11C7/00

    CPC分类号: G11C29/12005 G11C29/12

    摘要: Integrated semiconductor circuits, in particular, dynamic random access memories include a multiplicity of generator circuits for generating internal voltage levels from an externally applied supply voltage. During testing, the internal voltage levels are altered by the output voltage generated at the output of the generator circuit being adapted to an externally applied test voltage. If the test voltage is outside a tolerance range, the semiconductor circuit maybe destroyed. A protection circuit connected in parallel with the generator circuit limits the output voltage.

    摘要翻译: 集成半导体电路,特别是动态随机存取存储器包括用于从外部施加的电源电压产生内部电压电平的多个发生器电路。 在测试期间,内部电压电平由发生器电路输出端产生的输出电压改变为外部施加的测试电压。 如果测试电压超出公差范围,则半导体电路可能被破坏。 与发生器电路并联连接的保护电路限制输出电压。

    Integrated semiconductor memory with test circuit
    7.
    发明申请
    Integrated semiconductor memory with test circuit 有权
    具有测试电路的集成半导体存储器

    公开(公告)号:US20060120176A1

    公开(公告)日:2006-06-08

    申请号:US11235540

    申请日:2005-09-27

    IPC分类号: G11C7/06

    摘要: An integrated semiconductor memory includes word lines connected to a first voltage potential via a respective first controllable switch and a respective third controllable switch and to a second voltage potential via a respective second controllable switch. In order to test whether one of the word lines is connected to the first voltage potential via its respective first and third controllable switches, the one of the word lines is connected to a comparator circuit via the respective second controllable switch and a driver line. After the respective first and third controllable switches have been controlled into the on state, in a test operating state of the integrated semiconductor memory, the respective second controllable switch is controlled into the on state and a potential state on the word line is evaluated by the comparator circuit. The result of the evaluation is fed to an external data terminal by an evaluation signal.

    摘要翻译: 集成半导体存储器包括通过相应的第一可控开关和相应的第三可控开关连接到第一电压电位的字线,以及经由相应的第二可控开关连接到第二电压电位的字线。 为了测试字线之一是否经由其相应的第一和第三可控开关连接到第一电压电位,所述字线之一经由相应的第二可控开关和驱动器线连接到比较器电路。 在相应的第一和第三可控开关已经被控制为导通状态之后,在集成半导体存储器的测试操作状态下,将相应的第二可控开关控制在导通状态,并且字线上的电位状态由 比较器电路。 评估结果通过评估信号馈送到外部数据终端。

    Integrated circuit
    8.
    发明申请
    Integrated circuit 有权
    集成电路

    公开(公告)号:US20050218960A1

    公开(公告)日:2005-10-06

    申请号:US11092963

    申请日:2005-03-30

    摘要: An integrated circuit includes a circuit component, a first control circuit and a switchable resistance network. An input voltage is fed to the circuit component on the input side. A control signal generated by the first control circuit is fed to the control terminal of the circuit component. With the switchable resistance network, the first resistance or the second resistance is connected between an output terminal of the circuit component and the output terminal of the integrated circuit to generate a voltage drop between the input side and the output terminal of the circuit component. The integrated circuit makes it possible to generate a current at the output terminal of the circuit component in a manner dependent on the control signal and the voltage dropped between the input side and the output terminal of the circuit component. Families of characteristic curves of transistors of an integrated circuit are determined by the integrated circuit.

    摘要翻译: 集成电路包括电路部件,第一控制电路和可切换电阻网络。 输入电压被馈送到输入侧的电路部件。 由第一控制电路产生的控制信号被馈送到电路部件的控制端。 利用可切换电阻网络,第一电阻或第二电阻连接在电路部件的输出端和集成电路的输出端之间,以在电路部件的输入侧和输出端之间产生电压降。 集成电路使得可以以取决于控制信号的方式在电路部件的输出端产生电流以及在电路部件的输入侧和输出端子之间落下的电压。 集成电路的晶体管的特性曲线族由集成电路确定。

    Field effect semiconductor switch and method for fabricating it
    9.
    发明申请
    Field effect semiconductor switch and method for fabricating it 有权
    场效应半导体开关及其制造方法

    公开(公告)号:US20050205946A1

    公开(公告)日:2005-09-22

    申请号:US11079884

    申请日:2005-03-15

    摘要: A field effect semiconductor comprises a semiconductor layer having a surface, a first and a second semiconductor region in the semiconductor layer, which are arranged next to one another at the surface of the semiconductor layer, an insulating layer between the first semiconductor region and the second semiconductor region, a semiconductor strip on the surface of the semiconductor layer, which semiconductor strip overlaps the first semiconductor region and the second semiconductor region and adjoins these. A gate overlaps the semiconductor strip at least in the region of the insulating layer. A gate dielectric insulates the gate from the semiconductor strip the first semiconductor region and the second semiconductor region. The semiconductor strip and the gate being formed such that the semiconductor strip is electrically insulating at a first predetermined gate voltage and is electrically conductive at a second predetermined gate voltagero.

    摘要翻译: 场效应半导体包括在半导体层的表面上彼此相邻布置的半导体层中具有表面的第一和第二半导体区域的半导体层,在第一半导体区域和第二半导体区域之间的绝缘层 半导体区域,半导体层的表面上的半导体条,该半导体条与第一半导体区域和第二半导体区域重叠,并与其邻接。 至少在绝缘层的区域中,栅极与半导体条重叠。 栅介质将栅极与半导体条绝缘在第一半导体区和第二半导体区之间。 半导体条和栅极形成为使得半导体条以第一预定栅极电压电绝缘并且在第二预定栅极电压下导电。

    Voltage generator arrangement
    10.
    发明授权
    Voltage generator arrangement 失效
    电压发生器装置

    公开(公告)号:US06927557B2

    公开(公告)日:2005-08-09

    申请号:US10736507

    申请日:2003-12-17

    IPC分类号: G05F1/46 G05F3/04

    CPC分类号: G05F1/465

    摘要: A voltage generator arrangement supplies a largely constant output voltage with a high current driver capability. A bandgap reference circuit drives a voltage generator on the output side, if necessary via an impedance converter. The bandgap reference circuit and the impedance converter on the one hand, and the voltage generator on the other hand, are connected to different reference ground potential lines. The voltage generator on the output side is preceded by a correction circuit, which corrects for the voltage drop on that reference ground potential line to which the output-side voltage generator is connected. The voltage generator arrangement is suitable for a greater integration density.

    摘要翻译: 电压发生器装置提供具有高电流驱动能力的大部分恒定的输出电压。 如果需要,带隙参考电路驱动输出侧的电压发生器,通过阻抗转换器。 一方面,带隙参考电路和阻抗转换器以及另一方面的电压发生器连接到不同的参考地电位线。 输出侧的电压发生器前面有一个校正电路,用于校正输出侧电压发生器连接到的参考地电位线上的电压降。 电压发生器装置适合于更大的集成密度。