公开(公告)号：US07283343B2

公开(公告)日：2007-10-16

申请号：US11015315

申请日：2004-12-15

申请人： William E. Grose ,  Timothy J. Legat ,  Sanmukh M. Patel

发明人： William E. Grose ,  Timothy J. Legat ,  Sanmukh M. Patel

IPC分类号： H02H3/18

CPC分类号： H02H11/002

摘要： A reverse battery protection circuits that provides an integrated reverse battery condition solution for protection of external NMOS switches during the reverse battery condition is disclosed herein. This reverse battery protection circuit minimizes power consumption during a reverse battery event wherein there is no need for mechanical adjustments such as heat sinking and clamping to extract the heat away from the silicon and not destroy the device. Specifically, the reverse battery protection circuit includes a push-pull gate drive circuit coupled between the first and second power supply rail. A protection subcircuit portion connects between a first output node and the second power supply rail to turn the external FET ‘on’ during the reverse battery condition. In particular, the protection subcircuit portion connects to the external FET device and includes a p-channel device connected between a second output node that biases the external FET device and a first diode. A resistor connects between a first output node of the reverse battery protection circuit to provide a voltage drop between the drain terminal and the gate of the p-channel device. A second diode connects between the gate and the source of the p-channel device. In addition, a clamping circuit connects between the second output node and the third output node to provide clamping in the instance where the voltage at the second output node momentarily rises too high.

摘要翻译： 本文公开了一种反向电池保护电路，其在反向电池状态期间提供用于保护外部NMOS开关的集成反向电池状态解决方案。 这种反向电池保护电路在反向电池事件期间最小化功率消耗，其中不需要机械调节，例如散热和夹紧，以将热量从硅提取出来，而不会破坏设备。 具体地，反向电池保护电路包括耦合在第一和第二电源轨之间的推挽栅极驱动电路。 保护子电路部分连接在第一输出节点和第二电源轨道之间，以在反向电池状态期间使外部FET“接通”。 特别地，保护子电路部分连接到外部FET器件，并且包括连接在偏置外部FET器件的第二输出节点和第一二极管之间的p沟道器件。 电阻器连接在反向电池保护电路的第一输出节点之间，以在漏极端子和p沟道器件的栅极之间提供电压降。 第二个二极管连接在p沟道器件的栅极和源极之间。 此外，钳位电路连接在第二输出节点和第三输出节点之间，以在第二输出节点处的电压瞬间上升得过高的情况下提供钳位。

公开(公告)号：US20120051492A1

公开(公告)日：2012-03-01

申请号：US12862483

申请日：2010-08-24

申请人： William E. Grose ,  Teuta K. Williams ,  Philomena C. Brady ,  Bala Krishnan D. Achie ,  Vikram J. Mani

发明人： William E. Grose ,  Teuta K. Williams ,  Philomena C. Brady ,  Bala Krishnan D. Achie ,  Vikram J. Mani

IPC分类号： G04F10/04

CPC分类号： G01P3/481

摘要： Anti-lock and intelligent braking systems have become ubiquitous in modern vehicles, which employ wheel speed sensors or WSSs. These WSSs generally uses current-domain signals (transmitted through power wires) to reduce the size of the vehicle's wiring harness, but because a vehicle is an inherently noisy environment, mixed signal circuit or MSC (used to decode these signals for a microcontroller) should be able to filter out or compensate for noise. However, traditional MSCs have been plagued with problems, partly due to errors in time base measurement due to noise (as well as other factors). Here, an MSC is provided that accurately calculates a wheel speed pulse width (which is used for time base measurements) by observing the wheel speed pulse as it passes through several thresholds.

摘要翻译： 现代车辆采用车轮速度传感器或WSS，防抱死和智能制动系统已经普遍存在。 这些WSS通常使用电流域信号（通过电力线传输）来减小车辆线束的尺寸，但是由于车辆是固有的噪声环境，所以混合信号电路或MSC（用于为微控制器解码这些信号）应该 能够滤除或补偿噪声。 然而，传统的MSC已经遇到问题，部分原因是由于噪声（以及其他因素）导致的时基测量误差。 这里，通过在通过多个阈值时观察车轮速度脉冲来提供MSC，其准确地计算车轮速度脉冲宽度（用于时基测量）。

公开(公告)号：US07034512B2

公开(公告)日：2006-04-25

申请号：US10680999

申请日：2003-10-08

申请人： Jingwei Xu ,  Zbigniew J. Lata ,  William E. Grose

发明人： Jingwei Xu ,  Zbigniew J. Lata ,  William E. Grose

IPC分类号： G05F1/40

CPC分类号： H02M3/156

摘要： System for providing a switched regulator with an adjustable operating frequency range. A preferred embodiment comprises a voltage supply and a load, a switch and filter block (SFB) (such as the SFB 510), a comparator (such as the comparator 520), and a fixed off time logic (FOTL) (such as the FOTL 525). The comparator compares an output voltage with a reference voltage. When the output voltage is equal to or exceeds the reference voltage, the comparator asserts a value on a signal line to the FOTL. The FOTL then shuts down the SFB for a specified period of time. During the off time, the output voltage decays. After the specified period of time expires, the SFB is turned back on and the output voltage can recharge. The duration of time that the SFB remains on is a function of the supply voltage, thus permitting an adjustable operating frequency.

摘要翻译： 用于提供具有可调工作频率范围的开关稳压器的系统。 优选实施例包括电压源和负载，开关和滤波器块（SFB）（例如SFB510），比较器（例如比较器520）和固定关断时间逻辑（FOTL）（诸如 FOTL 525）。 比较器将输出电压与参考电压进行比较。 当输出电压等于或超过参考电压时，比较器将在FOTL信号线上产生一个值。 FOTL然后关闭SFB一段指定的时间。 在关机时间内，输出电压衰减。 指定的时间段到期后，SFB再次接通，输出电压可以充值。 SFB保持导通的持续时间是电源电压的函数，从而允许可调节的工作频率。

公开(公告)号：US07315971B2

公开(公告)日：2008-01-01

申请号：US11243898

申请日：2005-10-04

申请人： William E. Grose ,  Lonnie L. Lambert ,  Jeanne Krayer Pitz ,  Toru Tanaka

发明人： William E. Grose ,  Lonnie L. Lambert ,  Jeanne Krayer Pitz ,  Toru Tanaka

IPC分类号： G11C29/00

CPC分类号： G11C29/12 ,  G11C16/04 ,  G11C29/48 ,  G11C2029/3202

摘要： A method and system for testing a device that includes both a digital and analog portion. The digital portion includes a plurality of latch devices, and the analog portion includes a plurality of memory cells and a plurality of selector devices. A selector input controls each of the plurality of selector devices, which is electrically coupled to a respective one of the memory cells, and is indirectly coupled to one of the plurality of latch devices. A load clock loads a pattern into the plurality of latch devices. A derivative of the pattern is received by the plurality of selectors and returned to the plurality of latch devices with the assertion of the selector input. A system clock loads the derivative of the pattern into the plurality of latch devices.

摘要翻译： 一种用于测试包括数字和模拟部分的设备的方法和系统。 数字部分包括多个锁存装置，并且模拟部分包括多个存储单元和多个选择装置。 选择器输入控制多个选择器装置中的每一个，其被电耦合到相应的一个存储器单元，并且间接地耦合到多个锁存装置中的一个。 负载时钟将模式加载到多个锁存器件中。 模式的导数由多个选择器接收，并且通过选择器输入的断言返回到多个锁存装置。 系统时钟将模式的导数加载到多个锁存器件中。

公开(公告)号：US06952120B2

公开(公告)日：2005-10-04

申请号：US10777991

申请日：2004-02-12

申请人： MD Abidur Rahman ,  William E. Grose ,  Brett E. Smith

发明人： MD Abidur Rahman ,  William E. Grose ,  Brett E. Smith

IPC分类号： H03B1/00 ,  H03K17/0412

CPC分类号： H03K17/04123

摘要： The present invention provides a system (200) for controlling drive signal timing parameters of an output driver circuit (206). The present invention defines a driver circuit having an output interface (204), and a first transistor (222) coupled to a first voltage supply (230), a first control signal (232), and a first node (220). The circuit also has a first resistive element, coupled between the first node and a second node (234). A second resistive element (228) is coupled to ground. A second transistor (224) is coupled to the second node, to a second control signal (236), and the second resistive element. The circuit has a third transistor (244), coupled to the first and second nodes, and to a third node (240). A third resistive element (242) is coupled between the third node and the output interface. A fourth transistor (238) is coupled to the first and third nodes, and to the output interface. The circuit also has a fifth transistor (216), coupled to a second voltage supply (218), to the first node, and to the output interface.

摘要翻译： 本发明提供一种用于控制输出驱动电路（206）的驱动信号定时参数的系统（200）。 本发明定义了具有输出接口（204）和耦合到第一电压源（230），第一控制信号（232）和第一节点（220）的第一晶体管（222）的驱动器电路。 电路还具有耦合在第一节点和第二节点（234）之间的第一电阻元件。 第二电阻元件（228）耦合到地。 第二晶体管（224）耦合到第二节点，耦合到第二控制信号（236）和第二电阻元件。 电路具有耦合到第一和第二节点以及耦合到第三节点（240）的第三晶体管（244）。 第三电阻元件（242）耦合在第三节点和输出接口之间。 第四晶体管（238）耦合到第一和第三节点以及输出接口。 电路还具有耦合到第二电压源（218）的第五晶体管（216）到第一节点和输出接口。

公开(公告)号：US08390273B2

公开(公告)日：2013-03-05

申请号：US12862483

申请日：2010-08-24

申请人： William E. Grose ,  Teuta K. Williams ,  Philomena C. Brady ,  Bala Krishnan D. Achie ,  Vikram J. Mani

发明人： William E. Grose ,  Teuta K. Williams ,  Philomena C. Brady ,  Bala Krishnan D. Achie ,  Vikram J. Mani

IPC分类号： G01B7/14 ,  G01R33/025

CPC分类号： G01P3/481

摘要： Anti-lock and intelligent braking systems have become ubiquitous in modern vehicles, which employ wheel speed sensors or WSSs. These WSSs generally uses current-domain signals (transmitted through power wires) to reduce the size of the vehicle's wiring harness, but because a vehicle is an inherently noisy environment, mixed signal circuit or MSC (used to decode these signals for a microcontroller) should be able to filter out or compensate for noise. However, traditional MSCs have been plagued with problems, partly due to errors in time base measurement due to noise (as well as other factors). Here, an MSC is provided that accurately calculates a wheel speed pulse width (which is used for time base measurements) by observing the wheel speed pulse as it passes through several thresholds.

摘要翻译： 现代车辆采用车轮速度传感器或WSS，防抱死和智能制动系统已经普遍存在。 这些WSS通常使用电流域信号（通过电力线传输）来减小车辆线束的尺寸，但是由于车辆是固有的噪声环境，所以混合信号电路或MSC（用于为微控制器解码这些信号）应该 能够滤除或补偿噪声。 然而，传统的MSC已经遇到问题，部分原因是由于噪声（以及其他因素）导致的时基测量误差。 这里，通过在通过多个阈值时观察车轮速度脉冲来提供MSC，其准确地计算车轮速度脉冲宽度（用于时基测量）。

公开(公告)号：US06815757B2

公开(公告)日：2004-11-09

申请号：US10349066

申请日：2003-01-22

申请人： Reed W. Adams ,  William E. Grose ,  Sameer Pendharkar ,  Roland Bucksch

发明人： Reed W. Adams ,  William E. Grose ,  Sameer Pendharkar ,  Roland Bucksch

IPC分类号： H01L29788

CPC分类号： H01L29/66825 ,  H01L27/115 ,  H01L29/0692 ,  H01L29/7883

摘要： Disclosed are devices and associated methods for manufacturing an EEPROM memory cell (10) for use on a negatively biased substrate (12). The invention may be practiced using standard semiconductor processing techniques. Devices and methods are disclosed for a floating gate transistor for use as an EEPROM cell (10) including a DNwell (14) formed on a P-type substrate (12) for isolating the EEPROM cell (10) from the underlying P-type substrate (12).

摘要翻译： 公开了用于制造用于负偏压衬底（12）的EEPROM存储器单元（10）的器件和相关方法。 本发明可以使用标准半导体处理技术来实施。 公开了用作浮动栅晶体管的器件和方法，用作EEPROM单元（10），其包括形成在P型衬底（12）上的DNwell（14），用于将EEPROM单元（10）与下面的P型衬底 （12）。

公开(公告)号：US06268755B1

公开(公告)日：2001-07-31

申请号：US08963836

申请日：1997-11-04

申请人： R. Travis Summerlin ,  Joseph A. Devore ,  William E. Grose

发明人： R. Travis Summerlin ,  Joseph A. Devore ,  William E. Grose

IPC分类号： H03K190185

CPC分类号： H03K19/018585 ,  H03K19/00361

摘要： A voltage level shifting circuit (60) and method for accomplishing a voltage level change includes a voltage level shifting circuit (65) to change an input voltage to a shifted voltage level. A second stage (67) is connected between a voltage source at the shifted voltage level (68) and the reference potential. The second stage (67) includes active devices (66,82) that are controlled by the voltage level shifting circuit (65). The second stage (67) also includes slope resistors (86,88) connected in series between the active devices (66,82) of the second stage (67).

摘要翻译： 电压电平移动电路（60）和用于实现电压电平变化的方法包括将输入电压改变到移位的电压电平的电压电平移位电路（65）。 第二级（67）连接在变换的电压电平（68）的电压源和参考电位之间。 第二级（67）包括由电压电平移位电路（65）控制的有源器件（66,82）。 第二级（67）还包括串联连接在第二级（67）的有源器件（66,82）之间的斜率电阻器（86,88）。

公开(公告)号：US07391241B2

公开(公告)日：2008-06-24

申请号：US11192969

申请日：2005-07-29

申请人： Suribhotla V. Rajasekhar ,  Hasibur Rahman ,  Alexander Noam Teutsch ,  William E. Grose

发明人： Suribhotla V. Rajasekhar ,  Hasibur Rahman ,  Alexander Noam Teutsch ,  William E. Grose

IPC分类号： G01R29/02 ,  H03K9/08

CPC分类号： H03K19/00346

摘要： A deglitch circuit utilizes a first flip-flop coupled to the input signal and a second flip-flop coupled to the output of a circuit with feedback from the output to gates to control first and second inputs to the first flip-flop. In an alternative arrangement, a counter is provided between the output of the first flip-flop and the input to the second flip-flop in order to provide flexibility and the possibility of a longer delay for the circuit.

摘要翻译： 去交点电路利用耦合到输入信号的第一触发器和耦合到电路的输出的第二触发器，其具有从输出到门的反馈以控制到第一触发器的第一和第二输入。 在替代方案中，在第一触发器的输出和第二触发器的输入之间提供一个计数器，以提供灵活性以及延迟延迟的可能性。

公开(公告)号：US07072776B2

公开(公告)日：2006-07-04

申请号：US10985388

申请日：2004-11-09

申请人： Tobin D. Hagan ,  David J. Baldwin ,  William E. Grose

发明人： Tobin D. Hagan ,  David J. Baldwin ,  William E. Grose

IPC分类号： G06F1/00 ,  G01F1/68

CPC分类号： G01F1/698

摘要： A system and method are provided to regulate resistance in a discontinuous time hot-wire anemometer. The solution removes supply voltage dependency on the mass airflow output signal. Operating the hot-wire anemometer using discontinuous time regulation offers lower system power, but introduces an inverse supply dependent term in the associated transfer function. This effect is removed by multiplying the output signal via a supply dependent signal.

摘要翻译： 提供了一种用于调节不连续时间热线风速计中的电阻的系统和方法。 该解决方案消除了对质量气流输出信号的电源电压依赖性。 使用不连续时间调节操作热线风速计提供较低的系统功率，但在相关的传递函数中引入了逆供电相关项。 通过经由电源相关信号乘以输出信号来消除这种影响。