Column redundancy for digital multilevel nonvolatile memory
    3.
    发明申请
    Column redundancy for digital multilevel nonvolatile memory 有权
    数字多级非易失性存储器的列冗余

    公开(公告)号:US20050024956A1

    公开(公告)日:2005-02-03

    申请号:US10628979

    申请日:2003-07-28

    摘要: A digital multilevel bit memory array system comprises regular memory arrays and redundant memory arrays. A regular y-driver corresponds to each memory array to read or write contents to a multilevel bit memory cell and compare the read cell content to reference voltage levels to determine the data stored in the corresponding memory cell. Likewise, similar functions are performed by the redundant y-driver circuit for the redundant memory array. During the verification of the contents of the memory cell, if the read voltage is outside a certain margin requirement for a level of the reference voltage, a signal is generated in real time so that data from the bad y-driver is not output and data from the redundant y-driver corresponding to the redundant memory array is read out. The memory array system may also include a fractional multilevel redundancy.

    摘要翻译: 数字多电平位存储器阵列系统包括常规存储器阵列和冗余存储器阵列。 常规y驱动器对应于每个存储器阵列以将内容读取或写入多级位存储器单元,并将读取的单元内容与参考电压电平进行比较,以确定存储在相应存储器单元中的数据。 类似的功能由冗余的y驱动电路执行,用于冗余存储器阵列。 在验证存储单元的内容期间,如果读取电压超出参考电压电平的一定余量要求,则实时生成信号,以便不输出来自不良y驱动器的数据和数据 从对应于冗余存储器阵列的冗余y驱动器读出。 存储器阵列系统还可以包括分数多级冗余。

    Integrated mosfet resistance and oscillator frequency control and trim
methods and apparatus
    5.
    发明授权
    Integrated mosfet resistance and oscillator frequency control and trim methods and apparatus 失效
    集成MOSFET电阻和振荡器频率控制和微调方法和装置

    公开(公告)号:US5352934A

    公开(公告)日:1994-10-04

    申请号:US38355

    申请日:1993-03-25

    申请人: Sakhawat Khan

    发明人: Sakhawat Khan

    CPC分类号: H03K3/0231 H03K3/011

    摘要: For use in integrated circuit systems wherein both filter time constants and oscillator frequency each need a suitable reference, both the filter and the oscillator are referenced to common reference circuitry through a suitable control loop. Because the fundamental control parameters of the oscillator and the filter are time-period and time-constant respectively, the oscillator and the filter are implemented in a manner where the monolithic passive elements setting the fundamental control parameters (time-period and time-constant) are of the same type. This has the advantage of close tracking through process and ambient variations. Monolithic capacitors on the same chip are used as one of the common passive elements between the oscillator and the filter to set the time-period and time-constants, respectively, adjustable through adjustment of control currents. The monolithic implementation of the Control Block is such that by tuning the oscillator frequency to the appropriate value through setting of the respective control current, the filter time-constants also are appropriately set to satisfy the Nyquist criteria for a sampling rate referenced to the oscillator frequency. Trimming and tuning are accomplished by digital control to control the summing of appropriate current components after manufacture, such as by the programming of on-chip storage cells provided for this purpose.

    摘要翻译: 为了用于集成电路系统,其中滤波器时间常数和振荡器频率都需要合适的参考,滤波器和振荡器都通过合适的控制回路参考公共参考电路。 由于振荡器和滤波器的基本控制参数分别是时间周期和时间常数,振荡器和滤波器的实现方式是单片无源元件设置基本控制参数(时间周期和时间常数) 是相同的类型 这具有通过过程和环境变化的紧密跟踪的优点。 同一芯片上的单片电容器被用作振荡器和滤波器之间的常见无源元件之一,以分别设置时间段和时间常数,可通过调节控制电流进行调节。 控制块的单片实现使得通过设置相应的控制电流将振荡器频率调谐到适当的值,滤波器时间常数也被适当地设置为满足参考振荡器频率的采样率的奈奎斯特准则 。 微调和调谐是通过数字控制实现的,以控制制造后的适当电流分量的相加,例如通过为此设计的片上存储单元的编程。

    Integrated circuit system for analog signal recording and playback
    6.
    发明授权
    Integrated circuit system for analog signal recording and playback 失效
    用于模拟信号记录和回放的集成电路系统

    公开(公告)号:US5241494A

    公开(公告)日:1993-08-31

    申请号:US588949

    申请日:1990-09-26

    摘要: Integrated circuit system for analog signal recording and playback having improved performance and a very high level of integration. The integrated circuit is complete with preamplifier, automatic gain control, filter, fixed references including a band gap reference, trimming, power output amplifier, memory array, multiple closed loop sample and hold circuits, column decoder, column driver, row decoder, address counters, master oscillator and chip function timing circuits including sample clock, charge pumps, high voltage regulator and waveshapers, low VCC detector, power-on reset and recording reference circuits on a single chip. The system uses a writable analog reference scheme to put many error sources in the common mode, and provides a double ended output for maximum power output in a limited voltage range, and to allow direct connection to a speaker. Trim bits are provided for trimming the oscillator and filter so that the filter characteristics match and track the oscillator frequency and provision is made for absolute addressing and digital end of message markers. Programming is by way of a multi level iterative write process for high resolution.

    摘要翻译: 用于模拟信号记录和回放的集成电路系统具有改进的性能和非常高的集成度。 集成电路配有前置放大器,自动增益控制,滤波器,固定参考,包括带隙基准,微调,功率输出放大器,存储器阵列,多个闭环采样和保持电路,列解码器,列驱动器,行解码器,地址计数器 ,主振荡器和芯片功能定时电路,包括采样时钟,电荷泵,高压稳压器和波峰,低VCC检测器,上电复位和记录参考电路在单个芯片上。 该系统使用可写模拟参考方案将许多误差源放在共模中,并提供双端输出,以在有限的电压范围内实现最大功率输出,并允许直接连接到扬声器。 提供微调位用于微调振荡器和滤波器,使得滤波器特性匹配和跟踪振荡器频率,并提供消息标记的绝对寻址和数字结束。 编程是通过多级迭代写入过程进行高分辨率的。

    Method and apparatus for adjustment and control of an iterative method
of recording analog signals with on-chip trimming techniques
    7.
    发明授权
    Method and apparatus for adjustment and control of an iterative method of recording analog signals with on-chip trimming techniques 失效
    用于利用片上修剪技术来记录模拟信号的迭代方法的调节和控制方法和装置

    公开(公告)号:US5623436A

    公开(公告)日:1997-04-22

    申请号:US334589

    申请日:1994-11-04

    IPC分类号: G11C27/00

    CPC分类号: G11C27/005

    摘要: Method and apparatus for adjustment and control of an iterative method of recording analog signals with on-chip trimming techniques for later playback. The invention allows setting of various parameters for the multi iterative programming technique after chip fabrication so as to allow tighter control and thus higher resolution analog signal sample storage in a given or minimum amount of time. Such parameters include, but are not limited to: the step down voltage from the coarse programming cycle to the fine programming cycle, the incremental voltage increase between each fine pulse, the pulse width of each fine pulse, the number of fine pulses, the incremental voltage increase between each coarse pulse, the pulse width of each course pulse, the number of coarse pulses, and the offset, VOS, which stops further coarse pulses and holds the last coarse level as a reference for the following fine cycle.

    摘要翻译: 用于调整和控制利用片上修剪技术记录模拟信号的迭代方法以用于稍后播放的方法和装置。 本发明允许在芯片制造之后设置用于多重编程技术的各种参数,以允许在给定或最短时间内更严格的控制和因此更高分辨率的模拟信号样本存储。 这些参数包括但不限于:从粗编程周期到精细编程周期的降压电压,每个精细脉冲之间的增量电压增加,每个精细脉冲的脉冲宽度,精细脉冲数,增量 每个粗略脉冲之间的电压增加,每个脉冲的脉冲宽度,粗略脉冲的数量和偏移VOS,其停止进一步的粗略脉冲并保持最后的粗略电平作为以下精细周期的参考。

    Programmable non-volatile analog voltage source devices and methods
    8.
    发明授权
    Programmable non-volatile analog voltage source devices and methods 失效
    可编程非易失性模拟电压源器件及方法

    公开(公告)号:US5388064A

    公开(公告)日:1995-02-07

    申请号:US798557

    申请日:1991-11-26

    申请人: Sakhawat Khan

    发明人: Sakhawat Khan

    IPC分类号: G05F1/56 G11C27/00 G11C27/02

    CPC分类号: G11C27/024 G11C27/005

    摘要: Programmable non-volatile analog voltage source devices and methods wherein analog voltages may be sampled and stored in a non-volatile manner for output, typically through parallel output buffers. In one form and in a single integrated circuit, an input provided to the circuit may be stored at any analog storage location as determined by an address also provided to the circuit, the storage location determining at which of the outputs of the circuit the stored value will appear. While the storage, achieved by way of storage of differential voltages in floating gate MOSFET devices, is non-volatile, the same is also electrically alterable as desired. Various alternate embodiments and methods including the ability to address multiple pages of analog storage locations for storage of analog signals and selective parallel output of each page of the storage, output enable capabilities, parallel inputs and digital inputs are disclosed.

    摘要翻译: 可编程非易失性模拟电压源装置和方法,其中模拟电压可以以非易失性方式进行采样和存储,以通常通过并行输出缓冲器输出。 在一种形式和单个集成电路中,提供给电路的输入可以存储在由提供给电路的地址确定的任何模拟存储位置处,存储位置确定电路的哪个输出的存储值 会出现。 虽然通过在浮动栅极MOSFET器件中存储差分电压实现的存储是非易失性的,但是根据需要也可以电可改变存储。 公开了各种替代实施例和方法,包括能够寻址用于存储模拟信号的模拟存储位置的多页和存储,输出使能能力,并行输入和数字输入的每一页的选择性并行输出的能力。

    Integrated MOSFET resistance and oscillator frequency control and trim
methods and apparatus
    9.
    发明授权
    Integrated MOSFET resistance and oscillator frequency control and trim methods and apparatus 失效
    集成MOSFET电阻和振荡器频率控制和微调方法和装置

    公开(公告)号:US5243239A

    公开(公告)日:1993-09-07

    申请号:US940764

    申请日:1992-09-04

    IPC分类号: H03B1/00 H03K3/011 H03K3/0231

    CPC分类号: H03K3/0231 H03K3/011

    摘要: For use in integrated circuit systems wherein both filter time constants and oscillator frequency each need a suitable reference, both the filter and the oscillator are referenced to common reference circuitry through a suitable control loop. Because the fundamental control parameters of the oscillator and the filter are time-period and time-constant respectively, the oscillator and the filter are implemented in a manner where the monolithic passive elements setting the fundamental control parameters (time-period and time-constant) are of the same type. This has the advantage of close tracking through process and ambient variations. Monolithic capacitors on the same chip are used as one of the common passive elements between the oscillatorand the filter to set the time-period and time-constants, respectively, adjustable through adjustment of control currents. The monolithic implementation of the Control Block is such that by tuning the oscillator frequency to the appropriate value through setting of the respective control current, the filter time-constants also are appropriately set to satisfy the Nyquist criteria for a sampling rate referenced to the oscillator frequency. Trimming and tuning are accomplished by digital control to control the summing of appropriate current components after manufacture, such as by the programming of on-chip storage cells provided for this purpose.

    摘要翻译: 为了用于集成电路系统,其中滤波器时间常数和振荡器频率都需要合适的参考,滤波器和振荡器都通过合适的控制回路参考公共参考电路。 由于振荡器和滤波器的基本控制参数分别是时间周期和时间常数,振荡器和滤波器的实现方式是单片无源元件设置基本控制参数(时间周期和时间常数) 是相同的类型 这具有通过过程和环境变化的紧密跟踪的优点。 同一芯片上的单片电容器被用作振荡器和滤波器之间的常见无源元件之一,以分别设置时间段和时间常数,可通过调整控制电流进行调节。 控制块的单片实现使得通过设置相应的控制电流将振荡器频率调谐到适当的值,滤波器时间常数也被适当地设置为满足参考振荡器频率的采样率的奈奎斯特准则 。 微调和调谐是通过数字控制实现的,以控制制造后的适当电流分量的相加,例如通过为此设计的片上存储单元的编程。